Digital Principles and Computer Organization - CS3351 - Important Questions with Answer - Unit 2 - Synchronous Sequential Logic
Digital Principles and Computer Organization - CS3351 - Important Questions with Answer - Unit 2 - Synchronous Sequential Logic
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In sequential circuits the output variables dependent not only on the present input
variables but they also depend up on the past history of these input variables.
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In JK flip-flop output is fed back to the input. Therefore change in the output
results change in the input. Due to this in the positive half of the clock pulse if
both J and K are high then output toggles continuously. This condition is called
‘race around condition’.
A counter is used to count pulse and give the output in binary form.
In an Asynchronous counter, the clock pulse is applied to the first flip-flops. The
change of state in the output of this flip-flop serves as a clock pulse to the next flip-
flop and so on. Here all the flip-flops do not change state at the same instant and
hence speed is less.
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counter?
Synchronous counter:
Clock pulse is applied simultaneously Clock pulse is applied to the first flip-flop,
the change of output is given as clock to next flip-flop
Asynchronous counter:
a) Synchronous counter
b) Asynchronous counter
i) Up counter ii) Down counter iii) Modulo – N counter iv) Up/Down counter
It is a ring counter in which the inverted output is fed into the input. It is also
known as a twisted ring counter.
The basic unit for storage is flip flop. A flip-flop maintains its output state either
at1 or 0 until directed by an input signal to change its state.
A register capable of shifting its binary data in one or both directions is known as a
shift register. The logical design of a shift register includes a series of flip-flops,
with the output of one flip-flop linked to the input of the next flip-flop.
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Part B
1. Draw the logic circuits and the excitation tables for the T, JK, RS flip-flops.
2. Design a MOD-10/5 Synchronous counter using JK flip- flops. Write
execution table and state table.
3. i)What is race around condition in J-Kflip flop? How it is eliminated?
ii)Why gated D latch is called transparent latch? Explain with the logic
diagram.
4. Explain what is universal shift register? Explain its working.
5. Implement T flipflop using D flipflop and JK flipflop using D flipflop.
6. i) A sequential circuit with two D flip-flops A and B, one input x and one output z
is specified by the following next-state and output equations: A(t+1)= A′+B,
B(t+1)=B′x, z=A+B′ (1) Draw the logic diagram of the circuit (2) Draw the state
table (3) Draw the state diagram of the circuit ii) Explain the difference between a
state table, characteristics table and excitation table.
7. Design three bit synchronous counter with T flip flop and draw the diagram.
8. Convert SR flip-flop to T flip-flop
9. Convert JK Flip Flop into D & T Flip Flop
10. Design a synchronous counter that counts the sequence
000,001,010,011,100,101,110,111,000 using D flipflop.
11. Design a binary counter using T flip flops to count in the following
sequences: (i) 000, 001, 010, 011, 100, 101, 111, 000 (ii) 000, 100, 111,
010, 011, 000
12. Design a sequential circuit using RS flip flop for the state table with minimum flip
flop.
Prese
nt Next Outpu
State State t
x=0 x=1 x=0 x=
1
A A B 0 0
B C D 0 0
C A D 0 0
D E F 0 1
E A F 0 1
F G F 0 1
G A F 0 1
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Structures I Structure II Programming
Database Management Systems Computer Architecture Analog and Digital
Communication
Design and Analysis of Microprocessors and Object Oriented Analysis
Algorithms Microcontrollers and Design
Software Engineering Discrete Mathematics Internet Programming
Theory of Computation Computer Graphics Distributed Systems
Mobile Computing Compiler Design Digital Signal Processing
Artificial Intelligence Software Testing Grid and Cloud Computing
Data Ware Housing and Data Cryptography and Resource Management
Mining Network Security Techniques
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