lOMoAR cPSD| 9636936

Department of Electronics & Communication Engineering

Unit-4
Lecture Notes
8051 Microcontroller

Microprocessor & Microcontroller (BEC-502)

 lOMoAR cPSD| 9636936

UNIT IV – 8051 MICROCONTROLLER

Introduction:
A complete computer system manufactured on a single chip is called a microcontroller.
The features of a microcontroller are similar to that of a microprocessor like registers, ALU,
program counter, flags, stack pointer, etc. Along with these common features, a microcontroller
has some additional features such as a clock circuit, internal RAM, ROM, serial and parallel I/O
counter.
Using a microcontroller provides a great advantage that a program is stored in ROM that has
an important role in managing the system's operations and functions. Since the program written
into ROM is fixed that is, it cannot be altered or changed; as a result the operation of the system
remains constant (unchanged) regardless of the instructions given to it. Hence, a microcontroller
can be thought of a device containing on-chip program memory. A microcontroller can also be
referred as a 'microcomputer'.

Different Applications of Microcontroller

● Consumer Electronics Products: Toys, Cameras, Robots, Washing Machine, Microwave Ovens
etc.
● Instrumentation and Process Control: Oscilloscopes, Multi-meter, Leakage Current Tester, Data
Acquisition and Control etc.
● Medical Instruments:
● Communication:
● Office Equipment:
● Multimedia Application:
● Automobile:

DIFFERENCE BETWEEN MICROPROCESSOR AND MICROCONTROLLER

 lOMoAR cPSD| 9636936

8051 MICROCONTROLLER

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4

Kbytes of Flash Programmable and Erasable Read Only Memory (EEPROM). The device is
manufactured using Atmel’s high density nonvolatile memory technology and is compatible with
the industry standard MCS-51 instruction set and pin-out.

BLOCK DIAGRAM OF 8051 MICROCONTROLLER

Features of 8051 microcontroller

● 4 KB on chip program memory.

● 128 bytes on chip data memory(RAM).
● 128 user defined software flags.
● 8-bit data bus
● 16-bit address bus
● 32 general purpose registers each of 8 bits
● 16 bit timers (usually 2, but may have more, or less).
● 3 internal and 2 external interrupts.
● Bit as well as byte addressable RAM area of 16 bytes.
● Four 8-bit ports, (short models have two 8-bit ports).
● 16-bit program counter and data pointer.
● 1 Microsecond instruction cycle with 12 MHz Crystal

An 8051 microcontroller has the following 12 major components:

1. ALU (Arithmetic and Logic Unit)

2. PC (Program Counter)
3. Registers
4. Timers and counters
5. Internal RAM and ROM
6. Four general purpose parallel input/output ports
7. Interrupt control logic with five sources of interrupt
8. Serial date communication
9. PSW (Program Status Word)
10. Data Pointer (DPTR)
11. Stack Pointer (SP)
12. Data and Address bus.

1. ALU

All arithmetic and logical functions are carried out by the ALU. Addition, subtraction with carry,
and multiplication come under arithmetic operations. Logical AND, OR and exclusive OR (XOR)
come under logical operations.
 lOMoAR cPSD| 9636936

2. Program Counter (PC)

A program counter is a 16-bit register and it has no internal address. The basic function of
program counter is to fetch from memory the address of the next instruction to be executed. The
PC holds the address of the next instruction residing in memory and when a command is
encountered, it produces that instruction. This way the PC increments automatically, holding the
address of the next instruction.

3. Registers
Registers are usually known as data storage devices. 8051 microcontroller has 2 registers, namely
Register A and Register B. Register A serves as an accumulator while Register B functions as a
general purpose register. These registers are used to store the output of mathematical and logical
instructions.

The operations of addition, subtraction, multiplication and division are carried out by Register A.
Register B is usually unused and comes into picture only when multiplication and division
functions are carried out by Register A. Register A also involved in data transfers between the
microcontroller and external memory.
 lOMoAR cPSD| 9636936

8051 microcontroller also has 7 Special Function Registers (SFRs). They are:
1.Serial Port Data Buffer (SBUF)
2.Timer/Counter Control (TCON)
3.Timer/Counter Mode Control (TMOD)
4.Serial Port Control (SCON)
5.Power Control (PCON)
6.Interrupt Priority (IP)
7.Interrupt Enable Control (IE)

4. Timers and Counters

Synchronization among internal operations can be achieved with the help of clock circuits
which are responsible for generating clock pulses. During each clock pulse a particular operation
will be carried out, thereby, assuring synchronization among operations. For the formation of an
oscillator, we are provided with two pins XTAL1 and XTAL2 which are used for connecting a
resonant network in 8051 microcontroller device. In addition to this, circuit also consists of four
more pins. They are,
1. EA: External enable
2. ALE: Address latch enable
3. PSEN: Program store enable and
4. RST: Reset.

5. Internal RAM and ROM

ROM
A code of 4K memory is incorporated as on-chip ROM in 8051. The 8051 ROM is a non-
volatile memory meaning that its contents cannot be altered and hence has a similar range of data
and program memory, i.e, they can address program memory as well as a 64K separate block of
data memory.
RAM
The 8051 microcontroller is composed of 128 bytes of internal RAM. This is a volatile
memory since its contents will be lost if power is switched off. These 128 bytes of internal RAM
are divided into 32 working registers which in turn constitute 4 register banks (Bank 0-Bank 3)
with each bank consisting of 8 registers (R0 - R7). There are 128 addressable bits in the internal
RAM.

6. Four General Purpose Parallel Input/Output Ports

The 8051 microcontroller has four 8-bit input/output ports. These are:
PORT P0: When there is no external memory present, this port acts as a general purpose
input/output port. In the presence of external memory, it functions as a multiplexed address and
data bus. It performs a dual role.
PORT P1: This port is used for various interfacing activities. This 8-bit port is a normal I/O port
i.e. it does not perform dual functions.
PORT P2: Similar to PORT P0, this port can be used as a general purpose port when there is no
external memory but when external memory is present it works in conjunction with PORT PO as
an address bus. This is an 8-bit port and performs dual functions.
PORT P3: PORT P3 behaves as a dedicated I/O port.

7. Interrupt Control
An event which is used to suspend or halt the normal program execution for a temporary
period of time in order to serve the request of another program or hardware device is called an
 lOMoAR cPSD| 9636936

interrupt. An interrupt can either be an internal or external event which suspends the
microcontroller for a while and thereby obstructs the sequential flow of a program.

There are two ways of giving interrupts to a microcontroller – one is by sending software
instructions and the other is by sending hardware signals. The interrupt mechanism keeps the
normal program execution in a "put on hold" mode and executes a subroutine program and after
the subroutine is executed, it gets back to its normal program execution. This subroutine program
is also called an interrupt handler. A subroutine is executed when a certain event occurs.

In 8051, 5 sources of interrupts are provided. They are:

a) 2 external interrupt sources connected through INT0 and INT1

b) 3 external interrupt sources- serial port interrupt, Timer Flag 0 and Timer Flag 1.

8. Serial Data Communication

A method of establishing communication among computers is by transmitting and receiving
data bits is a serial connection network. In 8051, the SBUF (Serial Port Data Buffer) register holds
the data; the SCON (Serial Control) register manages the data communication and the PCON
(Power Control) register manages the data transfer rates. Further, two pins - RXD and TXD,
establish the serial network.

The SBUF register has 2 parts – one for storing the data to be transmitted and another for
receiving data from outer sources. The first function is done using TXD pin and the second
function is done using RXD pin.

There are 4 programmable modes in serial data communication. They are:

1. Serial Data mode 0 (shift register mode)

2. Serial Data mode 1 (standard UART)
3. Serial Data mode 2 (multiprocessor mode)
4. Serial Data mode 3

9. PSW (Program Status Word)

Program Status Word or PSW is a hardware register which is a memory location which holds
a program's information and also monitors the status of the program this is currently being
executed. PSW also has a pointer which points towards the address of the next instruction to be
executed. PSW register has 3 fields namely are instruction address field, condition code field and
error status field. We can say that PSW is an internal register that keeps track of the computer at
every instant.

Generally, the instruction of the result of a program is stored in a single bit register called a 'flag'.
The are7 flags in the PSW of 8051. Among these 7 flags, 4 are math flags and 3 are general
purpose or user flags.
The 4 Math flags are:
• Carry (c)
• Auxiliary carry (AC)
• Overflow (OV)
• Parity (P)
The 3 General purpose flags or User flags are:
i) FO, ii) GFO and iii) GF 1
 lOMoAR cPSD| 9636936

10. Data Pointer (DPTR)

The data pointer or DPTR is a 16-bit register. It is made up of two 8-bit registers called DPH
and DPL. Separate addresses are assigned to each of DPH and DPL. These 8-bit registers are used
for the storing the memory addresses that can be used to access internal and external data/code.

11. Stack Pointer (SP)

The stack pointer (SP) in 8051 is an 8-bit register. The main purpose of SP is to access the
stack. As it has 8-bits it can take values in the range 00 H to FF H. Stack is a special area of data
in memory. The SP acts as a pointer for an address that points to the top of the stack.

12. Data and Address Bus

A bus is group of wires using which data transfer takes place from one location to another within
a system. Buses reduce the number of paths or cables needed to set up connection between
components.
There are mainly two kinds of buses - Data Bus and Address Bus
Data Bus: The purpose of data bus is to transfer data. It acts as an electronic channel using which
data travels. Wider the width of the bus, greater will be the transmission of data.
Address Bus: The purpose of address bus is to transfer information but not data. The information
tells from where within the components, the data should be sent to or received from. The capacity
or memory of the address bus depends on the number of wires that transmit a single address bit.

PIN DIAGRAM OF 8051 MICROCONTROLLER

● Pins 1 to 8 − These pins are known as Port 1. This port doesn’t serve any other functions.
It is internally pulled up, bi-directional I/O port.
● Pin 9 − It is a RESET pin, which is used to reset the microcontroller to its initial values.
● Pins 10 to 17 − These pins are known as Port 3. This port serves some functions like
interrupts, timer input, control signals, serial communication signals RxD and TxD, etc.
 lOMoAR cPSD| 9636936

● Pins 18 & 19 − These pins are used for interfacing an external crystal to get the system
clock.
● Pin 20 − This pin provides the power supply to the circuit.
● Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port. Higher order
address bus signals are also multiplexed using this port.
● Pin 29 − This is PSEN pin which stands for Program Store Enable. It is used to read a
signal from the external program memory.
● Pin 30 − This is EA pin which stands for External Access input. It is used to
enable/disable the external memory interfacing.
● Pin 31 − This is ALE pin which stands for Address Latch Enable. It is used to
demultiplex the address-data signal of port.
● Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port. Lower order address
and data bus signals are multiplexed using this port.
● Pin 40 − This pin is used to provide power supply to the circuit.
 lOMoAR cPSD| 9636936

8051 Microcontroller Memory Organization

The 8051 Microcontroller Memory is separated in Program Memory (ROM) and Data Memory
(RAM). The Program Memory of the 8051 Microcontroller is used for storing the program to be
executed i.e. instructions. The Data Memory on the other hand, is used for storing temporary
variable data and intermediate results.

8051 Microcontroller has both Internal ROM and Internal RAM. If the internal memory is
inadequate, you can add external memory using suitable circuits.

Program Memory (ROM) of 8051 Microcontroller

In 8051 Microcontroller, the code or instructions to be executed are stored in the Program
Memory, which is also called as the ROM of the Microcontroller. The original 8051
Microcontroller by Intel has 4KB of internal ROM.

In case of 4KB of Internal ROM, the address space is 0000H to 0FFFH. If the address space
i.e. the program addresses exceed this value, then the CPU will automatically fetch the code from
the external Program Memory.For this, the External Access Pin (EA Pin) must be pulled HIGH
i.e. when the EA Pin is high, the CPU first fetches instructions from the Internal Program Memory
in the address range of 0000H to 0FFFFH and if the memory addresses exceed the limit, then the
instructions are fetched from the external ROM in the address range of 1000H to FFFFH.

There is another way to fetch the instructions: ignore the Internal ROM and fetch all the
instructions only from the External Program Memory (External ROM). For this scenario, the EA
Pin must be connected to GND. In this case, the memory addresses of the external ROM will be
from 0000H to FFFFH.
 lOMoAR cPSD| 9636936

Data Memory (RAM) of 8051 Microcontroller

The Data Memory or RAM of the 8051 Microcontroller stores temporary data and intermediate
results that are generated and used during the normal operation of the microcontroller. Original
Intel’s 8051 Microcontroller had 128B of internal RAM.

But almost all modern variants of 8051 Microcontroller have 256B of RAM. In this 256B, the first
128B i.e. memory addresses from 00H to 7FH is divided in to Working Registers (organized as
Register Banks), Bit – Addressable Area and General Purpose RAM (also known as Scratchpad
area).

In the first 128B of RAM (from 00H to 7FH), the first 32B i.e. memory from addresses 00H to
1FH consists of 32 Working Registers that are organized as four banks with 8 Registers in each
Bank.

The 4 banks are named as Bank0, Bank1, Bank2 and Bank3. Each Bank consists of 8 registers
named as R0 – R7. Each Register can be addressed in two ways: either by name or by address.

To address the register by name, first the corresponding Bank must be selected. In order to select
the bank, we have to use the RS0 and RS1 bits of the Program Status Word (PSW) Register (RS0
and RS1 are 3rd and 4th bits in the PSW Register).

When addressing the Register using its address i.e. 12H for example, the corresponding Bank may
or may not be selected. (12H corresponds to R2 in Bank2).
 lOMoAR cPSD| 9636936

The next 16B of the RAM i.e. from 20H to 2FH are Bit – Addressable memory locations. There
are totally 128 bits that can be addressed individually using 00H to 7FH or the entire byte can be
addressed as 20H to 2FH.

For example 32H is the bit 2 of the internal RAM location 26H.

The final 80B of the internal RAM i.e. addresses from 30H to 7FH, is the general purpose RAM
area which are byte addressable.

These lower 128B of RAM can be addressed directly or indirectly.

The upper 128B of the RAM i.e. memory addresses from 80H to FFH is allocated for Special
Function Registers (SFRs). SFRs control specific functions of the 8051 Microcontroller. Some of
the SFRs are I/O Port Registers (P0, P1, P2 and P3), PSW (Program Status Word), A
(Accumulator), IE (Interrupt Enable), PCON (Power Control), etc.

SFRs Memory addresses are only direct addressable. Even though some of the addresses between
80H and FFH are not assigned to any SFR, they cannot be used as additional RAM area.

In some microcontrollers, there is an additional 128B of RAM, which share the memory address
with SFRs i.e. 80H to FFH. But, this additional RAM block is only accessed by indirect
addressing.
 lOMoAR cPSD| 9636936

List of 8051 Microcontroller Special Function Registers

All the 21 8051 Microcontroller Special Function Registers (SFRs) along with their functions and
Internal RAM Address is given in the following table.

Math or CPU Registers: A and B

Status Register: PSW (Program Status Word)
Pointer Registers: DPTR (Data Pointer – DPL, DPH) and SP (Stack Pointer)
I/O Port Latches: P0 (Port 0), P1 (Port 1), P2 (Port 2) and P3 (Port 3)
Peripheral Control Registers: PCON, SCON, TCON, TMOD, IE and IP
Peripheral Data Registers: TL0, TH0, TL1, TH1 and SBUF

CPU or Math Registers

A or Accumulator (ACC)
The Accumulator or Register A is the most important and most used 8051 Microcontroller SFRs.
The Register A is located at the address E0H in the SFR memory space. The Accumulator is used
to hold the data for almost all the ALU Operations.
Some of the operations where the Accumulator is used are:

● Arithmetic Operations like Addition, Subtraction, Multiplication etc.

● Logical Operations like AND, OR, NOT etc.
● Data Transfer Operations (between 8051 and External Memory)
The name “Accumulator” came from the fact this register is used to accumulate (or store) the
result of all Arithmetic and most of the Logical Operations.
B (Register B)
 lOMoAR cPSD| 9636936

The B Register is used along with the ACC in Multiplication and Division operations. These two
operations are performed on data that are stored only in Registers A and B. During Multiplication
Operation, one of the operand (multiplier or multiplicand) is stores in B Register and also the
higher byte of the result.
In case of Division Operation, the B Register holds the divisor and also the remainder of the
result. It can also be used as a General Purpose Register for normal operations and is often used as
an Auxiliary Register by Programmers to store temporary results.
Register B is located at the address F0H of the SFR Address Space.

Program Status Word (PSW)

The PSW or Program Status Word Register is also called as Flag Register and is one of the
important SFRs. The PSW Register consists of Flag Bits, which help the programmer in checking
the condition of the result and also make decisions.
Flags are 1-bit storage elements that store and indicate the nature of the result that is generated by
execution of certain instructions. The following image shows the contents of the PSW Register.

The following table describes the function of each flag.

Pointer Registers
Data Pointer (DPTR – DPL and DPH)
The Data Pointer is a 16-bit Register and is physically the combination of DPL (Data Pointer
Low) and DPH (Data Pointer High) SFRs. The Data Pointer can be used as a single 16-bit register
(as DPTR) or two 8-bit registers (as DPL and DPH).
DPTR doesn’t have a physical Memory Address but the DPL (Lower Byte of DPTR) and DPH
(Higher Byte of DPTR) have separate addresses in the SFR Memory Space. DPL = 82H and DPH
= 83H.
The DPTR Register is used by the programmer addressing external memory (Program – ROM or
Data – RAM).
 lOMoAR cPSD| 9636936

Stack Pointer (SP)

SP or Stack Pointer points out to the top of the Stack and it indicates the next data to be accessed.
Stack Pointer can be accesses using PUSH, POP, CALL and RET Instructions. The Stack Pointer
is an 8-bit register and upon reset, the Stack Pointer is initialized with 07H.

When writing a new data byte into the stack, the SP (Stack Pointer) is automatically incremented
by 1 and the new data is written at an address SP+1. When reading data from stack, the data is
retrieved from the Address in SP and after that the SP is decremented by 1 (SP-1).

I/O Port Registers (P0, P1, P2 and P3)

The 8051 Microcontroller four Ports which can be used as Input and/or Output. These four ports
are P0, P1, P2 and P3. Each Port has a corresponding register with same names (the Port Registers
are also P0, P1, P2 and P3). The addresses of the Port Registers are as follows: P0 – 80H, P1 –
90H, P2 – A0H and P2 – B0H.

Each bit in these SFRs corresponds to one physical Pin in the 8051 Microcontroller. All these Port
Registers are both Bit Addressable and Byte Addressable. Writing 1 or 0 on a Port Register Bit
will reflect as an appropriate voltage (5V and 0V) on the corresponding Pin.

If a Port Bit is SET (declared as 1), the corresponding Port Pin will be configured as Input and
similarly if a Port Bit is CLEARED (declared as 0), the corresponding Port Pin is configured as
Output. Upon reset, all the Port Bits are SET (1) and hence, all the Port Pins are configured as
Inputs.

Peripheral Control Registers

PCON (Power Control)

The PCON or Power Control register, as the name suggests is used to control the 8051
Microcontroller’s Power Modes and is located at 87H of the SFR Memory Space. Using two bits
in the PCON Register, the microcontroller can be set to Idle Mode and Power Down Mode.
During Idle Mode, the Microcontroller will stop the Clock Signal to the ALU (CPU) but it is
given to other peripherals like Timer, Serial, Interrupts, etc. In order to terminate the Idle Mode,
you have to use an Interrupt or Hardware Reset.
In the Power Down Mode, the oscillator will be stopped and the power will be reduced to 2V. To
terminate the Power Down Mode, you have to use the Hardware Reset.
Apart from these two, the PCON Register can also be used for few additional purposes. The
SMOD Bit in the PCON Register is used to control the Baud Rate of the Serial Port.
There are two general purpose Flag Bits in the PCON Register, which can be used by the
programmer during execution.
 lOMoAR cPSD| 9636936

SCON (Serial Control)

The Serial Control or SCON SFR is used to control the 8051 Microcontroller’s Serial Port. It is
located as an address of 98H. Using SCON, you can control the Operation Modes of the Serial
Port, Baud Rate of the Serial Port and Send or Receive Data using Serial Port.
SCON Register also consists of bits that are automatically SET when a byte of data is transmitted
or received.

Serial Port Mode Control Bits

SM0 Baud Rate

SM1 Mode Description

8-Bit Synchronous Shift Register Fixed Baud Rate

0 0 0
Mode ( Frequency of oscillator / 12)
8-bit Standard UART Variable Baud Rate (Can be set by Timer
0 1 1
mode 1)
Fixed Baud Rate
9-bit Multiprocessor Comm.
1 0 2 ( Frequency of oscillator / 32 or
mode
Frequency of oscillator / 64
1 1 3 9-bit Multiprocessor Comm. Variable Baud Rate (Can be set by Timer
mode 1)

TCON (Timer Control)

Timer Control or TCON Register is used to start or stop the Timers of 8051 Microcontroller. It
also contains bits to indicate if the Timers has overflowed. The TCON SFR also consists of
Interrupt related bits.

TMOD (Timer Mode)

 lOMoAR cPSD| 9636936

The TMOD or Timer Mode register or SFR is used to set the Operating Modes of the Timers T0
and T1. The lower four bits are used to configure Timer0 and the higher four bits are used to
configure Timer1.

The Gatex bit is used to operate the Timerx with respect to the INTx pin or regardless of the INTx
pin.
GATE1 = 1 ==> Timer1 is operated only if INT1 is SET.
GATE1 = 0 ==> Timer1 is operates irrespective of INT1 pin.
GATE0 = 1 ==> Timer0 is operated only if INT0 is SET.
GATE0 = 0 ==> Timer0 is operates irrespective of INT0 pin.
The C/Tx bit is used selects the source of pulses for the Timer to count.
C/T1 = 1 ==> Timer1 counts pulses from Pin T1 (P3.5) (Counter Mode)
C/T1 = 0 ==> Timer1 counts pulses from internal oscillator (Timer Mode)
C/T0 = 1 ==> Timer0 counts pulses from Pin T0 (P3.4) (Counter Mode)
C/T0 = 0 ==> Timer0 counts pulses from internal oscillator (Timer Mode)
TxM0 TxM1 Mode Description

0 0 0 13-bit Timer Mode (THx – 8-bit and TLx – 5-bit)

0 1 1 16-bit Timer Mode

1 0 2 8-bit Auto Reload Timer Mode

1 1 3 Two 8-bit Timer Mode or Split Timer Mode

NOTE: x = 0 for Timer 0 and x = 1 for Timer 1.

IE (Interrupt Enable)

The IE or Interrupt Enable Register is used to enable or disable individual interrupts. If a bit is
SET, the corresponding interrupt is enabled and if the bit is cleared, the interrupt is disabled. The
Bit7 of the IE register i.e. EA bit is used to enable or disable all the interrupts.

IP (Interrupt Priority)
 lOMoAR cPSD| 9636936

The IP or Interrupt Priority Register is used to set the priority of the interrupt as High or Low. If a
bit is CLEARED, the corresponding interrupt is assigned low priority and if the bit is SET, the
interrupt is assigned high priority.

Peripheral Data Registers

SBUF (Serial Data Buffer)
The Serial Buffer or SBUF register is used to hold the serial data while transmission or reception.
TL0/TH0 (Timer 0 Low/High)
The Timer 0 consists of two SFRs: TL0 and TH0. The TL0 is the lower byte and the TH0 is the
higher byte and together they form a 16-bit Timer0 Register.
TL1/TH1 (Timer 1 Low/High)
The TL1 and TH1 are the lower and higher bytes of the Timer 0.

ADDRESSING MODES OF 8051 MICROCONTROLLER

In 8051 There are six types of addressing modes.
● Immediate AddressingMode
● Register AddressingMode
● Direct AddressingMode
● Register IndirectAddressing Mode
● Indexed AddressingMode
● Implied AddressingMode

Immediate addressing mode

In this Immediate Addressing Mode, the data is provided in the instruction itself. The data is
provided immediately after the opcode. These are some examples of Immediate Addressing
Mode.

MOVA, #0AFH;
MOVR3, #45H;
MOVDPTR, #FE00H;
In these instructions, the # symbol is used for immediate data. In the last instruction, there is
DPTR. The DPTR stands for Data Pointer. Using this, it points the external data memory location.
In the first instruction, the immediate data is AFH, but one 0 is added at the beginning. So when
the data is starting with A to F, the data should be preceded by 0.
 lOMoAR cPSD| 9636936

Register addressing mode

In the register addressing mode the source or destination data should be present in a register (R0
to R7). These are some examples of Register Addressing Mode.

MOVA, R5;
MOVR0, A;
In 8051, there is no instruction like MOVR5, R7. But we can get the same result by using this
instruction MOV R5, 07H, or by using MOV 05H, R7. But this two instruction will work when
the selected register bank is RB0. To use another register bank and to get the same effect, we have
to add the starting address of that register bank with the register number. For an example, if the
RB2 is selected, and we want to access R5, then the address will be (10H + 05H = 15H), so the
instruction will look like this MOV 15H, R7. Here 10H is the starting address of Register Bank 2.

Direct Addressing Mode

In the Direct Addressing Mode, the source or destination address is specified by using 8-bit data
in the instruction. Only the internal data memory can be used in this mode. Here some of the
examples of direct Addressing Mode.

MOV80H, R6;
MOVR2, 45H;
MOVR0, 05H;
The first instruction will send the content of registerR6 to port P0 (Address of Port 0 is 80H). The
second one is forgetting content from 45H to R2. The third one is used to get data from Register
R5 (When register bank RB0 is selected) to register R5.

Register indirect addressing Mode

In this mode, the source or destination address is given in the register. By using register indirect
addressing mode, the internal or external addresses can be accessed. The R0 and R1 are used for
8-bit addresses, and DPTR is used for 16-bit addresses, no other registers can be used for
addressing purposes. Let us see some examples of this mode.

MOV0E5H, @R0;
MOV@R1, 80H
In the instructions, the @ symbol is used for register indirect addressing. In the first instruction, it
is showing that theR0 register is used. If the content of R0 is 40H, then that instruction will take
the data which is located at location 40H of the internal RAM. In the second one, if the content of
R1 is 30H, then it indicates that the content of port P0 will be stored at location 30H in the internal
RAM.
MOVXA, @R1;
MOV@DPTR, A;
In these two instructions, the X in MOVX indicates the external data memory. The external data
memory can only be accessed in register indirect mode. In the first instruction if the R0 is holding
40H, then A will get the content of external RAM location40H. And in the second one, the
content of A is overwritten in the location pointed by DPTR.
 lOMoAR cPSD| 9636936

Indexed addressing mode

In the indexed addressing mode, the source memory can only be accessed from program memory
only. The destination operand is always the register A. These are some examples of Indexed
addressing mode.

MOVCA, @A+PC;
MOVCA, @A+DPTR;
The C in MOVC instruction refers to code byte. For the first instruction, let us consider A holds
30H. And the PC value is1125H. The contents of program memory location 1155H (30H +
1125H) are moved to register A.
Implied Addressing Mode
In the implied addressing mode, there will be a single operand. These types of instruction can
work on specific registers only. These types of instructions are also known as register specific
instruction. Here are some examples of Implied Addressing Mode.

RLA;
SWAPA;
These are 1- byte instruction. The first one is used to rotate the A register content to the Left. The
second one is used to swap the nibbles in A.

Types of Instructions in 8051 Microcontroller Instruction Set

An 8051 Instruction consists of an Opcode (short of Operation – Code) followed by Operand(s) of
size Zero Byte, One Byte or Two Bytes.

The Op-Code part of the instruction contains the Mnemonic, which specifies the type of operation
to be performed. All Mnemonics or the Opcode part of the instruction are of One Byte size.

Coming to the Operand part of the instruction, it defines the data being processed by the
instructions. The operand can be any of the following:

● No Operand
● Data value
● I/O Port
● Memory Location
● CPU register

There can multiple operands and the format of instruction is as follows:

MNEMONIC DESTINATION OPERAND, SOURCE OPERAND

A simple instruction consists of just the opcode. Other instructions may include one or more
operands. Instruction can be one-byte instruction, which contains only opcode, or two-byte
 lOMoAR cPSD| 9636936

instructions, where the second byte is the operand or three byte instructions, where the operand
makes up the second and third byte.

Based on the operation they perform, all the instructions in the 8051 Microcontroller Instruction
Set are divided into five groups. They are:

● Data Transfer Instructions

● Arithmetic Instructions
● Logical Instructions
● Boolean or Bit Manipulation Instructions
● Program Branching Instructions
Data Transfer Instructions

The Data Transfer Instructions are associated with transfer with data between registers or external
program memory or external data memory. The Mnemonics associated with Data Transfer are
given below.

● MOV
● MOVC
● MOVX
● PUSH
● POP
● XCH
● XCHD

The following table lists out all the possible data transfer instruction along with other details like
addressing mode, size occupied and number machine cycles it takes.
 lOMoAR cPSD| 9636936

Arithmetic Instructions

Using Arithmetic Instructions, you can perform addition, subtraction, multiplication and
division. The arithmetic instructions also include increment by one, decrement by one and a
special instruction called Decimal Adjust Accumulator.
The Mnemonics associated with the Arithmetic Instructions of the 8051 Microcontroller
Instruction Set are:

● ADD
● ADDC
● SUBB
● INC
● DEC
● MUL
● DIV
● DA A
 lOMoAR cPSD| 9636936

The arithmetic instructions has no knowledge about the data format i.e. signed, unsigned,
ASCII, BCD, etc. Also, the operations performed by the arithmetic instructions affect flags like
carry, overflow, zero, etc. in the PSW Register.
All the possible Mnemonics associated with Arithmetic Instructions are mentioned in the
following table.

Logical Instructions
The next group of instructions are the Logical Instructions, which perform logical operations
like AND, OR, XOR, NOT, Rotate, Clear and Swap. Logical Instruction are performed on Bytes
of data on a bit-by-bit basis.
Mnemonics associated with Logical Instructions are as follows:

● ANL
● ORL
● XRL
● CLR
● CPL
● RL
● RLC
● RR
● RRC
 lOMoAR cPSD| 9636936

● SWAP
The following table shows all the possible Mnemonics of the Logical Instructions.

Boolean or Bit Manipulation Instructions

As the name suggests, Boolean or Bit Manipulation Instructions will deal with bit variables. We
know that there is a special bit-addressable area in the RAM and some of the Special Function
Registers (SFRs) are also bit addressable.
The Mnemonics corresponding to the Boolean or Bit Manipulation instructions are:

● CLR
● SETB
● MOV
● JC
● JNC
● JB
● JNB
● JBC
 lOMoAR cPSD| 9636936

● ANL
● ORL
● CPL
These instructions can perform set, clear, and, or, complement etc. at bit level. All the possible
mnemonics of the Boolean Instructions are specified in the following table.

Program Branching Instructions

The last group of instructions in the 8051 Microcontroller Instruction Set are the Program
Branching Instructions. These instructions control the flow of program logic. The mnemonics of
the Program Branching Instructions are as follows.

● LJMP
● AJMP
● SJMP
● JZ
● JNZ
● CJNE
● DJNZ
● NOP
 lOMoAR cPSD| 9636936

● LCALL
● ACALL
● RET
● RETI
● JMP
All these instructions, except the NOP (No Operation) affect the Program Counter (PC) in one
way or other. Some of these instructions has decision making capability before transferring
control to other part of the program.
The following table shows all the mnemonics with respect to the program branching instructions.

INTERRUPTS OF 8051
8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI. Each interrupt can be enabled
or disabled by setting bits of the IE register and the whole interrupt system can be disabled by
clearing the EA bit of the same register.
IE (Interrupt Enable) Register
This register is responsible for enabling and disabling the interrupt. EA register is set to one for
enabling interrupts and set to 0 for disabling the interrupts. Its bit sequence and their meanings
are shown in the following figure.
 lOMoAR cPSD| 9636936

IE. It disables all interrupts. When EA = 0 no interrupt will be acknowledged

EA
7 and EA = 1 enables the interrupt individually.

- IE. Reserved for future use.

6

- IE. Reserved for future use.

5

ES IE. Enables/disables serial port interrupt.

4

ET1 IE. Enables/disables timer1 overflow interrupt.

3

EX IE. Enables/disables external interrupt1.

1 2

ET0 IE. Enables/disables timer0 overflow interrupt.

1

EX IE. Enables/disables external interrupt0.

0 0

IP (Interrupt Priority) Register

We can change the priority levels of the interrupts by changing the corresponding bit in the
Interrupt Priority (IP) register as shown in the following figure.
● A low priority interrupt can only be interrupted by the high priority interrupt, but not
interrupted by another low priority interrupt.
● If two interrupts of different priority levels are received simultaneously, the request of
higher priority level is served.
● If the requests of the same priority levels are received simultaneously, then the internal
polling sequence determines which request is to be serviced.

- IP.6 Reserved for future use.

- IP.5 Reserved for future use.

 lOMoAR cPSD| 9636936

PS IP.4 It defines the serial port interrupt priority level.

PT1 IP.3 It defines the timer interrupt of 1 priority.

PX1 IP.2 It defines the external interrupt priority level.

PT0 IP.1 It defines the timer0 interrupt priority level.

PX0 IP.0 It defines the external interrupt of 0 priority level.