0% found this document useful (0 votes)
985 views30 pages

CMOS Analog IC Design JNTUK Unit 1

CMOS Analog IC design JNTUK unit 1
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
985 views30 pages

CMOS Analog IC Design JNTUK Unit 1

CMOS Analog IC design JNTUK unit 1
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 30

ELECTIVE-I

CMOS ANALOG IC DESIGN


Course Objectives:
 To provide in-depth understanding of different types of MOS devices and modeling
techniques
 To understand and design the operation of current mirror circuits
 To demonstrate the analysis and design of amplifiers using CMOS
 To design a various stages of Operational amplifiers using CMOS devices.
 Design and construct the open loop and discrete time comparators using op-amp.

UNIT –I

MOS Devices and Modeling:

The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout,
CMOSDevice Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small-Signal
Model forthe MOS Transistor, Computer Simulation Models, Sub-threshold MOS Model.

UNIT –II

Analog CMOS Sub-Circuits:

MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors-
Currentmirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current Mirror,
Current andVoltage References, Band gap Reference.

UNIT –III

CMOS Amplifiers

Inverters, Differential Amplifiers, Cascode Amplifiers, Current Amplifiers, Output Amplifiers, High
Gain Amplifiers Architectures.

UNIT –IV

CMOS Operational Amplifiers

Design of CMOS Op Amps, Compensation of Op Amps, Design of Two-Stage Op Amps, Power-Supply


Rejection Ratio of Two-Stage Op Amps, Cascode Op Amps, Measurement Techniques of OPAmp.

UNIT –V
Comparators
Characterization of Comparator, Two-Stage, Open-Loop Comparators, Other Open-Loop
Comparators, Improving the Performance of Open-Loop Comparators, Discrete-Time Comparators.
TEXT BOOKS:

1. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford University
Press, International Second Edition/Indian Edition, 2010.
2. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul J. Hurst, S. Lewis and
R. G. Meyer, Wiley India, Fifth Edition, 2010.

REFERENCE BOOKS:

1. Analog Integrated Circuit Design- David A. Johns, Ken Martin, Wiley Student Edn, 2013.
2. Design of Analog CMOS Integrated Circuits- Behzad Razavi, TMH Edition.
3. CMOS: Circuit Design, Layout and Simulation- Baker, Li

Course Outcomes:
 Model various components in CMOS process to estimate their performance in circuits.
 Analyze and design of MOS and different current mirror circuits including Wilson, cascode
current mirror.
 Design of CMOS Amplifiers including Differential, Cascode and high gain amplifier
architectures.
 Design of CMOS Operational amplifiers and to measure the characteristics of cascode
operational-amplifier.
 Apply and analyze the performance of open loop and discrete time capacitor circuits
UNIT -I
MOS Devices and Modeling

MOS Transistor:

A MOS transistor is primarily a switch for digital devices. Ideally, it works as follows:
If the voltage at the gate electrode is "on" , the transistor is "on", too, and current flow between
the source and drain electrodes is possible (almost) without losses.
If the voltage at the gate electrode is "off", the transistor is "off", too, and no current flows
between the source and drain electrode.

The most basic element in the design of a large scale integrated circuit is the transistor. For the
processes this type of transistor available is the Metal-Oxide-Semiconductor Field Effect
Transistor (MOSFET). These transistors are formed as a ``sandwich'' consisting of a
semiconductor layer, usually a slice, or wafer, from a single crystal of silicon; a layer of silicon
dioxide (the oxide) and a layer of metal. These layers are patterned in a manner which permits
transistors to be formed in the semiconductor material (the ``substrate''); a diagram showing a
typical (idealized) MOSFET is shown in Figure . Silicon dioxide is a very good insulator, so a
very thin layer, typically only a few hundred molecules thick, is required. Actually, the
transistors which we will use do not use metal for their gate regions, but instead use
polycrystalline silicon (poly). Polysilicon gate FET's have replaced virtually all of the older
devices using metal gates in large scale integrated circuits. (Both metal and polysilicon FET's are
sometimes referred to as IGFET's --- insulated gate field effect transistors, since the silicon
dioxide under the gate is an insulator. We will still continue to use the term MOSFET to refer to
polysilicon gate FET's.)
Transfer Characteristics of MOS Devices:

A cross section of a typical enhancement-mode n-channel MOS (NMOS) transistor is shown in


Fig.

Heavily doped n-type source and drain regions are fabricated in a p-type substrate (often called
the body).A thin layer of silicon dioxide is grown over the substrate material and a conductive
gate material (metal or polycrystalline silicon) covers the oxide between source and drain. Note
that the gate is horizontal in Fig., and we will use this orientation in all descriptions of the
physical operation of MOS devices. In operation, the gate-source voltage modifies the
conductance of the region under the gate, allowing the gate voltage to control the current flowing
between the source and drain. This control can be used to provide gain in analog circuits and
switching characteristics in digital circuits.
Passive Components- Capacitor & Resistor:
Integrated circuit Layout:
Y path technique
CMOS Device Modeling:

Simple MOS Large-Signal Model:


Other Model Parameters:
Computer Simulation Models:
Sub-threshold MOS Model:
Sub-threshold MOS Model:

You might also like