APPLICATION NOTE

ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

Robert Schillinger, Dr. Richard Blakey

01. INTRODUCTION This Application Note outlines the components needed to

protect USB 3.2 devices and attenuate EMI that may cause
The USB connector and standard are one of the most widely
the device to fail EMC testing. This will be demonstrated in
implemented and successful interfaces ever used. The
USB Type-C filter stick (Figure 1) to characterize the
applications are commercial and industrial, and both have
effectiveness of the components. For information and
been pushing the standard to be faster. The USB standard
components suitable for USB 2.0, please refer to:
has been updated to version 3.2 (Table 1). This standard
increases data transfer speeds to 5 GBits/s (Gen 1), 10 GBit/s  ANP002 – The Protection of USB 2.0 Applications

(Gen 2) and 20 GBit/s (Gen 2x2).  ANP024 – The USB Interface from EMC Point of View

2000 2008 2013 2017 2019 speed

480 Mbit/s
USB 2.0 USB 2.0 USB 2.0 USB 2.0
HighSpeed

USB 3.1 USB 3.2 5 Gbit/s

USB 3.0
Gen 1 Gen 1 SuperSpeed

USB 3.1 USB 3.2 10 Gbit/s

Gen 2 Gen 2 SuperSpeed+

USB 3.2
20 Gbit/s
Gen 2x2

USB41) 40 Gbit/s : USB-C filter stick used to demonstrate USB 3.2 filtering and
not part of this appnote
1) protection
Table 1: USB standard naming convention evolution

Higher data transfer speeds are required due to the ever-

increasing resolution of media and network data rate
requirements.
Increasing the data transfer speed means important
parameters need to be considered, as this has implications in
data transmission lines. Attenuating unwanted signals while
maintaining the speed and integrity of data transfer is of
paramount importance for EMI compatibility. For high-speed
data lines, Würth Elektronik has common mode chokes for
EMI suppression and TVS diodes for ESD protection. The
WE-CNSW HF has been developed to attenuate common
mode noise signals while maintaining signal integrity up to
10 GBit/s. For ESD protection, the
WE-TVS is available with very low capacitances (< 0.6 pF) and
is the ideal choice for higher frequencies. These components
are also well suited for other high data transfer interfaces
such as HDMI 4K, DisplayPort or GBit LAN.

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APPLICATION NOTE
ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

Common mode interference arises from parasitic coupling in

02. EMC CONCIDERATIONS OF
the circuit environment of the USB controller. This is usually
SYMMETRICAL DATA LINES
due to capacitive coupling on the USB signal with rising
The USB interface is a bidirectional, symmetric interface interference frequency and increasing amplitude. However,
(Figure 2). these interference types are found on both USB wires in
phase and at the same amplitude and therefore the effect on
the intended signal is reduced. Asymmetries in the cable or at
the receiver often convert the originally common mode into a
differential mode interference signal, however, which can
then contribute to signal impairment (Figure 4).

: The USB interface is symmetrical and bidirectional

: Conversion of differential mode (IDM) to common mode

interference (ICM) due to parasitic coupling capacitances (CStr) in the
one channel of a differential pair

2.2 Interference immunity

Differential mode data transmission offers a significant
advantage over the simple coaxial cable when it comes to the
effect of interference on the USB. Depending on the shielding
: The symmetrical interface with its measurable interference effectiveness of a coaxial cable, a transient, from a parallel
voltages mains cable for example, couples into the data line and
VDM, interference voltage between the signal wires, and VCM, interferes with the data signal (Figure 5). This leads to data or
interference voltage between the voltage midpoint and the communication errors, which depend on the interference
reference voltage (ground, cable shield), are both measurable. signal length and amplitude.
This means that both differential mode and common mode Symmetrical transmission techniques have numerous
interference voltages can affect the USB transmission path. advantages including lower interference emission and higher
This can be interference from the interface itself or an interference immunity.
electromagnetic effect from the environment in the form of
inductive, capacitive or wave coupling.

2.1 Interference Emission

In the case of USB transmission, differential mode
interference is mainly generated by non-linear signal
: Effect of interference on a coaxial data transmission path
harmonics due to impedance mismatching and inadequate
circuit design. Asymmetry of the transmission path (e.g. Figure 6 represents the case of differential mode data
transmitter, circuit board traces, conductor tracks, filters or transmission with twisted pair wires. The polarity of the
cables) can lead to interference radiation and impairment of intended signal is reversed so that equal but opposite signals
signal quality. propagate. The signal difference is evaluated at the input of

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ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

the receiver. The interference signal affects both wires in the strongly dependent on the properties of the CMC. The CMC
same phase, so this cannot have an effect as an interference must have a high degree of symmetry between both windings
signal at the receiver. and low stray inductance. For the choke, this means a high
Furthermore, in the case of the inductive interference effect attenuation for the common-mode rejection in the frequency
(magnetic field), the twisting of the wires achieves range of the data signal in order to reduce interference due to
compensation of the interference effect. Because of the reflection and/or absorption. On the other hand, the choke
symmetry of the partial inductances of the respective twisted must have a low attenuation for the useful signal in order to
wire, the interference influences compensate each other. influence it not too much.
Transient interference signals, such as ESD and bursts, can
generally be limited with varistors. Especially SMD multilayer
varistors, which are particularly fast and withstand a high
level of energy. However, their capacitance is generally too
high, possibly corrupting the signal by acting as low-pass
filter (the higher the capacitance, the lower the cut-off
: Compensation of electrical interference coupling of the frequency). This makes them unsuitable for limiting transients
differential mode signal input and twisted wire pairs in USB 3.2 data lines. Transient limitation with diodes is
shown in Figure 7. Transients are limited against ground, both
2.3 Possibilities of reducing emission and increasing on D+ as well as on D- up to the forward voltage UF of the
interference immunity diodes. This voltage is around 0.7 V for silicon diodes. A
problem appears very quickly here, which is why the diode
It is apparent in practice that interference emissions cannot
pair bellow has two red flashes: The signal voltage of the
be completely prevented and, therefore, interference
"mid-speed" signal is up to 2.8 V (D+ to D-), i.e. 1.4 V to
immunity has stringent requirements. The reason lies in many
ground. The positive branch must therefore be provided with
details, of which these are the most important:
an "offset" in order to avoid impairing higher signal voltages.
 Both the inputs/outputs of the USB controller and as well
the track routing are unbalanced; this results in common-
mode interference on the bus.
 The layout is not HF/EMC compatible, parasitic
capacitances and the lack of wave impedance matching
generate common mode interference.
 The circuit design (USB filter) is inadequate, the filters
affect the signal quality and/or the insertion loss is too low.
 The interface design (receptacle, housing) is inadequate, : Diode array to reduce coupled transients (burst, ESD) on the
poor ground reduces the shield attenuation of the cable, USB interface
filters have poor ground reference. An additional TVS diode with a limitation voltage of 6 V sets
 The USB cable is asymmetrical, poorly shielded, has the threshold value to approximately 6.7 V. This is sufficient
inadequate ground connection. The cable deteriorates the protection, as TVS diodes with lower limitation voltages are
signal quality, radiates signal harmonics and has too slow to limit ESD. The voltage levels are illustrated in

insufficient shield attenuation towards external Figure 8. Transient limitation at the connection of the supply
voltage can be achieved at the same time using the additional
interference sources.
diode D5 in Figure 9. Although the capacitance of the TVS
diode is low at 5 pF, it would be too high for USB 3.2. As VR1 is
2.4 Methods of reducing emission and increasing
in series with D3 and D4, however, the capacitance of VR1
interference immunity reduces the overall capacitance that affects the signal, as D3
Common mode chokes (CMC) are fundamental for attenuating and D4 have capacitances of approximately 2 pF. The
interference. Extremely low capacitances between the data capacitors are in series with D3 and D4 with reference to the
line and ground are needed with USB 3.2. The values are

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ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

signal, there is an overall signal-to-signal capacitive load of 03. HIGH FREQUENCY COMMON MODE
2 pF and signal against ground of around 3 pF. CHOKES
Common mode chokes are inductors with two or more
isolated windings. When a common mode signal passes
through the component, magnetic flux accumulates in the
core, resulting in high impedance at some frequencies. As
differential signals cancel out the magnetic flux in the core,
the impedance is low, allowing the signal to pass nearly un-
attenuated.

: Voltage levels of the positive diode path

: WE-CNSW HF

: Diode array to reduce coupled transients (burst, ESD) on the

USB interface with "offset" for higher signal levels

For the supply voltage, a low-pass π-filter with two ceramic

capacitors and an inductor can be used (Figure 10). The
current carrying capability is an important parameter, which is
specified in the datasheets. The components should be
selected to be adequate for the respective power output.

: π-filter-topology

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ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

: Eye diagram with the WE-CNSW filter (left) and the WE-CNSW HF filter (right) at 5 GBit/s

: Eye diagram with the WE-CNSW filter (left) and the WE-CNSW HF filter (right) at 2.5 GBit/s

: Eye diagram with the WE-CNSW filter (left) and the WE-CNSW HF filter (right) at 7 GBit/s

In Figure 12, the eye diagram for the WE-CNSW (left side) and At 2.5 GBit/s the difference is smaller (Figure 13). The
the WE-CNSW HF (right side) is compared at 5 GBit/s. Both harmonics of the signal are not filtered by the high frequency
components have almost the same impedance in common component nor the standard component.
mode (Figure 15). The main difference is in the differential The difference between the WE-CNSW and the WE-CNSW HF
mode impedance. The difference is big enough to see that the is not significant in the low frequency data range. Both will
eye is smaller with the standard version. allow the data signal to pass as both WE-CNSW series are
designed to have low differential impedance in this frequency
range. However, a data signal with a higher frequency will be

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ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

presented with higher levels of differential impedance. With Additionally, the WE-TVS High Speed Series are high
the WE-CNSW, the cut-off frequency is about 2 GHz, whereas performance TVS diode arrays that include surge rated
with the WE-CNSW HF the cut-off frequency is much higher, diodes. They are an excellent choice to protect high-speed
while still having the same impedance for common mode data lines, like USB 2.0, VGA and Ethernet. The WE-TVS High
signals. At a data rate of 7 GBit/s the WE-CNSW also Speed Series exceeds the requirements outlined in
attenuates the base frequency of the signal while the EN 61000-4-2. Due to their ultra-low capacitance (< 2.0 pF)
WE-CNSW HF only attenuates the high frequency harmonics they are nearly invisible on the signal lines.
resulting in a passed eye diagram test (Figure 14).

: Comparison of the inter-pin capacitance between the

: Comparison between the common and differential mode WE-TVS High Speed Series (824 001 52) and the WE-TVS Super
impedance of the WE-CNSW (744 231 091) and the WE-CNSW HF Speed Series (824 014 885)
(744 233 56 00)
05. USB-TYPE-C-FILTER-STICK
04. TRANSIENT VOLTAGE SUPPRESSION Modern demands have been pushing for a universal bus (USB)
(TVS) DIODES to be smaller, thinner and lighter. The USB Type-C connector
was developed in parallel with the USB 3.2 standard
Due to their construction, modern semiconductors are (SuperSpeed+, USB 3.2 Gen 2), which is the updated standard
fabricated with extremely small tolerance to high voltages. of USB 3.0 (now USB 3.2 Gen1). The connector now includes
Integrated ESD protection normally works up to 500 V, but 24 pins (Figure 18) which include four power/ground pairs,
higher tolerance is needed in most applications to ensure two differential pairs (non-SuperSpeed+) and four
stable and long-term functionality. SuperSpeed+ pairs (two used for USB 3.2). USB Type-C has
data rates of up to 10 Gbit/s using one SuperSpeed+ and two
SuperSpeed line pairs and can carry up to 5 A (100 W). To
maintain signal integrity at these speeds, the capacitance of
ESD devices must be even lower than that for USB 2.0 while
CMCs need to present impedance to differential mode noise
at higher frequencies.

: WE-TVS Super Speed Series

Würth Elektronik has launched the high frequency TVS diodes

array series called WE-TVS Super Speed Series. These TVS
diode arrays protect against ESD pulses according to
EN 61000-4-2. Due to their ultra-low capacitance (< 0.6 pF)
they are nearly invisible to high bit rate data such as USB 3.2, : USB-Type-C-Pin-Layout

HDMI 2.0 and GBit Ethernet.

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ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

From the above pin layout, the power pairs are A1/A4, A9/A12,
B1/B4 and B9/B12, the SuperSpeed+ pairs A2/A3/B10/B11 and
A10/A11/B2/B3 and the non-SuperSpeed+ A6/A7 and B6/B7.
These three functions can be treated separately and the
necessary protection and filtering can be seen below
(Figure 19).

: Visualization of the USB filter stick

5.1 USB-3.2 power channels

As previously stated, the power bus of the USB Type-C
connector can handle up to 100 W (20 V / 5 A) when the cable
is rated to such power. However, most applications will not
use this high power capability. Therefore, the power bus filter
must be designed to tolerate the power to be used by the
: Block diagram of the USB Type-C filter stick application.

Additionally, A5/B5 are used to detect the connection and The USB 3.2 standard states a data rate of to 5 GBits/s
configure the interface. A8/B8 can be used for audio or (Gen 1) and 10 GBit/s (Gen 2). To attenuate any high
additional features that have yet to be designated. frequency noise coupling to the power line, a low pass filter
can be used with a cut-off frequency of approximately 1/10th
The nominal differential impedance of USB 3.2 data lines is
of the data rate.
90 Ω, which must be maintained in the differential microstrip
of the filter stick. Z0 is calculated using the standard 5.2 100 W (20 V / 5 A) applications
microstrip formula (1). To achieve impedance matching, the The WE-MSPB (742 792 261 01) ferrite has its maximum
trace width w and height t, the trace separation distance s of impedance in the range from approximately 100 MHz to
the differential data traces in addition to the PCB permittivity 1000 MHz in which the highest level of interference is to be
and thickness h must be considered (Equation 2). anticipated in USB data transmission. At 750 MHz the ferrite
87 5.98 h (1) acts like an ohmic resistor with no reactive components.
Z0 = ln � �
�ɛr + 1.41 (0.8 w + t)
Above this resonance frequency, the capacitive behavior
s
Zdiff = 2 ∙ Z0 ∙ �1 -0.48 ∙ e
�-0.96 ∙ �
h � (2) dominates the impedance. Table 2 shows an overview of the
most important parameters, the impedance curve is
The calculated parameters were implemented as seen
presented in Figure 22.
(Figure 20).
Properties Test conditions Value Tolerance

Z 100 MHz 100 Ω ± 25%

Zmax 1100 MHz 160 Ω Typ.

IR ΔT = 40 K 8A Max.

RDC 4.5 Ω Max.

Table 2: Electrical data of WE-MPSB SMD ferrite (742 792 261 01)

: Trace dimensions and PCB layer stack to attain 90 Ω line

impedance (w = 230 µm, s = 150 µm, h = 177 µm)

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170 dB @ 50 MHz and have attenuations of more than 30 dB

up to the double-digit GHz range.
Figure 24 shows the attenuation curve of the entire filter
without any bias effects. Both the capacitor (voltage bias) and
the ferrite (current bias) have a nominal value reduction,
which in turn leads to a changed damping curve. This can be
reduced by skillful component selection, e.g. larger size on
MLCC.

: Implemented SMD ferrites, π-filter and TVS diode topology

for 100 W power capability

Index Serie Order code Value

L6 WE-MPSB 1812 742 792 261 01 100 Ω

L7 WE-MAPI 4020 744 383 560 12 1.2 µH

L8 WE-MPSB 1812 742 792 261 01 100 Ω

WCAP-CSGP
C1 885 012 107 018 4.7 µF / 25 V
0805

WCAP-CSGP
C2 885 012 107 018 4.7 µF / 25 V
0805
: Complex impedance curve and the effect of DC current on
the impedance of the WE-MPSB SMD ferrite (742 792 261 01) D6 WE-TVS 824 045 810 20 V

Properties Test conditions Value Tolerance Table 4: Selected components for the 100 W design

1±0.2 VRMS; 5.3 60 W (20 V / 3 A) Applications

C 4.7 µF ± 20%
1 kHz ± 10% As a specialized cable is needed to handle 100 W of power,
UR 25 V Max. most applications will use 60 W or lower, which is the highest
1±0.2 VRMS; rated power of a ‘normal’ cable. Therefore, it may not be
DF ≤ 10% Typ. necessary to implement a filter that can handle 100 W. The
1 kHz ± 10%
following filter is implemented in a similar way to the 100 W
Apply UR for 120 s
RISO ≥ 0.02 GΩ filter but uses components with lower current handling
max
capability and therefore, a more compact design.
Table 3: WCAP-CSGP (885 012 107 018) electrical characteristics
Index Serie Order code Value
A π-filter was chosen as the basic filter component in order to L6 WE-MPSB 1206 742 792 211 11 10 Ω
achieve broadband insertion loss here. From approx. 100 kHz
L7 WE-MAPI 3020 744 383 360 12 1.2 µH
the -3 dB limit is undershot and then extends to approx.
L8 WE-MPSB 1206 742 792 211 11 10 Ω
4 GHz with a maximum insertion loss of just around
120 dB @ 5 MHz. In order to further optimize the filter and WCAP-CSGP
C1 885 012 107 018 4.7 µF / 25 V
also to be able to suppress RF interference, the π-filter is 0805
expanded with the ferrite. Here, with increasing frequency, an WCAP-CSGP
C2 885 012 107 018 4.7 µF / 25 V
optimal mismatch to the low impedances of the source and 0805
sink is achieved. The high attenuation values expand to over
D6 WE-TVS 824 045 810 20 V

Table 5: Selected components for the 60 W design

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ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

: WE-CNSW HF (744 233 56 00) for the data line filter

The impedance curve and insertion loss of the CMC in

common and differential mode is presented in Figure 26.
Common mode noise occurs when the same interference
components propagate in the same direction on the positive
and negative channels with respect to ground. This is always
: Simulated attenuation of the power line filter rated for the case for capacitive or inductive coupling on the circuit or
60 W and 100 W in comparison its conductor tracks. Therefore, this impedance component
must be as high as possible. At 100 MHz the CMC has around
5.4 USB 3.2 SuperSpeed + channels
60 Ω. The differential mode impedance occurs due to the stray
The WE-CNSW HF (744 233 56 00) is the heart of the data inductance of the winding structure. This impedance must be
line filter. On account of its winding technology, the as small as possible at the data frequency.
WE-CNSW HF has a high degree of symmetry and low
parasitic capacitances. The structure is shown in Figure 25
and the most important parameters are given in Table 6.
Properties Test conditions Value Tolerance

Z 100 MHz 60 Ω ± 25%

UR 20 V Typ.

IR ΔT = 20 K 600 mA Max.

Table 6: Electrical characteristics of the current-compensated choke

(744 233 56 00)

: Impedance curve and insertion loss of WE-CNSW HF

@ 50 Ω (744 233 56 00)

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Including capacitance in the filter forms a low-pass second There are a number of issues with the layout in Figure 28,
order filter. A diode array is used here instead of capacitors. which include:
The integrated diodes also have a parasitic capacitance, which  The ground connection to the capacitor is too long. 1 cm of
can be effectively used. In addition, the parasitic inductance of track corresponds to 6-10 nH inductance.
the TVS diodes in the array is very low. This is necessary to
 The ground connection should pass directly to the housing,
attain a short response time to the overvoltage transients.
as the ground reference of the cable shielding and the
Therefore, an almost ideal capacitor is combined with
ground reference of the filter must lie on the same HF
effective transient protection. The most important electrical
characteristics and the structure of the array are presented in potential.
Table 7 and Figure 27.  The long connecting line from the coil to the capacitor

Properties Test conditions Value represents an additional inductance in series with the
capacitor. This inductance renders the capacitor ineffective
VGND = 0 V; VI/O = 1.65 V; 0.18 pF typ.
CCh with increasing frequency.
f = 1 MHz; I/O to GND 0.27 pF max.
 The filter input inductively couples to the GND terminal of
VGND = 0 V; VI/O = 1.65 V; 0.04 pF typ.
CX the capacitor. The filter is short-circuited with increasing
f = 1 MHz; I/O to I/O 0.08 pF max.
frequency.
Table 7: Electrical characteristics of the WE-TVS Super Speed Series  The components couple capacitively as they are located
(824 012 823)
parallel to one other. Here too, the coupling is greater with
increasing frequency.

The corrected layout with the associated HF-compatible

arrangement is shown in Figure 29.

: HF-optimized layout of an LC filter

: Electrical schematic and structure of the diode array
This layout is better as:
WE-TVS (824 012 823)
 The contraction prevents interference current from
5.5 Layout bypassing the capacitor. The capacitor "lies" in the signal

The circuit board with its conductor tracks is an arrangement path.

of components with capacitances and inductances. The layout  The right-angled arrangement of the components
therefore has to be designed according to the circuit prevents mutual coupling.
requirements. A simple LC low-pass filter can be significantly  The short ground connection at the capacitor, which is
impaired in its effectiveness by an unfavorable layout connected to GND with low impedance by two vias,
(Figure 28).
provides an ideal high-frequency reference point for the
capacitor.

: Example of a low-pass filter for high frequencies with an

unfavorable layout

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ANP007 | Effective USB 3.2 Gen 2x2 filtering and protection

5.6 Measurement
The test setup (1 m cable and the type C filter stick) was
connected to the analyzer by a measuring fixture. The
respective eye diagrams were taken at 5 GBit/s
(USB 3.2 Gen 1). Figure 30 shows the variation of the
differential impedance Zdiff in a time domain reflectometry
(TDR). Here you can see well the slightly too high PCB
impedance (around 105 Ω) which is caused by a pool board
without impedance-controlled manufacturing (correct value
should be at 90 Ω).
When components are added to the PCB (Figure 31), the
effect on the signal can be observed. The gray line
corresponds to the measurement of an unpopulated PCB (see
Figure 30). The first measurement includes the CMC, the
second the TVS diodes and the third shows the effect when
the solder mask is applied.
The basis for the measurement at 10 GBit/s is the adapter
with all components and solder resist (Figure 32). The receiver
can open the eye cleanly with the USB equalizer settings
based upon the USB 3.2 r1.0 specification. Thus, a
transmission with all protection components and connectors
is well possible. With optimized components, you can achieve
better results in advance and thus increase the range. The eye
pattern test shows that the WE-TVS and WE-CNSW HF do
not disturb the USB 3.2 signal. To refresh the signal, there is
an equalizer in each USB receiver, which is responsible for
opening the eye (Figure 32).

: Time domain measurements and eye diagram of USB Type-C filter stick

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: Time domain measurements and eye diagram of USB Type-C filter stick

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: Eye diagram of the filter stick with activated USB equalizer (@ 10 GBit/s)

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A Appendix

A.1 Bill of Material (BOM)

Index Description Value Size Order code

WCAP-CSGP
C1 / C2 C = 4.7 µF (25 V) 0805 885 012 107 018
Ceramic Capacitor, X5R
D1 / D2 / D3 / WE-TVS Super Speed TVS Diode Array, VDC = 3.3 V; IPeak = 3 A;
DFN1210-6L 824 012 823
D4 2 channel ESD Protection VESD,Contact/Air = 8/15 kV

WE-TVS Super Speed TVS Diode Array, VDC = 5 V; IPeak = 5 A;

D5 DFN3810-9L 824 014 885
8 channel ESD Protection VESD,Contact/Air = 15/15 kV

WE-TVS Standard Speed TVS Diode, VDC = 20 V; IPeak = 24 A;

D6 DFN1610-2L 824 045 810
Unidir., ESD Protection VESD,Contact/Air = 30/30 kV

WE-CNSW
L1 Z = 90 Ω @ 100 MHz 0805 744 231 091
Common Mode Choke
WE-CNSW HF
L2 / L3 / L4 / L5 Z = 60 Ω @ 100 MHz 0504 744 233 56 00
Common Mode Choke
L6 / L8 (100 W WE-MPSB Z = 100 Ω @ 100 MHz,
1812 742 792 261 01
Aufbau) Multilayer Power Suppression Bead IR = 8 A, RDC = 6 mΩ

L6 / L8 (60 W WE-MPSB Z = 110 Ω @ 100 MHz,

1206 742 792 211 11
Aufbau) Multilayer Power Suppression Bead IR = 5.4 A, RDC = 15 mΩ

L7 (100 W WE-MAPI
L = 1.2 µH, IR = 5.8 A 4020 744 383 560 12
Aufbau) SMT Inductor
L7 (60 W WE-MAPI
L = 1.2 µH, IR = 3.9 A 3020 744 383 360 12
Aufbau) SMT Inductor
WR-COM; Male USB 3.1 Type C 24
X1 632 712 000 011
pins 90° THT & SMT LP 0.8
WR-COM Female USB 3.1 Type C 24
X2 632 723 130 112
pins 90° THR & SMT LP mid mount 1.6

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IMPORTANT NOTICE
The Application Note is based on our knowledge and experience of RIGHT, COPYRIGHT, MASK WORK RIGHT, OR OTHER INTELLECTUAL
typical requirements concerning these areas. It serves as general PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR
guidance and should not be construed as a commitment for the PROCESS IN WHICH WE PRODUCTS OR SERVICES ARE USED.
suitability for customer applications by Würth Elektronik eiSos INFORMATION PUBLISHED BY WE REGARDING THIRD-PARTY
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change without notice. This document and parts thereof must not FROM WE TO USE SUCH PRODUCTS OR SERVICES OR A
be reproduced or copied without written permission, and contents WARRANTY OR ENDORSEMENT THEREOF.
thereof must not be imparted to a third party nor be used for any WE products are not authorized for use in safety-critical
unauthorized purpose. applications, or where a failure of the product is reasonably
Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and expected to cause severe personal injury or death. Moreover, WE
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Customers may use WE’s assistance and product recommendations military, aerospace, aviation, nuclear control, submarine,
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fact it is up to the customer to evaluate and investigate, where intent of such usage before design-in stage. In certain customer
appropriate, and decide whether the device with the specific product applications requiring a very high level of safety and in which the
characteristics described in the product specification is valid and malfunction or failure of an electronic component could endanger
suitable for the respective customer application or not. human life or health, customers must ensure that they have all
The technical specifications are stated in the current data sheet of necessary expertise in the safety and regulatory ramifications of
the products. Therefore the customers shall use the data sheets their applications. Customers acknowledge and agree that they are
and are cautioned to verify that data sheets are current. The current solely responsible for all legal, regulatory and safety-related
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enhancements, improvements, and other changes to its products WE.
and services. CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES
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