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2024 Fall_ECE 194 Digital Design_HW_008 (1)

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27 views4 pages

2024 Fall_ECE 194 Digital Design_HW_008 (1)

Uploaded by

mfraire90
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ECE 194 Introduction to Digital Design: Homework #8 (Due date: 11/6/2024)

Name:________________________________________________ WSU ID:_____________________

Total points (48 pts→20 pts): ____________________/________________

Problem 1. The adder-subtractor circuit of Figure 4.13 has the following values for
mode input 𝑀 and data inputs 𝐴 and 𝐵. In each case, determine the values of
the four 𝑺𝑼𝑴 outputs, the carry 𝑪, and overflow 𝑽. (4 pts for each)
Problem 2. Design a four-input priority encoder with inputs as in Table 4.8, but with
input 𝐷0 having the highest priority and input 𝐷3 the lowest priority. Find the
simplified expression of each output – X and Y using K-map. (4 pts per each)

Problem 3. Using a decoder and external gates, design the combinational circuit
defined by the following three Boolean functions. (4 pts per each)

𝐹1 = 𝑥 ′ 𝑦𝑧 ′ + 𝑥𝑧
𝐹2 = 𝑥𝑦 ′ 𝑧 ′ + 𝑥′𝑦
𝐹3 = 𝑥 ′ 𝑦 ′ 𝑧 ′ + 𝑥𝑦
Problem 4. Find the simplified expression of F each of the four cases when 𝐴𝐵 =
00, 01, 10, 𝑎𝑛𝑑 11 and implement the following Boolean function with a 𝟒 × 𝟏
multiplexer and external gates. Connect inputs A and B to the selection lines. The
input requirements for the four data lines will be a function of variables C and D.
These values are obtained by expressing F as a function of C and D for each of the
four cases when 𝐴𝐵 = 00, 01, 10, 𝑎𝑛𝑑 11. (4 pts for each case.)

𝐹(𝐴, 𝐵, 𝐶, 𝐷) = ∑(1, 3, 4, 11, 12, 13, 14, 15)

(1) 𝐹(𝐶, 𝐷) expression when 𝐴𝐵 = 00.

(2) 𝐹(𝐶, 𝐷) expression when 𝐴𝐵 = 01.

(3) 𝐹(𝐶, 𝐷) expression when 𝐴𝐵 = 10.

(4) 𝐹(𝐶, 𝐷) expression when 𝐴𝐵 = 11.

(5) Implement with a 4 × 1 multiplexer and external gates.

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