Radiant 2023-2-1 Block Based Tutorial
Radiant 2023-2-1 Block Based Tutorial
Design Tutorial
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Revision History 22
The Block-Based Design (Macro) tool is used to create design blocks from
implemented module of a device family. This tutorial leads you through all the
basic steps of creating, reusing, and exporting a macro block.
A macro block is a portion of an FPGA design that can be preserved for reuse
afterwards. Some of the benefits of implementing macros in a design include
the ability to reuse blocks in other designs and the ability to design more
effectively as a team.
<macro_name>.mdb
Macro Reuse
Import macro (.ipm) package as a design source into existing or new
project for reuse.
Loaded macro content into the design:
Logic Macro will be included in the post-synthesis netlist.
Firm/Physical Macro will be included in the post-MAP netlist.
Run Place & Route to recognize macro physical constraint if it is in the
macro package.
Time to Complete
About 45 minutes.
System Requirements
The Lattice Radiant software is required to complete the tutorial.
This diagram shows the steps for the macro creation process. First, a design
is made using a new or existing project. Then, a logical macro is created in
the Pre-Synthesis Constraint Editor, where the macro is defined. Once
changes are made in the Pre-Synthesis Constraint Editor, the defined macro
is saved in a.sdc file containing the ldc_create_macro constraint.
The next stage is exporting the macro using Logic, Firm, and Hard
preservation levels after macro has been defined. The macro package
generated by this export contains a number of files, including.mac, bb.v,
bb_extra.v, sim.vo, and.mdb files. These files provide the information you
need to use the macro and incorporate it into other designs or projects.
This diagram shows the steps for the macro reuse process. First, the macro
.ipm files are imported and the content is loaded into the design. The Post-
synthesis Logic Macro is merged into the design, ensuring that the macro
constraint is honored. A region with or without a buffer constraint can be
specified if the .pdc file exists.
In Map Design, Firm Macro is merged into the design, incorporating the post-
MAP macro design with a placement constraint. Hard Macro is also integrated
into the design with both placement & route constraints.
In Place & Route Design stage, the Logic Macro undergoes place & route with
a region constraint, while the Firm Macro goes through place & route with a
placement constraint. Finally, the Hard Macro goes through place & route with
both placement and routing constraints.
Note:
The Lattice Synthesis Engine (LSE) tool is currently not available for macro creation.
In the example above, shift1, shift2, shift3, and shift4 are Instance
Names. The command is get_cells as shown in the Object Command
pane.
b. In the Macro Name column, the name is automatically set for the
macro instance.
You can also edit the name by double-clicking a cell under the Macro
Name column.
c. In the Use PIO column, you can select the ports of the module to
include the device pins inside the macro (optional).
d. In the Disable column, you can click on the checkbox if you do not
want to use the macro.
Note:
The default hierarchy separator for Synplify Pro is a “.” (period), while Radiant tools
use “/” (forward slash). If you create a sub-module under more than two hierarchy
levels, you need to manually add the set_hierarchy_separator {/} line or change the
separator from “/” to “.” in the .sdc file.
To get an idea of what the minimum macro region size should be, you
can check the logic resource usage in the MAP Report (.mrp) file.
Calculating the region resources to compare macro resource usage is
different for each device family.
For example:
One PFU has 4 SLICEs (=8 LUTs + 8 REGs) for most devices, but 6
SLICEs (=12 LUTs + 12 REGs) per PFU for Avant.
You may also want to check non-SLICE type resource usage (e.g.,
EBR and DSP). These two blocks only appear at one out of multiple
rows, and the resources covered by region also depend on the anchor
location.
b. Enter your desired values for the Anchor and BBox fields.
You must enter a value within range.
c. In the Macro dropdown menu, you can select the predefined macro
instance from the pre-synthesis macro creation.
d. Enter your desired value for the Buffer Size field (optional).
Buffer Size gives PAR an extra room to do the routing. The routing is
confined within the macro region plus its surrounding ring. The top,
bottom, right, and left buffer size could be set differently.
Note:
The current buffer cannot be used to place and route other logic during
“reuse” if you select the “Exclusive” option.
The Buffer Size range is device density dependent. You must enter a
value within the range.
e. Click the Color option to change the color of the macro region
(optional).
5. Click OK.
6. Click the Save icon in Physical Designer.
The created macro regions are saved into a post-synthesis constraint
(.pdc) file.
The .pdc file contains the following information:
ldc_create_region – defines the placement region.
buffer_left/-buffer_right/-buffer_top/-buffer_bottom (optional) –
defines routing region.
This section lists the macros you have created and the total number of
resources used.
For Firm Macro, you can only export to Logical and Logical &
Physical with Place Info preservation levels after running Place
& Route Design.
Logic & Physical with Placement & Routing Info (Hard Macro)
After running Place & Route Design, you can export to Logical,
Logical & Physical with Place Info, and Logic & Physical with
Placement & Routing Info preservation levels.
You can also see the following fields in the Export Macro dialog box:
Macro Name – displays the name of the selected macro from the
Macro column in the left-hand pane.
Vendor – displays the vendor name.
Version – displays the Macro IP version, the default is always 1.0.
Support Radiant from Version to Version – displays the supported
maximum and minimum Radiant version. The maximum version could
be empty, but the minimum is the same as the current Radiant
version.
Testbench File – contains testbenches that allow you to do simulation
or evaluate the macro.
Document File – contains any document such as help, user guide, or
introduction file included in the macro.
Other Files – additional files to be exported with the macro.
Export to – default path where the macro package will be saved.
2. Choose the preservation level for each instance then click Export.
The exported Macros are saved as .ipm package files.
The macro .ipm package contains the following:
<macro_name>_.mac – contains general information of the macro
project.
<macro_name>_bb.v – synthesis header file of the macro project. It
is exported to define module interface for synthesis.
<macro_name>_bb_extra.v – synthesis header file exported with
additional information.
Note:
Currently, the Lattice Synthesis Engine (LSE) tool is not available for macro reuse.
Click Add.
8. Enable the Copy file to directory check box, then click Add.
You can see the imported .ipm files in the Input Files folder.
Open Physical Designer, the netlist shows the reused macro instances.
They contain information of the original region from the create stage.
12. Click the Reports tab and expand Map Reports in the Project Summary
pane.
Summary of Accomplishments
You have completed the Lattice Radiant Block-Based Design Tutorial . In this
tutorial, you have learned how to:
Create a macro block in Pre-Synthesis Constraint Editor.
Create a macro region in Physical Designer
Export Macro using three preservation levels
Logical (Logic Macro)
Logical & Physical with Place Info (Firm Macro)
Logic & Physical with Placement & Routing Info (Hard Macro)
View the macro IPM package content
Import existing .ipm files for macro reuse.
Change the preservation level value of .ipm files.
Recommended References
You can find additional information on the subjects covered by this tutorial in
the Radiant Help:
Entering the Design > Block-Based Design - Using Macro Blocks >
Creating a Macro Block
Entering the Design > Block-Based Design - Using Macro Blocks >
Creating a Macro Region
Entering the Design > Block-Based Design - Using Macro Blocks >
Reusing a Macro Block
Entering the Design > Block-Based Design - Using Macro Blocks >
Exporting Macro
Entering the Design > Block-Based Design - Using Macro Blocks > Macro
Usage Guidelines
The following table gives the revision history for this document.