0% found this document useful (0 votes)
16 views

DD Assignment 1

Ddco assignment

Uploaded by

ASHFAK Appu
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
16 views

DD Assignment 1

Ddco assignment

Uploaded by

ASHFAK Appu
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

K V G COLLEGE OF ENGINEERING, SULLIA, D.K.

DEPARTMENT OF COMPTER SCIENCE & ENGINEERING


ASSIGNMENT - I
Digital Design & Computer
Course Name: Course Code: BCS302
Organization
Semester/Section: III/A & B Date of Assignment: 14/10/24
Academic Year: 2024-25 Due date: 26/10/24
Faculty in-charge: Dr. Divya A K
Q.No. Questions Marks RBT CO
Simplify the following Boolean expressions to a minimum number of literals
1 10 L2 CO1
and draw logic diagrams of the circuits using i) basic gates, ii) only NAND
gates, iii) only NOR gates
a) aIbc + abcI + abc + aIbcI
b) (AI + C) (AI + CI) (A + B + CID)
c) ABC'D + A'BD + ABCD
d) y = u + x + xI(u + yI)
e) (a + b + cI)(aI bI + c)

2 Find the minimal SOP and minimal POS of the following Boolean function 10 L2 CO1
using K-Map:

i) f(a, b, c, d) = ∑m(6,7,9,10,13) + d(1,4,5,11)


ii) F(a,b,c,d) = ∏M(5,7,8,9,12) + d(0,6,10,15).

3 Simplify the following expressions using Karnaugh map: 10 L3 CO2


i) F(w,x,y,z) = ∑ m(1,5,7,9,10,13,15) + d(8,11,14)
ii) F(a,b,c,d) = ∏M(0,1,2,4,5,6,8,9,12,13,14)

4 A digital system is to be designed in which the month of the year is given as 10 L2 CO2
input in four bit form. The month January is represented as ‘0000’, February
as ‘0001’ and so on. The output of the system should be ‘1’ corresponding
to the input of the month containing 31 days or otherwise it is ‘0’. Consider
excess number in the input beyond ‘1011’ as don’t care conditions. For this
system of four variables (A,B,C,D) find the following:

i) Boolean expression in ∑ m and ∏M form.


ii) Using K-map simplify in SOP form.

Write the Verilog code for the circuit shown below using structural model,
5 10 L2 CO2
dataflow model, and behavioral model.
Design a combinational circuit that converts i) 4-bit binary number to 4-bit
6 10 L2 CO2
gray code, ii) 4-bit Gray code to 4-bit binary number.

Construct a BCD adder–subtractor circuit.


7 10 L2 CO2
Construct a 5-to-32-line decoder with four 3-to-8-line decoders with enable
8 10 L2 CO2
and a 2-to4-line decoder. Use block diagrams for the components.

A combinational circuit is specified by the following three Boolean


9 10 L2 CO2
functions:
i) F1(A, B, C) = ∑ m (1, 4, 6),
ii) F2(A, B, C) = ∑ m (3, 5)
iii) F3(A, B, C) =∑ m (2, 4, 6, 7)
Implement the circuit with a decoder constructed with NAND gates only and
NOR gates only.

Implement the following Boolean function with a multiplexer


10 10 L2 CO2
i) F (A, B, C, D) = ∑ m (0, 2, 5, 8, 10, 14)
ii) F (A, B, C, D) = ∑ m (2, 6, 11)

Prepared by Approved by

You might also like