Day Planner ?
Day Planner ?
Number
of
session Start End Start End
Date DAYS Elearn Topic Module No. (or) Name per day Time Time Time Time Review
Logic Gates
2-May- and Boolean 9:00 11:00 3:30 5:00
2024 DAY 5 Algebra Assignment-2 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
Logic Gates
3-May- and Boolean 9:00 11:00 3:30 5:00
2024 DAY 6 Algebra Assignment-2 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
Review 1-number
Combinational- system & boolean
7-May- Encoders, 9:00 11:00 3:30 5:00 algebra
2024 DAY 8 Decoders Assignment-3 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM 12:00 PM to 1:00 PM
Combinational-
8-May- Mutiplexers, 9:00 11:00 3:30 5:00
2024 DAY 9 Demultiplexers Assignment-3 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
Sequential -
Flipflops, Review 2-
10-May- Flipflop 9:00 11:00 3:30 5:00 Combinational circuits
2024 DAY 11 conversions Assignment-4 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM 12:00 PM to 1:00 PM
Sequential -
13-May- Registers, 9:00 11:00 3:30 5:00
2024 DAY 12 Counter basics Assignment-5 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
Sequential -
Counter design,
14-May- Shift register 9:00 11:00 3:30 5:00
2024 DAY 13 counters Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
Sequential -
Counter
design, Shift
15-May- register 9:00 11:00 3:30 5:00
2024 DAY 14 counters Assignment-5 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
FSM- Practical
17-May- applications, 9:00 11:00 3:30 5:00
2024 DAY 16 Arbiter FSM Assignment-6 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
FSM- Practical
20-May- applications, 9:00 11:00 3:30 5:00
2024 DAY 17 Arbiter FSM Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
FSM- Practical
21-May- applications, 9:00 11:00 3:30 5:00
2024 DAY 18 Arbiter FSM Asssignment-7 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
Glitches and
Hazards,
Memories:
classification ,
22-May- composition of 9:00 11:00 3:30 5:00
2024 DAY 19 memories Asssignment-7 Blended VLSI - M2 - Advanced Digital Design 2 AM AM PM PM
Review 4 -
24-May- 9:30 12:00 FSM,memories,glitches
2024 DAY 21 Linux Linux Labs Blended VLSI - M4 - Linux 1 AM PM 12:00 PM to 1:00 PM
30-May- Lab1 assignments 9:30 10:30 11:00 12:00 Lab1 review during
2024 DAY 25 Operators - Lab1 review Blended VLSI - M5 - Verilog HDL 2 AM AM AM PM mentor session
4-Jun- Lab3 - Lab2 9:30 10:30 11:00 12:00 Lab2 review during
2024 DAY 28 Processes review Blended VLSI - M5 - Verilog HDL 2 AM AM AM PM mentor session
Compiler
7-Jun- directives & Lab4 assignments 9:30 10:30 11:00 12:00
2024 DAY 31 system tasks - Lab4 review Blended VLSI - M5 - Verilog HDL 2 AM AM AM PM
12-Jun- Synthesis Lab5 assignments 9:30 10:30 11:00 12:00 Lab5review during
2024 DAY 34 guidelines - Lab5 review Blended VLSI - M5 - Verilog HDL 2 AM AM AM PM mentor session
19-Jun-
2024 DAY 39 - Blended VLSI - M5 - Verilog HDL
25-Jun-
2024 DAY 43 Design Test Register 1.5 Hours Design Test
27-Jun-
2024 DAY 45 Coding Test 1.5 Hours Coding Test
10-Jul- Advanced Advanced verilog Blended VLSI - M6 - Advanced Verilog & 2:00 3:30 BPD batches will
2024 DAY 54 verilog assignments Codecoverage 1 PM PM seperate
Advanced
verilog Advanced verilog
11-Jul- assignments - assignments - Blended VLSI - M6 - Advanced Verilog & 2:00 3:30
2024 DAY 56 Review1 Review1 Codecoverage 1 PM PM