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HPC Syllabus

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HPC Syllabus

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HONORS SUBJECTS IN CSE

SYLLABUS OF
High Performance Computing
Course Objectives:
The objective of the subject is to
 Introduce the basic concepts related to HPC architecture and parallel computing.
 To discuss various computational techniques for studying soft matter systems.
 To understand the methods to extract maximum performance in a multicore, shared memory
execution environment processor.
 To understand Symmetric and Distributed architectures.
 To understand the implementation of large scale parallel programs on tightly coupled parallel
systems using the message passing paradigm.
Course Outcomes:
After the completion of the course, student will be able to:
 Design, formulate, solve and implement high performance versions of standard single
threaded algorithms.
 Demonstrate the architectural features in the GPU and MIC hardware accelerators.
 Design programs to extract maximum performance in a multicore, shared memory execution
environment processor.
 Develop and deploy large scale parallel programs on tightly coupled parallel systems using
the message passing paradigm.
 Analyze Symmetric and Distributed architectures.
Syllabus:
Graphics Processing Units: Introduction to Heterogeneous Parallel Computing, GPU architecture,
Thread hierarchy, GPU Memory Hierarchy.
GPU Programming: Vector Addition, Matrix Multiplication algorithms. 1D, 2D, and 3D Stencil
Operations, Image Processing algorithms – Image Blur, Gray scaling. Histogramming, Convolution,
Scan, Reduction techniques.
Many Integrated Cores: Introduction to Many Integrated Cores. MIC, Xeon Phi architecture,
Thread hierarchy, Memory Hierarchy, Memory Bandwidth and performance considerations.
Shared Memory Parallel Programming: Symmetric and Distributed architectures, OpenMP
Introduction, Thread creation, Parallel regions. Work sharing, Synchronization.
Message Passing Interface: MPI Introduction, Collective communication, Data grouping for
communication.

Text Books:
1. Programming Massively Parallel Processors A Hands-on Approach, 3e, Wen-Mei W Hwu,
David B Kirk and Morgan Kaufmann-2019
2. Intel Xeon Phi Coprocessor Architecture and Tools, Rezaur Rahman, Apress Open, 1st edition-
2013
3. Using OpenMP, Barbara Chapman, Gabriele Jost, Rudd Vander Pas, MIT Press, 2008

Reference books:
1. “A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures” by
Dunn Ian N, 2003

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