UNIVERSITY OF BUEA FACULTY OF SCIENCE
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DEPARTMENT OF: Computer Science
COURSE OUTLINE FOR: CSC303 2021_2022
COURSE TITLE: Computer organization and architecture
CREDIT VALUE: 6
VENUE FOR LECTURE: Amphi 150 A Friday 13:00-15:00 and CBI 150 B Tuesday 7:00-9:00
VENUE FOR TUTORIAL: Class Room Block I 50 F Monday 13:00-15:00 (online)
NAME(S) OF COURSE INSTRUCTOR AND OFFICE HOURS: Nyanga B.Y. and Tabo D.
WEEKLY TOPICS ACTIVITY
L T P
Course Preliminaries:
Course overview, syllabus, textbooks; course delivery.
Discussions on projects. Project details
Recall: Computer structure and organization
Role of General Purpose Computers
Units, I/O, Processor
1 Computer Architecture-Instruction Set Architecture(ISA) and Machine Organization (MO)
Discussions on ISA, and how computers are designed
The Von Neumann Architecture:
interfaces, I/O, etc
Different subsytems and Function
Bus Organisation
2 Assembly Level Machine Organization
Overview of Assembly and Machine
Instruction sets and types (data manipulation, control, I/O);
RISC and CISC and example instruction sets.
3 Assembly/machine language programming:
Instruction formats; Addressing modes;
Subroutine call and return mechanisms;
I/O and interrupts;
4 Assembly/machine language programming:
Heap vs. Static vs. Stack vs.
Code segments;
Shared memory multiprocessors/multicore organization;
Introduction to SIMD vs. MIMD and the Flynn Taxonomy
5 Test 1:
6 Digital Machines:
Simple logic gates, logical expressions,
Boolean logic simplification (Karnaugh maps) in building/analyzing: combinational circuits.
7 Combinational circuits (continue)
Sequential Logic circuits,
Clocks, State, Sequencing.
8 Memory system organization and architecture:
Storage systems and their technology.
Characteristics of memory (e.g. static/dynamic, destructive read, random access, capacity);
Memory hierarchy: importance of temporal and spatial locality.
Main memory organization and operations.
Latency, cycle time, bandwidth, and interleaving.
Cache memories (address mapping, block size, replacement and store policy)
9 Functional Organization:
Implementation of simple data paths,
Introduction of instruction pipelining, hazard detection and resolution.
Control unit:
Hardwired realization vs. microprogrammed realization.
Instruction pipelining.
Introduction to instruction-level parallelism (ILP)
10 Multiprocessor
Cache consistency/Using the memory system for inter-core synchronization/atomic memory operations.
Virtual memory (page table, TLB).
Fault handling and reliability.
Error coding, data compression, and data integrity
11 Circuit technologies:
PLA, CMOS, etc.; Arithmetic circuits: adders (serial, parallel, etc.);
Evaluation Technology trends.
CPI equation (Execution time = # of instructions * cycles/instruction* time/cycle) as tool for
understanding tradeoffs in the design of instruction sets;
Processor pipelines
12 Test 2.
13 General Revision
Course Instructor: Course Master:
HEAD OF DEPARTMENT
NOTES: L= Lecture, T = Tutorial, P= Practicals
RECOMMENDED TEXT
1. Introduction to Computer Architecture and Organisation 2nd Ed by Harold Lorin
2. Computer Organisation and Architecture by Morris Mano
REFERENCES (Web) www.freebookcentre.net
www.freetechbooks.com
COURSE EVALUATION: Continuous Assessment (30%: two tests and/or projects/assignments) and End-of Semester Examination (70%)
Course Objectives: The main objective of this course is to introduce the students to the operations of a digital computer, Hardware components and their basic
building block. Students will be introduced to the electronic components of the different hardware components of a computer system and how they are
programmed to function.
