Microcontroller Applications

MTE E05

Lecture 2

Dr. Emad Badry

 Criteria for Choosing a Microcontroller

Meeting the computing needs of the task at hand efficiently and cost effectively
• Speed
• Packaging
• Power consumption
• The amount of RAM and ROM on chip
• The number of I/O pins and the timer on chip
• How easy to upgrade to higher-performance or lower power-consumption versions
• Cost per unit
• Availability of software development tools, such as compilers, assemblers, and debuggers.
• Wide availability and reliable sources of the microcontroller
The 8051 family has the largest number of diversified (multiple source) suppliers
➢ Intel (original)
➢ Atmel
➢ Philips/Signetics
➢ AMD
➢ Infineon (formerly Siemens)
➢ Matra
➢ Dallas Semiconductor/Maxim
 8051 Families

Intel introduced 8051, referred as MCS-51, in 1981. The 8051 is an 8-bit processor
The 8051 had
➢ 128 bytes of RAM
➢ 4K bytes of on-chip ROM
➢ Two timers
➢ One serial port
➢ Four I/O ports, each 8 bits wide
6 interrupt sources

❑ The 8051 became widely popular after

allowing other manufactures to make
and market any flavor of the 8051, but
remaining code-compatible.
8751 microcontroller has UV-EPROM. UV-EPROM eraser
takes 20 min to erase.

AT89C51 from Atmel Corporation has Flash (erase before

write) memory
 Hardware Connection

8051 family members Have 40 pins dedicated for various functions such as I/O, -RD, -WR, address, data, and interrupts.
Come in different packages such as DIP(dual in-line package), QFP(quad flat package).

DIP QFP
Some companies provide a 20-pin version of the 8051 with a reduced number of I/O ports for less demanding
applications.
 The 8051 has an on-chip oscillator but requires an external clock to run it. A quartz crystal oscillator is connected to
inputs XTAL1 (pin19) and XTAL2 (pin18). The quartz crystal oscillator also needs two capacitors of 30 pF value.

If you use a frequency source other than a crystal oscillator, such as a

TTL oscillator, it will be connected to XTAL1 while XTAL2 is left
unconnected.
RESET pin is an input and is active high (normally low). Upon applying a high pulse to this pin, the microcontroller will
reset and terminate all activities. This is often referred to as a power-on reset

In order for the RESET input to be effective, it must have a

minimum duration of 2 machine cycles. In other words, the high
pulse must be high for a minimum of 2 machine cycles before it
is allowed to go low.
EA, “external access’’, is an input pin and must be connected to Vcc or GND. For the 8051 family members all come with
on-chip ROM to store programs, -EA pin is connected to Vcc. For the 8031 and 8032 family members do no have on-chip
ROM, so code is stored on an external ROM and is fetched by 8031/32. In this case, -EA pin must be connected to GND to
indicate that the code is stored externally.

The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins.

All the ports upon RESET are configured as input, ready to be used as input ports
To reconfigure it as an input, a 1 must be sent to the port.

Port 0 is also designated as AD0-AD7, allowing it to be used for both address and data, when connecting an 8051/31
to an external memory, port 0 provides both address and data. The 8051 multiplexes address and data through port 0
to save pins.
ALE indicates if P0 has address or data
▪ When ALE=0, it provides data D0-D7
▪ When ALE=1, it has address A0-A7
P0
It can be used for input or output, each pin must be connected externally to a 10K ohm pull-up resistor, this is due to the
fact that P0 is an open drain, unlike P1, P2, and P3
 P2
In 8051-based systems with no external memory connection, both P1 and P2 are used as simple I/O. In 8031/51-based
systems with external memory connections, Port 2 must be used along with P0 to provide the 16-bit address for the external
memory.
➢ P0 provides the lower 8 bits via A0 – A7
➢ P2 is used for the upper 8 bits of the 16-bit address, designated as A8 – A15, and it cannot be used for I/O

P3
Port 3 can be used as input or output and does not need any
pull-up resistors. Port 3 has the additional function of providing
some extremely important signals.
 Registers

The most widely used registers of the 8051 are A (accumulator), B, R0, R1, R2, R3, R4, R5, R6, R7, DPTR (data pointer),
and PC (program counter).

All of the above registers are 8 bits, except DPTR and the program counter.
 PSW (program status word) register

The PSW register is an 8-bit register. It is also referred to as the flag register. Although the PSW register is 8 bits wide, only
6 bits of it are used by the 8051. The two unused bits are user-definable flags.
 ROM memory map in the 8051 family

Some family members have only 4K bytes of on-chip ROM (e.g., 8751, AT8951) and some, such as the AT89C52, have 8K
bytes of ROM.

The point to remember is that no member of the 8051 family can access more than 64K bytes of opcode since the program
counter in the 8051 is a 16-bit register (0000 to FFFF address range).

It must be noted that while the first location

of program ROM inside the 8051 has the
address of 0000, the last location can be
different depending on the size of the ROM
on the chip.
 REGISTER BANKS AND STACK

There are 128 bytes of RAM in the 8051 (some members, notably the 8052, have 256 bytes of RAM). The 128 bytes of
RAM inside the 8051 are assigned addresses 00 to 7FH. They can be accessed directly as memory locations.

These 128 bytes are divided into three different groups as follows
➢ A total of 32 bytes of RAM are set aside for the register banks and stack. These 32 bytes are divided into four banks of
registers in which each bank has eight registers, R0–R7.

➢ RAM locations from 0 to 7 are set aside for bank 0 of R0–R7 where R0 is RAM location 0, R1 is RAM location 1, R2 is
location 2, and so on, until memory location 7.

➢ The second bank of registers R0–R7 starts at RAM location 08 and goes to location 0FH. The third bank of R0–R7
starts at memory location 10H and goes to location 17H. Finally, RAM locations 18H to 1FH are set aside for the
fourth bank of R0–R7.

Bank 1 uses the same RAM space as the stack.

We can switch to other banks by use of the PSW register. Bits D4 and D3 of the
PSW are used to select the desired register bank
The register used to access the stack is called the SP (stack pointer) register.

The storing of a CPU register in the stack is called a PUSH. SP is pointing to the last used location of the stack. As we push
data onto the stack, the SP is incremented by one.

Loading the contents of the stack back into a CPU register is called a POP. With every pop, the top byte of the stack is copied
to the register specified by the instruction and the stack pointer is decremented once.
Example
Example
MOV instruction

Values can be loaded directly into any of

registers A, B, or R0–R7. However, to indicate
that it is an immediate value it must be
preceded with a pound sign (#). This is shown
next.
ADD instruction

Source operand can be either a register or immediate data, but the destination must always be register A

“ADD R4, A” and “ADD R2, #12H” are invalid since A must be the destination of any arithmetic operation
 Structure of Assembly Language

❑ An Assembly language program consist of a series of lines of Assembly language instructions

❑ It deals directly with the internal structure of the CPU.
❑ a mnemonic : the commands to the CPU, telling it what those to do with those items. optionally followed by
one or two operands the data items being manipulated.

A given Assembly language program is a series of statements, or lines

➢ Assembly language instructions Tell the CPU what to do

➢ Directives (or pseudo-instructions) Give directions to the assembler

 Steps to Create a Program

❑ The lst (list) file, which is optional, is very useful to the

programmer. It lists all the opcodes and addresses as well as
errors that the assembler detected. The programmer uses the
lst file to find the syntax errors or debug
 Program Counter

❑ As the CPU fetches the opcode from the program ROM, the program counter is increasing to point to the next
instruction.
❑ The first opcode is burned into ROM address 0000H, since this is where the 8051 looks for the first instruction when
it is booted.
❑ After the program is burned into ROM, the opcode and operand are placed in ROM memory location starting at
0000.