Unit 3
Unit 3
Syllabus:
The CPU control unit is a component of the computer’s CPU (central processing unit)
that directs the processor’s operation. John von Neumann included it in his Von
Neumann Architecture. The control unit’s job is to instruct the computer’s
arithmetic/logic unit, memory, and input and output devices on how to respond to the
instructions supplied to the processor.
The control unit fetches internal program instructions from the main memory to the
processor instruction register, and it generates a control signal based on the contents of
this register to supervise the execution of these instructions.
A control unit receives data from the user and translates it into control signals that are
subsequently delivered to the central processor. The processor of the computer then
instructs the associated hardware on what operations to do. Because CPU architecture
differs from manufacturer to manufacturer, the functions performed by a control unit in
a computer are dependent on the CPU type. The following are some examples of
devices requiring a control unit:
OR
It coordinates the flow of data out of, into, and between the various subunits of
a processor.
It understands commands and instructions.
It regulates the flow of data within the processor.
It accepts external commands or instructions, which it turns into a series of
control signals.
It is in charge of a CPU’s multiple execution units (such as ALUs, data buffers,
and registers).
It also performs a variety of activities, including fetching, decoding, handling
execution, and storing results.
The figure shows a 2-bit sequence counter, which is used to develop control signals.
The output obtained from these signals is decoded to generate the required signals in
sequential order.
The hard-wired control consists of a combinational circuit that outputs desired controls
for decoding and encoding functions. The instruction that is loaded in the IR is decoded
by the instruction decoder. If the IR is an 8-bit register, then the instruction decoder
generates 28 (256) lines.
Inputs to the encoder are given from the instruction step decoder, external inputs, and
condition codes. All these inputs are used and individual control signals are generated.
The end signal is generated after all the instructions get executed. Furthermore, it results
in the resetting of the control step counter, making it ready to generate the control step
for the next instruction.
A control unit whose binary control values are saved as words in memory is called a
microprogrammed control unit.
Each bit that forms the microinstruction is linked to one control signal. When the bit is
set, the control signal is active. When it is cleared the control signal turns inactive.
These microinstructions in a sequence can be saved in the internal ’control’ memory.
The control unit of a microprogram-controlled computer is a computer inside a
computer.
There are the following steps followed by the microprogrammed control are −
It can execute any instruction. The CPU should divide it down into a set of
sequential operations. This set of operations are called microinstruction. The
sequential micro-operations need the control signals to execute.
Control signals saved in the ROM are created to execute the instructions on the
data direction. These control signals can control the micro-operations concerned
with a microinstruction that is to be performed at any time step.
The address of the microinstruction is executed next is generated.
The previous 2 steps are copied until all the microinstructions associated with
the instruction in the set are executed.
2. Cost of
More costlier. Cheaper.
Implementation
Not flexible to
accommodate new More flexible to accommodate
3. Flexibility system specification or new system specification or new
new instruction redesign instruction sets.
is required.
ATTRIBUTES HARDWIRED MICROPROGRAMMED
CONTROL UNIT CONTROL UNIT
4. Ability to
Difficult to handle Easier to handle complex
Handle Complex
complex instruction sets. instruction sets.
Instructions
7. Instruction set
Small Large
of Size
8. Control
Absent Present
Memory
9. Chip Area
Less More
Required
Occurrence of error is
10. Occurrence Occurrence of error is less
more