EEPROM or

E2PROM By,
Nishma Rakshak
(electrically erasable programmable
read-only memory)
Overview
● It is a type of non-volatile memory.
● It is used in computers, usually integrated in microcontrollers such as smart cards and
remote keyless systems, or as a separate chip device, to store relatively small amounts of
data by allowing individual bytes to be erased and reprogrammed.

● EEPROMs are organized as arrays of floating-gate transistors.

● EEPROMs can be programmed and erased in-circuit, by applying special programming
signals.
● Originally, EEPROMs were limited to single-byte operations, which made them slower,
but modern EEPROMs allow multi-byte page operations.

● Flash memory is a type of EEPROM designed for high speed and high density

Nishma Rakshak
 Programming & Erasing process

Old EEPROMs are based on avalanche breakdown-based hot-carrier injection with high reverse
breakdown voltage. But FLOTOX theoretical basis is Fowler–Nordheim tunneling hot-carrier injection
through a thin silicon dioxide layer between the floating gate and the wafer. In other words, it uses a
tunnel junction.

Nishma Rakshak
 Electrical interface

Serial bus devices : Parallel bus devices :

The common serial interfaces are SPI, I²C, Microwire, UNI/O, and Parallel EEPROM devices typically have an 8-bit
1-Wire. These use from 1 to 4 device pins and allow devices to use data bus and an address bus wide enough to cover
packages with 8 pins or less. the complete memory. Most devices have chip select
and write protect pins. Some microcontrollers also
A typical EEPROM serial protocol consists of three phases: OP-code have integrated parallel EEPROM.
phase, address phase and data phase. The OP-code is usually the first 8
bits input to the serial input pin of the EEPROM device (or with most I²C
devices, is implicit); followed by 8 to 24 bits of addressing, depending on
the depth of the device, then the read or write data.

Operation of a parallel EEPROM is simple and fast when compared to serial EEPROM, but these
devices are larger due to the higher pin count (28 pins or more) and have been decreasing in
popularity in favor of serial EEPROM or flash.
Nishma Rakshak
Failure modes : 2 failure modes

During rewrites, the gate oxide in the During storage, the electrons injected into the
floating-gate transistors gradually accumulates floating gate may drift through the insulator,
trapped electrons. The electric field of the especially at increased temperature, and cause
trapped electrons adds to the electrons in the charge loss, reverting the cell into erased
floating gate, lowering the window between state. The manufacturers usually guarantee data
threshold voltages for zeros vs ones. After
retention of 10 years or more.
sufficient number of rewrite cycles, the
difference becomes too small to be recognizable,
the cell is stuck in programmed state, and
endurance failure occurs. The manufacturers
usually specify the maximum number of rewrites
being 1 million or more.
Nishma Rakshak
Firmware EEPROM Mem cell
Each memory cell has a floating-gate transistor whose
threshold voltage determines its state (0 or 1).

EEPROM chips differ from Flash memory in that they

do not require explicit erase operations before writing

Write operation initiated Cell Reset:

from FW
Before writing, the target memory cell is
erased (reset to a known state, usually all 1s).

A reverse voltage (opposite to programming) is

applied to the transistor gate, allowing trapped
electrons to escape from the floating gate.
Verification:

After erasing, the EEPROM verifies that the

cell has returned to the default state.

Write operation is performed

I2C, SPI, or others

Erase Operation Nishma Rakshak

 Firmware EEPROM Mem cell
Each memory cell has a floating-gate transistor whose
threshold voltage determines its state (0 or 1).
Write operation
Address Decoding:
initiated from FW The EEPROM decodes this
Memory address address to locate the target
memory cell.

Cell Programming:
A high voltage is applied to the transistor gate,
causing electrons to tunnel through an insulating
The data to be written is
layer and get trapped in the floating gate.
received by the EEPROM.

The trapped electrons alter the threshold voltage

of the cell, representing a binary "0" or "1".
Write Completion:

Completion signal The EEPROM performs an internal verification

step to ensure the written data matches the
intended data.

I2C, SPI, or others

5 - 10 ms delay
Write Operation Nishma Rakshak
 Firmware EEPROM Mem cell
Each memory cell has a
floating-gate transistor whose
Read operation
Address Decoding: threshold voltage determines its
initiated from FW The EEPROM decodes this
address to locate the target state (0 or 1).
Memory address
memory cell.

Charge Sensing: A sensing circuit applies a small voltage to the

transistor and measures the current flow.

If the threshold voltage is high (indicating trapped

electrons), the cell is read as "0".
If the threshold voltage is low, the cell is read as "1".

Data Output:

The read data is transferred to the

Sent back to the firmware.
output buffer

I2C, SPI, or others

Typically microseconds delay

Read Operation Nishma Rakshak
Difference between EEPROM and Flash
Memory

● Flash memory is a type of EEPROM ● EEPROM is generally used to describe

designed for high speed and high density, non-volatile memory with small erase
at the expense of large erase blocks blocks (as small as one byte) and a
(typically 512 bytes or larger) and ● long lifetime (typically 1,000,000 cycles).
● limited number of write cycles (often ● EEPROM occupies more die area because
10,000). each cell usually needs a read, a write,
● flash memory occupies less die area and an erase transistor
because the erase circuits are shared by
large blocks of cells (often 512×8).

Nishma Rakshak
 Difference between EEPROM and Flash and
EPROM
Type Inject electrons onto gate Duration Remove electrons from Duration/mode
gate
(mostly interpreted as
bit=0) (mostly interpreted as
bit=1)

EEPROM field electron emission 0.1—5 ms, bytewise field electron emission 0.1—5 ms, blockwise

NOR flash hot-carrier injection 0.01—1 ms field electron emission 0.01—1 ms, blockwise
memory

EPROM hot-carrier injection 3—50 ms, bytewise UV light 5—30 minutes, whole chip

Nishma Rakshak