Important Questions - Long Answers - Electronics
Important Questions - Long Answers - Electronics
Unit I
Operation:
1) During the positive half-cycle of secondary voltage, the end A of the
secondary winding becomes positive and end B negative. This makes the
diode D1 forward biased and diode D2 reverse biased. Therefore, diode
D1 conducts while diode D2 does not. The conventional current flow is
through diode D1, load resistor RL and the upper half of secondary
winding as shown by the dotted arrows.
2) During the negative half-cycle, end A of the secondary winding
becomes negative and end B positive. Therefore, diode D2 conducts
while diode D1 does not. The conventional current flow is through diode
D2, load RL and lower half winding as shown by solid arrows.
3) Current in the load RL is in the same direction for both half-cycles of
input a.c. voltage. Therefore, d.c. is obtained across the load RL.
Answer:
Answer:
Construction:
The PN Junction of LED is surrounded by a transparent, hard plastic epoxy
resin hemispherical shaped shell inorder to protect it from vibration and
shock. LEDs are made by using the following semiconductor materials:
Gallium Arsenide(GaAs), Aluminium Gallium Arsenide(AlGaAs), Gallium
Arsenic Phosphide(GaAsP), etc. The symbol of LED is shown below.
Working:
When it is forward biased, the potential barrier gets reduced and the
electrons and holes combine at the depletion layer, the recombination
energy is released in the form of photons.
Answer:
Under reverse bias, due to Zener effect, a sharp breakdown occurs and
causes the voltage remains constant after breakdown. This voltage is
called Zener breakdown voltage, which is served as reference voltage.
Hence, the Zener diode can be used as voltage regulator.
The circuit for voltage regulator using Zener diode is shown below.
In the circuit, Zener diode is reverse biased. As long as the input voltage
does not fall below Zener breakdown voltage VZ, the voltage across the
diode is constant and hence the load voltage is also constant.
Answer:
Vm
We know that Idc = Im/π and Im = R
L +Ri
Vm
Therefore Vdc = π(RL+Ri)
RL
Vdc 50
Vm = RL
x π(RL + Ri ) = 800
x 825π
Vm = 161.9 V
b) A power supply A delivers 10V dc with a ripple of 0.5V r.m.s.
while the power supply B delivers 25V dc with a ripple of 1mV
r.m.s. Which is better power supply ?
Answer:
The lower the ripple factor of a power supply, the better it is.
1 1
= 1+
� �
1 1
−1=
� �
1−� 1
�
=�
�
Hence β =
1−�
Solution:
Apply KVL to the output loop in the above circuit, we get
VCC = ICRC + VCE
VCE = VCC - IC RC
W.K.T IC = β IB
IB = (VBB - VBE)/RB
IB = 0.43 mA
R1 X R2
RTℎ = RB =
(R1 +R2 )
In the Loop BDGEB,
Vth = RBIB + VBE + (IC+IB)RE
∂IB RE
∂IC
= − (R
B +RE )
∂IC (β+1)
S = = ∂I
∂ICO 1−β B
∂IC
(β+1)(RB +RE)
S =
RE (β+1) + RB
Solution:
Given VCC = 10V, VBB = 5V, RB = 20KΩ, RC = 0.4 KΩ , RE = 0.6 KΩ, β= 100
and VBE(on) = 0.7 V
VBB −VBE(on)
IB =
RB +(1+β)RE
5−0.7
IB = = 53.35 X 10−6 = 53.35 μA
20 X 103 +101 X0.6 X103
Unit III
1. a) Draw the practical circuit of CE amplifier and explain the various
elements in the circuit.
Answer:
The CE amplifier circuit is shown below
Class A amplifier
Class B amplifier
Let Af be the overall gain (gain with the feedback) of the amplifier. Then
Af can be defined as
Unit V
1. Explain the working of full adder circuit with truth table and circuit
diagram.
Answer:
A combinational logic circuit that can add two binary digits (bits) and a
carry bit, and produces a sum bit and a carry bit as output is known as
a full-adder. A full adder circuit adds three binary digits, where two are
the inputs and one is the carry forwarded from the previous addition.
The block diagram and circuit diagram of the full adder are shown in
Figure.
Hence, the circuit of the full adder consists of one EX-OR gate, three
AND gates and one OR gate, which are connected together as shown in
the circuit diagram.
Hence, from the truth table, it is clear that the sum output of the full
adder is equal to 1 when only 1 input is equal to 1 or when all the inputs
are equal to 1. While the carry output has a carry of 1 if two or three
inputs are equal to 1.
2. Explain AND, OR, NOT, NAND, NOR, EX-OR and EX-NOR logic gates
with their truth tables.
Answer:
A logic gate is a device that acts as a building block for digital circuits.
They perform basic logical functions that are fundamental to digital
circuits. There are seven basic logic gates: AND, OR, NOT, NAND, NOR,
XOR and XNOR.
AND Gate:
The AND gate is named so because the gate acts in the same way as the
logical "and" operator. The following illustration and table show the
circuit symbol and logic combinations for an AND gate.
OR Gate:
The OR gate gets its name from behaving like the logical inclusive "or".
The following illustration and table show the circuit symbol and logic
combinations for an OR gate.
The output is 1 if one or both of the inputs are 1. If both inputs are 0,
then the output is 0.
NOT Gate:
A logical inverter, sometimes called a NOT gate to differentiate it from
other types of electronic inverter devices, has only one input. A NOT
gate reverses the logic state. If the input is 1, then the output is 0. If the
input is 0, then the output is 1.
The following illustration and table show the circuit symbol and logic
combinations for NOT gate.
NAND Gate:
The NAND (Negated AND) gate operates as an AND gate followed by a
NOT gate. It acts in the manner of the logical operation "and" followed
by negation. The output is 0 if both inputs are 1. Otherwise, the output is
1. It is easy to visualize it is that a NAND gate inverts the output of an
AND gate.
The following illustration and table show the circuit symbol and logic
combinations for NAND gate.
NOR Gate:
The NOR (Negated OR) gate is a combination OR gate followed by an
inverter. Its output is 1 if both inputs are 0. Otherwise, the output is 0.
The following illustration and table show the circuit symbol and logic
combinations for NOR gate.
X-OR Gate:
The XOR (exclusive-OR) gate acts in the same way as the logical
"either/or." The output is 1 if either, but not both, of the inputs are 1.
The output is 0 if both inputs are 0 or if both inputs are 1.
The following illustration and table show the circuit symbol and logic
combinations for XOR gate.
XNOR Gate:
The XNOR (exclusive-NOR) gate is a combination of an XOR gate
followed by an inverter. Its output is 1 if the inputs are the same and 0 if
the inputs are different.
The following illustration and table show the circuit symbol and logic
combinations for XNOR gate.
Demultiplexer:
De-Multiplexer is a combinational circuit that performs the reverse
operation of Multiplexer. It has single input, ‘n’ selection lines and
maximum of 2n outputs. De-Multiplexer is also called as De-Mux.
Example: 1x4 De-Multiplexer
1x4 De-Multiplexer has one input I, two selection lines, s1 & s0 and four
outputs Y3, Y2, Y1 &Y0. The block diagram of 1x4 De-Multiplexer is
shown in the following figure.
This envelope detector consists of a diode and low pass filter. The low
pass filter contains a parallel combination of the resistor and the
capacitor.
AM wave is given as input to the detector as shown in the circuit
diagram.
During the positive half cycle of AM wave, the diode becomes forward
biased and conducts. Then the capacitor charges to the peak value of
AM wave.
When the value of AM wave is less than this value, the diode will be
reverse biased. Thus, the capacitor will discharge through resistor R till
the next positive half cycle of AM wave.
When the value of AM wave is again greater than the capacitor voltage,
the diode conducts and the process will be repeated.
We should select the component values in such a way that the capacitor
charges very quickly and discharges very slowly. As a result, we will get
the capacitor voltage waveform same as that of the envelope of AM
wave, which is almost similar to the modulating signal.
Modulation index: β = 5
Unit VIII
1. Explain address and data bus, control and status signal and
applications of microprocessors.
Answer:
Diagram to represent bus organization system of 8085 Microprocessor is
shown below.
Bus is a group of conducting wires which carries information. The 8085
microprocessor has a 16-bit address bus, an 8-bit data bus, and various
control signals that are used to manage data transfer and other
operations.
Address Bus:
The address bus is used to specify the memory location or device with
which the microprocessor wants to communicate. It is 16 bits wide,
which allows the microprocessor to address up to 64K bytes of memory.
The address bus is unidirectional, which means that data can only flow in
one direction from the microprocessor to the addressed device.
Data Bus:
The data bus is used to transfer data between the microprocessor and
other devices. It is 8 bits wide, which means that data can be transferred
in byte-sized chunks. The data bus is bidirectional, which means that
data can flow in either direction between the microprocessor and other
devices.
Control and Status Signals:
In addition to the address and data buses, the 8085 microprocessor has
various control signals that are used to manage data transfer and other
operations.
The control bus is a bidirectional bus that is used to carry control signals
between the microprocessor and other components such as memory
and I/O devices.
There are 3 control signal and 3 status signals. Three control signals are
RD, WR & ALE.
RD − This signal indicates that the selected IO or memory device is to be
read and is ready for accepting data available on the data bus.
WR − This signal indicates that the data on the data bus is to be written
into a selected memory or IO location.
ALE − It is a positive going pulse generated when a new operation is
started by the microprocessor. When the pulse goes high, it indicates
address. When the pulse goes down it indicates data.
Three status signals are IO/M, S0 & S1.
IO/M - This signal is used to differentiate between IO and Memory
operations, i.e. when it is high indicates IO operation and when it is low
then it indicates memory operation.
S1 & S0 - These signals are used to identify the type of current operation.
The bits in the Flag register are used to indicate whether the result of an
operation is zero, positive, negative, or if there was a carry or borrow
during the operation.
Carry Flag: This flag is set whenever there has been a carry out of, or a
borrow into, the higher order bit of the result.
Parity flag: This flag is set whenever the result has even parity, an even
number of 1 bits. If parity is odd, PF is cleared.
Auxiliary carry flag: This flag is set whenever there has been a carry out
of the lower nibble into the higher nibble or a borrow from higher nibble
into the lower nibble of an 8 bit quantity, else AF is reset.
Zero flag: This flag is set, when the result of operation is zero, else it is
reset.
Sign flag: This flag is set, when MSB (Most Significant Bit) of the result is
1. Since negative binary numbers are represented in the 8085 CPU in
standard two’s complement notation, SF indicates sign of the result.