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Important Questions - Long Answers - Electronics

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Important Questions - Long Answers - Electronics

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khushianand183
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Important Questions - Long Answers - Electronics

Unit I

1. a) Explain Centre-tapped full wave rectifier with circuit diagram and


waveform.
Answer:
Rectifier converts bidirectional voltage into unidirectional voltage.
Circuit diagram:

Operation:
1) During the positive half-cycle of secondary voltage, the end A of the
secondary winding becomes positive and end B negative. This makes the
diode D1 forward biased and diode D2 reverse biased. Therefore, diode
D1 conducts while diode D2 does not. The conventional current flow is
through diode D1, load resistor RL and the upper half of secondary
winding as shown by the dotted arrows.
2) During the negative half-cycle, end A of the secondary winding
becomes negative and end B positive. Therefore, diode D2 conducts
while diode D1 does not. The conventional current flow is through diode
D2, load RL and lower half winding as shown by solid arrows.
3) Current in the load RL is in the same direction for both half-cycles of
input a.c. voltage. Therefore, d.c. is obtained across the load RL.

The input and output waveforms of full wave rectifier are


b) Compare half wave, centre-tapped and bridge full wave rectifier.

Answer:

2. a) Explain the construction and working of a Light Emitting


Diode.

Answer:

It is a semiconductor device which emits either visible light or invisible


infrared light when forward biased. LED emits light under forward bias by
the process called electroluminiscence. It is the process by which the
energy is released in the form of light when free electrons in conduction
band recombines with holes in the valence band.

Construction:
The PN Junction of LED is surrounded by a transparent, hard plastic epoxy
resin hemispherical shaped shell inorder to protect it from vibration and
shock. LEDs are made by using the following semiconductor materials:
Gallium Arsenide(GaAs), Aluminium Gallium Arsenide(AlGaAs), Gallium
Arsenic Phosphide(GaAsP), etc. The symbol of LED is shown below.
Working:

The working of LED can be understood from the below diagram.

When it is forward biased, the potential barrier gets reduced and the
electrons and holes combine at the depletion layer, the recombination
energy is released in the form of photons.

b) Explain the working of Zener diode as voltage regulator.

Answer:

Zener diode is a silicon semiconductor with a p-n junction that is


specifically designed to work in the reverse biased condition. When
forward biased, it behaves like a normal signal diode, but when the
reverse voltage is applied to it, the voltage remains constant for a wide
range of currents.

Under reverse bias, due to Zener effect, a sharp breakdown occurs and
causes the voltage remains constant after breakdown. This voltage is
called Zener breakdown voltage, which is served as reference voltage.
Hence, the Zener diode can be used as voltage regulator.
The circuit for voltage regulator using Zener diode is shown below.
In the circuit, Zener diode is reverse biased. As long as the input voltage
does not fall below Zener breakdown voltage VZ, the voltage across the
diode is constant and hence the load voltage is also constant.

3. a) A half-wave rectifier is used to supply 50V d.c. to a resistive


load of 800 Ω. The diode has a resistance of 25 Ω. Calculate a.c.
voltage required.

Answer:

Given Vdc = 50V, RL = 800Ω, Ri = 25Ω


Vdc = Idc x RL

Vm
We know that Idc = Im/π and Im = R
L +Ri
Vm
Therefore Vdc = π(RL+Ri)
RL

Vdc 50
Vm = RL
x π(RL + Ri ) = 800
x 825π
Vm = 161.9 V
b) A power supply A delivers 10V dc with a ripple of 0.5V r.m.s.
while the power supply B delivers 25V dc with a ripple of 1mV
r.m.s. Which is better power supply ?

Answer:

The lower the ripple factor of a power supply, the better it is.

For power supply A,


Ripple factor = Vac(rms)/Vdc = 0.5/10 = 0.05
Ripple factor(%) = 5 %

For power supply B,


Ripple factor = Vac(rms)/Vdc = 0.001/25 = 0.00004
Ripple factor(%) = 0.004 %

Hence it is clear that power supply B is better.


Unit II

1. a) Derive the relationship between α and β, where α and β are


respectively the current gain in common-base and common-
emitter configuration.
Current gain (α) in common-base transistor:
It is defined as the ratio of collector current to the emitter current.
I
i.e. α = C IE
Current gain (β) in common-emitter transistor:
It is defined as the ratio of collector current to the base current.
I
i.e. β = C IB

To derive the relation between α and β,


IE = IC + IB
Divide by IC
�� �
=1+ �
�� ��

1 1
= 1+
� �

1 1
−1=
� �

1−� 1

=�


Hence β =
1−�

b) Determine VCE in the transistor circuit shown in Figure. The


transistor is of Silicon and has β = 150.

Solution:
Apply KVL to the output loop in the above circuit, we get
VCC = ICRC + VCE

VCE = VCC - IC RC

VCE = 10 - 100 IC ---- (A)

W.K.T IC = β IB

To find IB, Apply KVL to input loop in the given circuit

VBB = IBRB + VBE

IB = (VBB - VBE)/RB

IB = (5 - 0.7)/10 x 103 (Since VBE = 0.7 V for Silicon device)

IB = 0.43 mA

IC = β IB = 150 x 0.43 mA = 64.5 mA

Substitute the value of IC in (A), we get

VCE = 10 - (100 x 64.5 x 10-3) = 3.55 V

2. a) Explain DC load line and operating point.


Answer:
DC Load Line:
A load line is nothing bu the line drawn between saturation point and
cut off point in the output characteristics of transistor. Load lines are of
two types: DC and AC load lines.
DC load line is the load line drawn between two extreme points with DC
supply provided to the transistor, when there is no input signal.

Saturation point: VCE = 0 and IC = VCC/RC


Cut off point: VCE = VCC and IC = 0
Operating Point:
The zero signal values of IC and VCE are known as the operating point. It is
called operating point because the variations of IC and VCE take place
about this point when signal is applied. It is also called quiescent (silent)
point or Q-point because it is the point on IC − VCE characteristic when
the transistor is silent i.e. in the absence of the signal.

b) Explain Voltage divider bias with circuit diagram.


Answer:
The voltage divider bias method is the most prominent one among all
the transistor biasing methods. The voltage divider bias circuit is shown
below.

In the above circuit, resistors R1 and R2 are employed to provide


transistor biasing through VCC. The emitter resistor RE is used to provide
stabilization. The circuit gets this name because of the voltage divider
network formed by the resistors R1 and R2.
The voltage drop across R2 forward biases the base-emitter junction.
This causes the base current and hence collector current flow in the zero
signal conditions.
The derivation of the stability factor from the above circuit is
difficult. Hence, Thevenin’s equivalent circuit for the above circuit is
considered and shown below.

From the circuit,


VCC X R2
VTℎ =
(R1 +R2 )

R1 X R2
RTℎ = RB =
(R1 +R2 )
In the Loop BDGEB,
Vth = RBIB + VBE + (IC+IB)RE

The above equation is rewritten as


Vth = IB(RB + RE) + ICRE + VBE

Differentiating the above equation with respect to IC,


∂IB
0 = (RB + RE ) + RE + 0
∂IC

∂IB RE
∂IC
= − (R
B +RE )

Substituting the above equation in stability factor formula, we get


∂IC (β+1)
S = = ∂I
∂ICO 1−β B
∂IC

∂IC (β+1)
S = = ∂I
∂ICO 1−β B
∂IC
(β+1)(RB +RE)
S =
RE (β+1) + RB

Finally, the stability factor S can be written as


R
(β+1)(1+ RB)
S = RB
E
(β+1) +
RE

In the above equation of S, if the value of RB/RE is very small, then S


becomes
1
S = (β + 1) X
(β+1)
=1
This is the smallest possible value of S and leads to the maximum
possible thermal stability. Hence, this voltage divider bias is more
popular for transistor biasing than other biasing circuits.

3. a) What is transistor biasing. Explain base resistor method of biasing?


Answer:
Transistor biasing:
The proper flow of zero signal collector current and the maintenance of
proper collector-emitter voltage during the passage of signal is known as
transistor biasing. The basic purpose of transistor biasing is to keep the
base emitter junction properly forward biased and collector-base
junction properly reverse biased during the application of signal. This
can be achieved with a bias battery or associating a circuit with a
transistor. The circuit which provides transistor biasing is known as
biasing circuit. It may be noted that transistor biasing is very essential for
the proper operation of transistor in any circuit.
Base resistor method:
In this method, a high resistance RB is connected between the base and
+ve end of supply for npn transistor.
Here, the required zero signal base current is provided by VCC and it
flows through RB. It is because now base is positive w.r.t. emitter i.e.
base-emitter junction is forward biased. The required value of zero
signal base current IB can be made to flow by selecting the proper value
of base resistor RB. The stability factor for this base resistor bias is
S = 1+ β.

b) Determine the operating point of the given circuit. Assume that β=


100 and VBE (on) = 0.7 V.

Solution:
Given VCC = 10V, VBB = 5V, RB = 20KΩ, RC = 0.4 KΩ , RE = 0.6 KΩ, β= 100
and VBE(on) = 0.7 V

Applying KVL to the input side of the circuit, we get


VBB = IBRB + VBE(on) + IERE
We know that
IE = IC+IB = IB + βIB = (1+β)IB

Hence, the equation VBB can be rewritten as


VBB = IBRB + VBE(on) + (1+β)IBRE

VBB −VBE(on)
IB =
RB +(1+β)RE

5−0.7
IB = = 53.35 X 10−6 = 53.35 μA
20 X 103 +101 X0.6 X103

Hence IC = βIB = 100 x 53.35 x 10-6 = 5.34 mA

IE = IC + IB = 5.34 x 10-3 + 53.35 x 10-6 = 5.39 mA


Applying KVL to the output side of the circuit, we get
VCC = ICRC + VCC + IERE
VCE = VCC - ICRC - IERE
= 10 - 5.34 x 10-3 x 0.4 x 103 - 5.39 x 10-3 x 0.6 x 103
= 4.63 V
The Q-point is at VCEQ = 4.63 V and ICQ = 5.34 mA

Unit III
1. a) Draw the practical circuit of CE amplifier and explain the various
elements in the circuit.
Answer:
The CE amplifier circuit is shown below

The various prominent circuit elements and their functions are as


described below.
Biasing Circuit:The resistors R1, R2 and RE form the biasing and
stabilization circuit, which helps in establishing a proper operating point.
Input Capacitor (Cin): This capacitor couples the input signal to the base
of the transistor. The input capacitor Cin allows AC signal, but isolates the
signal source from R2.
Coupling Capacitor (CC): This capacitor is present at the end of one stage
and connects it to the other stage. As it couples two stages it is called as
coupling capacitor. This capacitor blocks DC of one stage to enter the
other but allows AC to pass. Hence it is also called as blocking capacitor.
Emitter by-pass capacitor (CE): This capacitor is employed in parallel to
the emitter resistor RE. The amplified AC signal is by passed through this
capacitor. If this is not present, that signal will pass through RE which
produces a voltage drop across RE that will feedback the input signal
reducing the output voltage.
Load resistor (RL): The resistance RL connected at the output is known as
Load resistor.

b) Draw the output waveform of Class-A and Class-B amplifiers.


Mention the conduction angle of Class-A, Class-B, and Class-C
amplifiers.
Answer:
Input and Output waveforms of Class-A and Class-B amplifiers

Class A amplifier

Class B amplifier

Conduction Angle of Class A amplifier: 3600

Conduction Angle of Class B amplifier: 1800

Conduction Angle of Class C amplifier: less than 1800


2. a) Explain the operation of RC coupled amplifier with its circuit
diagram.
Answer:
The resistance-capacitance coupling is shortly termed as RC coupling.
This is the mostly used coupling technique in amplifiers.
Construction of a RC Coupled Amplifier:
The figure below shows the circuit diagram of RC coupled amplifier.

The two stage amplifier circuit has two transistors, connected in CE


configuration and a common power supply VCC is used.
The potential divider network R1 and R2 and the resistor RE form the
biasing and stabilization network.
The emitter by-pass capacitor CE offers a low reactance path to the
signal.
The resistor RL is used as a load impedance.
The input capacitor Cin present at the initial stage of the amplifier
couples AC signal to the base of the transistor.
The capacitor CC is the coupling capacitor that connects two stages and
prevents DC interference between the stages and controls the shift of
operating point.
Operation of RC Coupled Amplifier:
When an AC input signal is applied to the base of first transistor, it gets
amplified and appears at the collector load RL which is then passed
through the coupling capacitor CC to the next stage. This becomes the
input of the next stage, whose amplified output again appears across its
collector load. Thus the signal is amplified in stage by stage action.Thus
the total gain is less than the product of the gains of individual stages.
This is because the effective load resistance of the first stage is reduced
due to the shunting effect of the input resistance of the second stage.
Hence, in a multistage amplifier, only the gain of the last stage remains
unchanged. The output phase is same as input because the phase
reversal is done two times by the two stage CE configured amplifier
circuit.

b) Draw and explain the operation of Class B push-pull amplifier.


Answer:
Construction:
The circuit of a push-pull class B power amplifier is shown below.

It consists of two identical transistors T1 and T2 whose bases are


connected to the secondary of the center-tapped input transformer Tr1.
The emitters are shorted and the collectors are given the VCC supply
through the primary of the output transformer Tr2. Here the transistors
are biased to be in cut off state.
Operation:
When no signal is applied at the input, the transistors T1 and T2 are in
cut off condition and hence no collector currents flow. As no current is
drawn from VCC, no power is wasted.
When input signal is given, it is applied to the input transformer Tr1
which splits the signal into two signals that are 1800 out of phase with
each other. These two signals are given to the two identical transistors
T1 and T2. For the positive half cycle, the base of the transistor T1
becomes positive and collector current flows.
At the same time, the transistor T2 has negative half cycle, which throws
the transistor T2 into cutoff condition and hence no collector current
flows. For the next half cycle, the transistor T1 gets into cut off condition
and the transistor T2 gets into conduction, to contribute the output.
Hence for both the cycles, each transistor conducts alternately. The
output transformer Tr3 serves to join the two currents producing an
almost undistorted output waveform. The efficiency of class B push-pull
amplifier is increased to 78.5 % compared to class A amplifier. But the
only disadvantage in this circuit is use of bulky, heavy and costly centre
tapped transformers.

3. a) Compare Class A, Class B and Class C amplifier.


Answer:
Class A Class B Class C
The transistor is The transistor is The transistor is
biased so that the biased so that the biased so that the
collector current collector current collector current
flows for the entire flows for half the flows for less than
input cycle. period of the input half the period of the
cycle. input cycle.
The conduction The conduction The conduction angle
angle is 3600. angle is 1800. is less than 1800.
Q-point is located at Q-point is located at Q-point is located at
the centre of the the cut-off or very the cut-off point.
load line. close to it.
Maximum collector Maximum collector Collector efficiency
efficiency is 50% efficiency is 78.5% can be above 90%
Less signal Signal distortion is Signal distortion is
distortion high as compared to very high.
class A amplifier.
Used for power Used for power Used as tuned
amplification of amplification in amplifiers at radio
small amplitude push-pull mode. frequencies.

b) Explain the principle of feedback amplifier.


Answer:
A feedback amplifier generally consists of two parts. They are the
amplifier and the feedback circuit. The feedback circuit usually consists
of resistors.
The concept of feedback amplifier can be understood from the
following figure.
From the above figure, the feedback network extracts a voltage Vf = β
Vo from the output Vo of the amplifier.
This voltage is added for positive feedback and subtracted for negative
feedback, from the signal voltage Vs.
Now,

The quantity β = Vf/Vo is called as feedback ratio or feedback fraction.


In case of negative feedback, The output Vo must be equal to the
input voltage (Vs - βVo) multiplied by the gain A of the amplifier. i.e.

Let Af be the overall gain (gain with the feedback) of the amplifier. Then
Af can be defined as

The equation of gain of the feedback amplifier is


Unit IV
1. a) Draw a neat circuit diagram of transistor Wien-Bridge Oscillator.
Write the expression for the frequency of oscillation.
Answer:

The frequency of oscillation is given as

If R1 =R2 ad C1=C2, then

b) Draw a neat circuit diagram of Hartley Oscillator. Write the


expression for the frequency of oscillation.
Answer:

The frequency of oscillation is given as


Where

2. a) Explain Barkhausen criterion with mathematical expression.


Consider the feedback amplifier as shown below.

For a positive feedback, Vi = Vs + Vf = Vs + β Vo


The output Vo must be equal to the input voltage (Vs + βVo) multiplied
by the gain A of the amplifier.
HenceVo = A (Vs + βVo)
Vo - A βVo = A Vs
Vo (1 - A β) = A Vs
Therefore

where Aβ is the feedback factor or the loop gain.


If Aβ = 1, Af = ∞. Thus the gain becomes infinity, i.e., there is output
without any input. Hence the feedback amplifier with positive feedback
works as an oscillator. This condition Aβ = 1 is called as Barkhausen
Criterion of oscillations.
The essential conditions for maintaining oscillations are referred to as
Barkhausen criterion. They are as follows:
1. | Aβ | = 1, i.e. the magnitude of loop gain must be unity.
2. The total phase shift around the closed loop is zero or 360 degrees.

b) Explain the principle of Phase shift oscillator.


Answer:
Generally, the output voltage of an RC circuit for a sinewave input leads
the input voltage. The phase angle by which it leads is determined by the
value of RC components used in the circuit. A typical RC network is
shown below
Let ϕ be the phase angle by which the output voltage V1’ leads the input
voltage V1. If R is reduced to zero, then V1’ leads V1 by 900. i.e.ϕ = 900.
Making R to zero is not practically possible because it leads to zero
output voltage. But it can be varied to make V1’ to lead V1 by 600 in a
single RC network. So, combining three such RC sections as shown below,
it is possible to produce total phase shift of 1800. This is the basic
principle of RC phase shift oscillator.

3. Explain the working of Astable multivibrator with its circuit diagram.


Answer:
Astable multivibrator circuit is shown below

It is a free running multivibrator which has quasi-stable states, i.e. no


stable states.
Once the supply is switched ON, the output of non-inverting amplifier is
initially low and hence flip-flop is in reset condition and hence Q is low.
When Q is low, the timer output Vout will be high. Further, Q is
connected to the base of the discharge transistor. So the low Q makes
transitor in cut off state. In this state, Capacitor C is directly connected
to VCC through resistors RA and RB. Now the capacitor starts charging
towards VCC through RA and RB. The charging time constant is defined
by RA and RB, i.e. (RA+RB)*C.
When the capacitor charges beyond 2/3Vcc, the threshold voltage at Pin
6 forces the output of comparator 1 to go HIGH. Since the output of
comparator 1 is connected to SET input of flip flop, the output Q will
turn from LOW to HIGH. Hence the output of timer goes LOW. When Q
is HIGH, the transistor at Pin 7 is turned on now and gets saturated.
Hence the transistor provides path for the capacitor to discharge via
resistor RB. Therefore, the discharging time constant is RB*C.
Due this discharging action of capacitor, the voltage decreases at Pin 2
(Trigger terminal). Once the capacitor discharges to a below 1/3Vcc, the
voltage at the Pin 2 goes below 1/3VCC. Hence the output of comparator
2 goes HIGH. This cycle is repeated until the power supply is ON and thus
the square wave is generated.

Unit V

1. Explain the working of full adder circuit with truth table and circuit
diagram.
Answer:
A combinational logic circuit that can add two binary digits (bits) and a
carry bit, and produces a sum bit and a carry bit as output is known as
a full-adder. A full adder circuit adds three binary digits, where two are
the inputs and one is the carry forwarded from the previous addition.
The block diagram and circuit diagram of the full adder are shown in
Figure.
Hence, the circuit of the full adder consists of one EX-OR gate, three
AND gates and one OR gate, which are connected together as shown in
the circuit diagram.

Operation of Full Adder:


Full adder takes three inputs namely A, B, and Cin. Where, A and B are
the two binary digits, and Cin is the carry bit from the previous stage of
binary addition. The sum output of the full adder is obtained by XORing
the bits A, B, and Cin. While the carry output bit (Cout) is obtained using
AND and OR operations. The truth table of a full adder is shown below.
Inputs Outputs
A B Cin Sum Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Hence, from the truth table, it is clear that the sum output of the full
adder is equal to 1 when only 1 input is equal to 1 or when all the inputs
are equal to 1. While the carry output has a carry of 1 if two or three
inputs are equal to 1.

2. Explain AND, OR, NOT, NAND, NOR, EX-OR and EX-NOR logic gates
with their truth tables.
Answer:
A logic gate is a device that acts as a building block for digital circuits.
They perform basic logical functions that are fundamental to digital
circuits. There are seven basic logic gates: AND, OR, NOT, NAND, NOR,
XOR and XNOR.
AND Gate:
The AND gate is named so because the gate acts in the same way as the
logical "and" operator. The following illustration and table show the
circuit symbol and logic combinations for an AND gate.

The output is 1 when both inputs are 1. Otherwise, the output is 0.

OR Gate:
The OR gate gets its name from behaving like the logical inclusive "or".
The following illustration and table show the circuit symbol and logic
combinations for an OR gate.

The output is 1 if one or both of the inputs are 1. If both inputs are 0,
then the output is 0.

NOT Gate:
A logical inverter, sometimes called a NOT gate to differentiate it from
other types of electronic inverter devices, has only one input. A NOT
gate reverses the logic state. If the input is 1, then the output is 0. If the
input is 0, then the output is 1.
The following illustration and table show the circuit symbol and logic
combinations for NOT gate.
NAND Gate:
The NAND (Negated AND) gate operates as an AND gate followed by a
NOT gate. It acts in the manner of the logical operation "and" followed
by negation. The output is 0 if both inputs are 1. Otherwise, the output is
1. It is easy to visualize it is that a NAND gate inverts the output of an
AND gate.
The following illustration and table show the circuit symbol and logic
combinations for NAND gate.

NOR Gate:
The NOR (Negated OR) gate is a combination OR gate followed by an
inverter. Its output is 1 if both inputs are 0. Otherwise, the output is 0.
The following illustration and table show the circuit symbol and logic
combinations for NOR gate.
X-OR Gate:
The XOR (exclusive-OR) gate acts in the same way as the logical
"either/or." The output is 1 if either, but not both, of the inputs are 1.
The output is 0 if both inputs are 0 or if both inputs are 1.
The following illustration and table show the circuit symbol and logic
combinations for XOR gate.

XNOR Gate:
The XNOR (exclusive-NOR) gate is a combination of an XOR gate
followed by an inverter. Its output is 1 if the inputs are the same and 0 if
the inputs are different.
The following illustration and table show the circuit symbol and logic
combinations for XNOR gate.

3. Explain MUX and DEMUX.


Answer:
Multiplexer:
Multiplexer is a combinational circuit that has maximum of 2n data
inputs, ‘n’ selection lines and single output line. Multiplexer is also called
as Mux.
Example: 4x1 Multiplexer
4x1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1
& s0 and one output Y. The block diagram of 4x1 Multiplexer is shown in
the following figure.
One of these 4 inputs will be connected to the output based on the
combination of inputs present at these two selection lines.
Truth table of 4x1 Multiplexer is shown below.

From truth table, Boolean function for output is written as

The circuit diagram of 4x1 multiplexer is shown in the following figure


below.

Demultiplexer:
De-Multiplexer is a combinational circuit that performs the reverse
operation of Multiplexer. It has single input, ‘n’ selection lines and
maximum of 2n outputs. De-Multiplexer is also called as De-Mux.
Example: 1x4 De-Multiplexer
1x4 De-Multiplexer has one input I, two selection lines, s1 & s0 and four
outputs Y3, Y2, Y1 &Y0. The block diagram of 1x4 De-Multiplexer is
shown in the following figure.

Truth table of 1x4 De-Multiplexer is shown below.

Boolean functions for each output as


Y3=s1s0I
Y2=s1s0′I
Y1=s1′s0I
Y0=s1′s0′I
Circuit diagram of 1x4 De-Multiplexer is shown in the Figure below.
Unit VI & VII

1. a) Derive the voltage equation of FM wave and list the advantages of


FM over AM.
Answer:
We know the relationship between angular frequency ωi and angle
θi(t) as

Advantages of FM over AM:


1. Better noise immunity is provided
2. Lower bandwidth is required
3. Transmitted power is more useful
4. Less modulating power is required

b) Explain the need of Modulation.


Answer:
The message signals have a very low frequency due to which these
signals cannot be transmitted over long distances. Hence such low-
frequency message signals are modulated over the high-frequency
carrier signal due to the following reasons:
 Antenna size gets reduced.
 No signal mixing occurs.
 Communication range increases.
 Multiplexing of signals occur.
 Adjustments in the bandwidth is allowed.
 Reception quality improves

2. a) Draw AM diode detector circuit and explain its action.


Answer:
AM diode detector is also known as Envelope detector. It is used to
detect (demodulate) high level AM wave. The block diagram of envelope
detector is shown below.

This envelope detector consists of a diode and low pass filter. The low
pass filter contains a parallel combination of the resistor and the
capacitor.
AM wave is given as input to the detector as shown in the circuit
diagram.

During the positive half cycle of AM wave, the diode becomes forward
biased and conducts. Then the capacitor charges to the peak value of
AM wave.
When the value of AM wave is less than this value, the diode will be
reverse biased. Thus, the capacitor will discharge through resistor R till
the next positive half cycle of AM wave.
When the value of AM wave is again greater than the capacitor voltage,
the diode conducts and the process will be repeated.
We should select the component values in such a way that the capacitor
charges very quickly and discharges very slowly. As a result, we will get
the capacitor voltage waveform same as that of the envelope of AM
wave, which is almost similar to the modulating signal.

b) A frequency modulated voltage wave is given by the equation:


��� = 12���(6 × 108 � + 5���(1250�))
Find (a) carrier frequency (b) signal frequency
(c) Modulation index (d) maximum frequency deviation
(e) power dissipated by the FM wave in 10Ω resistor.
Solution:

The voltage equation of FM wave is

Comparing with the given equation in problem,


Ac = 12 V
ωc = 6 x 108
β=5
ωm = 1250

Carrier Frequency: 2πfc = 6 x 108


fc = (6 x 108)/(2 x π)
fc = 0.955 x 108 Hz

Signal Frequency: 2πfm = 1250


fm = 1250/(2 x π) = 199.04 Hz

Modulation index: β = 5

Maximum frequency deviation, Δf = βfm = 5 x 199.04 = 995.2 Hz.

Power dissipated by FM wave in 10Ω resistor is


P = Ac2/2R = (12)2/ (2*10) = 7.2 W

3. Explain the function of each stage of superheterodyne receiver with


the help of a block diagram.
Answer:
The block diagram of superheterodyne receiver is shown below.
R.F. amplifier stage: The R.F. amplifier stage uses a tuned parallel circuit
L1C1 with a variable capacitor C1. The radio waves from various
broadcasting stations are intercepted by the receiving aerial and are
coupled to this stage. This stage selects the desired radio wave and
raises the strength of the wave to the desired level.
Mixer stage: The amplified output of R.F. amplifier is fed to the mixer
stage where it is combined with the output of a local oscillator. The two
frequencies beat together and produce an intermediate frequency (IF).
The intermediate frequency is the difference between oscillator
frequency and radio frequency i.e. I.F. = Oscillator frequency − Radio
frequency. The IF is always 455 kHz regardless of the frequency to which
the receiver is tuned.
I.F. amplifier stage: The output of mixer is always 455 kHz and is fed to
fixed tuned I.F. amplifiers. These amplifiers are tuned to one frequency
(i.e. 455 kHz) and render nice amplification.
Detector stage: The output from the last IF amplifier stage is coupled to
the input of the detector stage. Here, the audio signal is extracted from
the IF output. Usually, diode detector circuit is used because of its low
distortion and excellent audio fidelity.
A.F. amplifier stage: The audio signal output of detector stage is fed to a
multistage audio amplifier. Here, the signal is amplified until it is
sufficiently strong to drive the speaker. The speaker converts the audio
signal into sound waves corresponding to the original sound at the
broadcasting station.

4. Explain the RADAR system with the help of a block diagram.


Answer:
The block diagram of pulse radar is shown in Figure below.
This radar is used for detecting stationary targets. It utilizes the same
antenna for both Transmission and reception.
Pulse Modulator − It produces a pulse-modulated signal and it is applied
to the Transmitter.
Transmitter − It transmits the pulse-modulated signal, which is a train of
repetitive pulses.
Duplexer − It is a microwave switch, which connects the Antenna to both
transmitter section and receiver section alternately. Antenna transmits
the pulse-modulated signal, when the duplexer connects the Antenna to
the transmitter. Similarly, the antenna receives the signal, when the
duplexer connects the Antenna to Low Noise RF Amplifier.
Low Noise RF Amplifier − It amplifies the weak RF signal, which is
received by Antenna. The output of this amplifier is connected to Mixer.
Local Oscillator − It produces a signal having stable frequency. The
output of Local Oscillator is connected to Mixer.
Mixer − We know that Mixer can produce both sum and difference of
the frequencies that are applied to it. Among which, the difference of
the frequencies will be of Intermediate Frequency (IF) type.
IF Amplifier − IF amplifier amplifies the Intermediate Frequency (IF)
signal. The IF amplifier shown in the figure allows only the Intermediate
Frequency, which is obtained from Mixer and amplifies it. It improves
the Signal to Noise Ratio at output.
Detector − It demodulates the signal, which is obtained at the output of
the IF Amplifier.
Video Amplifier − It amplifies the video signal, which is obtained at the
output of detector.
Display − In general, it displays the amplified video signal on CRT screen.
5. Explain the operation of Tuned Radio Frequency receivers using a
block diagram.
Answer:
A TRF receiver simply consists of a chain of two or three single-tuned RF
amplifiers, all of them tuned to the same frequency, following a detector,
an audio voltage amplifier and an audio power amplifier that feeds the
loudspeaker as shown in the block diagram below.

TRF receiver is a receiver where the tuning, i.e. selectivity is provided by


the radio frequency stages. The simplest tuned radio frequency receiver
is a simple crystal set. Tuning is provided by a tuned coil / capacitor
combination, and then the signal is presented to a simple crystal or
diode detector where the amplitude modulated signal, in this case, is
recovered. The recovered modulating signal is then passed straight to
the headphones.
Typically a TRF receiver would consist of three main sections:
Tuned radio frequency stages: This consisted of one of more amplifying
and tuning stages. Early sets often had several stages, each proving
some gain and selectivity.
Signal detector: The detector enabled the audio from the amplitude
modulation signal to be extracted. It uses a form of detection called
envelope detection.
Audio amplifier: Audio stages to provide audio amplification were
normally, but not always included.
TRF receivers are quite simple and inexpensive. But they suffer from
several severe disadvantages, however the main disadvantage is poor
adjacent channel selectivity.

Unit VIII

1. Explain address and data bus, control and status signal and
applications of microprocessors.
Answer:
Diagram to represent bus organization system of 8085 Microprocessor is
shown below.
Bus is a group of conducting wires which carries information. The 8085
microprocessor has a 16-bit address bus, an 8-bit data bus, and various
control signals that are used to manage data transfer and other
operations.
Address Bus:
The address bus is used to specify the memory location or device with
which the microprocessor wants to communicate. It is 16 bits wide,
which allows the microprocessor to address up to 64K bytes of memory.
The address bus is unidirectional, which means that data can only flow in
one direction from the microprocessor to the addressed device.
Data Bus:
The data bus is used to transfer data between the microprocessor and
other devices. It is 8 bits wide, which means that data can be transferred
in byte-sized chunks. The data bus is bidirectional, which means that
data can flow in either direction between the microprocessor and other
devices.
Control and Status Signals:
In addition to the address and data buses, the 8085 microprocessor has
various control signals that are used to manage data transfer and other
operations.
The control bus is a bidirectional bus that is used to carry control signals
between the microprocessor and other components such as memory
and I/O devices.
There are 3 control signal and 3 status signals. Three control signals are
RD, WR & ALE.
RD − This signal indicates that the selected IO or memory device is to be
read and is ready for accepting data available on the data bus.
WR − This signal indicates that the data on the data bus is to be written
into a selected memory or IO location.
ALE − It is a positive going pulse generated when a new operation is
started by the microprocessor. When the pulse goes high, it indicates
address. When the pulse goes down it indicates data.
Three status signals are IO/M, S0 & S1.
IO/M - This signal is used to differentiate between IO and Memory
operations, i.e. when it is high indicates IO operation and when it is low
then it indicates memory operation.
S1 & S0 - These signals are used to identify the type of current operation.

2. a) Explain the Flag register in 8085 microprocessor.


Answer:
A flag is a flip flop. The flag register of 8085 microprocessor consists of 5
flags. The flag register is connected to ALU. When an operation is
performed by ALU the result is transferred on data bus and status of
result will be stored in flip flops. The different flags and their positions in
flag register are shown in following figure.

The bits in the Flag register are used to indicate whether the result of an
operation is zero, positive, negative, or if there was a carry or borrow
during the operation.
Carry Flag: This flag is set whenever there has been a carry out of, or a
borrow into, the higher order bit of the result.
Parity flag: This flag is set whenever the result has even parity, an even
number of 1 bits. If parity is odd, PF is cleared.
Auxiliary carry flag: This flag is set whenever there has been a carry out
of the lower nibble into the higher nibble or a borrow from higher nibble
into the lower nibble of an 8 bit quantity, else AF is reset.
Zero flag: This flag is set, when the result of operation is zero, else it is
reset.
Sign flag: This flag is set, when MSB (Most Significant Bit) of the result is
1. Since negative binary numbers are represented in the 8085 CPU in
standard two’s complement notation, SF indicates sign of the result.

b) Draw a neat diagram of the internal architecture of 8085


Microprocessor.
Answer:
The internal architecture of 8085 microprocessor is shown below.

3. a) Explain meaning of given programming instructions.


Answer:
MOV A, B - It is a data transfer instruction which copies the
content of the B register to Accumulator without any alteration.

ADI data - It is an arithmetic instruction in which a 8-bit data is


added to the content of the accumulator and the result is stored
in the accumulator.

SUB r - It is an arithmetic instruction in which the content of the


register is subtracted from the content of the accumulator and the
result is stored in the accumulator.
JMP addr - It is a branching instruction by which the sequence of
the program is transferred to the memory address specified in the
instruction. It is an unconditional jump.

STA addr - It is a data transfer instruction in which the content of


the accumulator is copied to the memory address specified in the
instruction.

b) Explain the various addressing modes of 8085 microprocessor.


Answer:
Each instruction of 8085 μP has an opcode and operands. Operation
code(OPCODE) specifies the operation to be performed. For eg. opcode
for the instruction ADD B is 80H. Operand may be an immediate data or
register or memory location or an address. It is entirely based on
addressing modes of 8085 processor.
Addressing modes are the way of specifying operand to be operated by
an instruction. There are 5 addressing modes:
Immediate addressing mode: In this mode, the 8/16-bit data is specified
in the instruction itself as one of its operand. eg. MVI A, 05H.
Register addressing mode: In this mode, the data is copied from one
register to another. eg. MOV A,B.
Direct addressing mode: In this mode, 16-bit address is directly given in
the instruction and the data from the address can be accessed. eg. STA
8000H
Indirect addressing mode: In this mode, instead of giving address
directly, the address is pointed by register pair and the data can be
accessed. eg. LXI H, 8000 and MOV A,M. Here M is the memory location
pointed by HL register pair and the data in the location can then be
accessed.
Implied addressing mode: This mode doesn’t require any operand; the
data is specified by the opcode itself. eg. CMA, STC.

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