Instruction Codes

An instruction code is a group of bits that tells the computer

to perform a specific operation part. They are saved in the
memory along with the information. Each computer has its
specific group of instructions.

They can be categorized into two elements as Operation

codes (Opcodes) and Address. Opcodes specify the operation
for specific instructions. An address determines the registers
or the areas that can be used for that operation.

Instruction Code: Operation Code

The operation code of an instruction is a group of bits that
define operations such as add, subtract, multiply, shift and
compliment. The number of bits required for the operation
code depends upon the total number of operations available
on the computer. The operation code must consist of at
least n bits for a given 2^n operations. The operation part of
an instruction code specifies the operation to be performed.

Instruction Code: Register Part

The operation must be performed on the data stored in
registers. An instruction code therefore specifies not only
operations to be performed but also the registers where the
operands (data) will be found as well as the registers where
the result has to be stored.
Istruction Format
The Basic Computer has two components, a processor
and memory
1. The memory has 4096 words in it
2. 4096 = 212, so it takes 12 bits to select a word in memory
3. Each word is 16 bits long.

It consists of 12 bits of memory that are required to define

the address as the memory includes 4096 words. The 15th bit
of the instruction determines the addressing mode (where
direct addressing corresponds to 0, indirect addressing
corresponds to 1). Therefore, the instruction format includes
12 bits of address and 1 bit for the addressing mode, 3 bits
are left for Opcodes.

The following block diagram shows the instruction

format for a basic computer.

Computer Registers
Registers are a type of computer memory used to quickly
accept, store, and transfer data and instructions that are
being used immediately by the CPU. The registers used by
the CPU are often termed as Processor registers.

A processor has many registers to hold instructions after it

has been fetched from memory, addresses of operands need
to be accessed data manipulated with accumulator, general
purpose register, and others.

Program Counter (PC): used is to hold the memory address of

the next instruction to be executed.

Size: 12 bits. :

The Address Register (AR): is used to keep track of what

locations in memory processor is addressing. This AR register
is always connected to address pins of memory unit.

Size: 12 bit

Data Register (DR): When an operand is found, using either

direct or indirect addressing, it is placed in DR. The processor
then uses this value as data for its operation. DR is
connected to data pins of memory unit.

Accumulator (AC): The Basic Computer has a single general

purpose register–the Accumulator (AC) , it can be referred to
in instructions.
Temporary Register (TR): a scratch register used to store
intermediate results or other temporary data.
 Following is the list of some of the most common
registers used in a basic computer:

Register Symbol Number Function

of bits
Data register DR 16 Holds memory operand

Memory Address MAR 12 Address location of memory is stored

register in this register to be accessed later. It
is called by both MAR and MDR
together

Accumulator AC 16 An accumulator is the most often

utilized register, and it is used to store
information taken from memory.

Instruction IR 16 Instruction registers hold the

register information about to be executed.
The immediate instructions received
from the system are fetched and
stored in these registers.
Once the instructions are stored in
registers, the processor starts
executing the set instructions, and the
PC will point to the next instructions
to be executed

Program counter PC 12 Holds address of the instruction

Temporary TR 16 Holds temporary data

register

Input register INPR 8 Carries input character

Output register OUTR 8 Carries output character

S.NO NAME SYMBOL FUNCTIONING

1 Accumulator AC An accumulator is the most often utilized
register, and it is used to store information
taken from memory.

2 Memory MAR Address location of memory is stored in

address this register to be accessed later.
registers

3 Memory MDR All the information that is supposed to be

data written or the information that is supposed
registers to be read from a certain memory address
is stored here

4 General- GPR Consist of a series of registers generally

purpose starting from R0 and running till Rn - 1.
register These registers tend to store any form of
temporary data that is sent to a register
during any undertaking process.

5 Program PC These registers are utilized in keeping the

counter record of a program that is being executed
or under execution. Program Counter (PC)
also functions to count the number of
instructions.

6 Instructions IR Instruction registers hold the information

registers about to be executed. The immediate
instructions received from the system are
fetched and stored in these registers.

7 Condition These have different flags that depict the

code status of operations. These registers set the
registers flags accordingly if the result of operation
caused zero or negative

8 Temporary TR Holds temporary data

registers

9 Input INPR Carries input character

registers
10 Output OUTR Carries output character
registers

11 Index BX We use this register to store values and

registers numbers included in the address
information and transform them into
effective addresses. These are also called
base registers.
These are used to change operand address
at the time of execution, also stated as BX

12 Memory MBR Memory buffer registers are used to store

buffer data content or memory commands used
register to write on the disk. The basic functionality
of these is to save called data from
memory.
MBR is very similar to MDR

13 Stack SCR Stack is a set of location memory where

control data is stored and retrieved in a certain
registers order. Also called last in first out ( LIFO ),
we can only retrieve a stack at the second
position only after retrieving out the first
one, and stack control registers are mainly
used to manage the stacks in the
computer.

14 Flag register FR Flag registers are used to indicate a

particular condition. The size of the
registered flag is 1 - 2 bytes, and each
registered flag is furthermore compounded
into 8 bits. Each registered flag defines a
condition or a flag.

15 Segment SR Hold address for memory

register

16 Data DX Hold memory operand

 register

Computer Instructions
Computer instructions are a set of machine language
instructions that a particular processor understands and
executes. A computer performs tasks on the basis of the
instruction provided.

An instruction comprises of groups called fields. These fields

include:

o The Operation code (Opcode) field which specifies the

operation to be performed.
o The Address field which contains the location of the
operand, i.e., register or memory location.
o The Mode field which specifies how the operand will be
located.

A basic computer has three instruction code formats which

are:

1. Memory - reference instruction

2. Register - reference instruction
3. Input-Output instruction

Memory - reference instruction

In Memory-reference instruction, 12 bits of memory is used
to specify an address and one bit to specify the addressing
mode 'I'.

Register - reference instruction

The Register-reference instructions are represented by the

Opcode 111 with a 0 in the leftmost bit (bit 15) of the
instruction.

Instruction Cycles
A program residing in the memory unit of a computer
consists of a sequence of instructions. These instructions are
executed by the processor by going through a cycle for each
instruction.

In a basic computer, each instruction cycle consists of the

following phases:
 1. Fetch instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.

Addressing Modes
The term addressing modes refers to the way in which the operand
of an instruction is specified. The addressing mode specifies a rule
for interpreting or modifying the address field of the instruction
before the operand is actually executed.

In computer architecture, there are following types of addressing

modes-

1. Implied Addressing Mode-

 In this addressing mode,
 The definition of the instruction itself specifies the operands
implicitly.
 It is also called as implicit addressing mode.

Examples-

 The instruction “Complement Accumulator” is an implied

mode instruction.
 In a stack organized computer, Zero Address Instructions
are implied mode instructions.
(Since operands are always implied to be present on the top
of the stack)

2. Stack Addressing Mode-

In this addressing mode,

 The operand is contained at the top of the stack.

Example-

ADD
 This instruction simply pops out two symbols contained at the top of
the stack.
 The addition of those two operands is performed.
 The result so obtained after addition is pushed again at the top of
the stack.

3. Immediate Addressing Mode-

 In this addressing mode,
 The operand is specified in the instruction explicitly.
 Instead of address field, an operand field is present that contains
the operand.

Examples-

 ADD 10 will increment the value stored in the accumulator by 10.

 MOV R #20 initializes register R to a constant value 20.

4. Direct Addressing Mode-

In this addressing mode,

 The address field of the instruction contains the effective
address of the operand.
 Only one reference to memory is required to fetch the
operand.
 It is also called as absolute addressing mode.
 Example-
 ADD X will increment the value stored in the accumulator by
the value stored at memory location X.
AC ← AC + [X]
5. Indirect Addressing Mode-

In this addressing mode,

 The address field of the instruction specifies the address of
memory location that contains the effective address of the
operand.
 Two references to memory are required to fetch the
operand.
 Example-

 ADD X will increment the value stored in the accumulator by

the value stored at memory location specified by X.
AC ← AC + [[X]]

6. Register Direct Addressing Mode-

In this addressing mode,

 The operand is contained in a register set.
 The address field of the instruction refers to a CPU register
that contains the operand.
 No reference to memory is required to fetch the operand.
 Example-

 ADD R will increment the value stored in the accumulator by

the content of register R.
AC ← AC + [R]

NOTE-

It is interesting to note-
 This addressing mode is similar to direct addressing mode.
 The only difference is address field of the instruction refers
to a CPU register instead of main memory.

7. Register Indirect Addressing Mode-

In this addressing mode,

 The address field of the instruction refers to a CPU register
that contains the effective address of the operand.
 Only one reference to memory is required to fetch the
operand.

Example-

 ADD R will increment the value stored in the accumulator by

the content of memory location specified in register R.
AC ← AC + [[R]]

NOTE-

It is interesting to note-
 This addressing mode is similar to indirect addressing
mode.
 The only difference is address field of the instruction refers
to a CPU register.
 8. Relative Addressing Mode-

In this addressing mode,

 Effective address of the operand is obtained by adding the
content of program counter with the address part of the
instruction.

Effective Address
= Content of Program Counter + Address part of
the instruction
 NOTE-

 Program counter (PC) always contains the address of the

next instruction to be executed.
 After fetching the address of the instruction, the value of
program counter immediately increases.
 The value increases irrespective of whether the fetched
instruction has completely executed or not.

9. Indexed Addressing Mode-

In this addressing mode,

 Effective address of the operand is obtained by adding the
content of index register with the address part of the
instruction.

Effective Address
= Content of Index Register + Address part of the
instruction
 10. Base Register Addressing Mode-

In this addressing mode,

 Effective address of the operand is obtained by adding the
content of base register with the address part of the
instruction.

Effective Address
= Content of Base Register + Address part of the
instruction
 11. Auto-Increment Addressing Mode-

 This addressing mode is a special case of Register Indirect

Addressing Mode where-

Effective Address of the Operand

= Content of Register

In this addressing mode,

 After accessing the operand, the content of the register is
automatically incremented by step size „d‟.
 Step size „d‟ depends on the size of operand accessed.
 Only one reference to memory is required to fetch the
operand.
 Example-

Assume operand size = 2 bytes.

Here,
 After fetching the operand 6B, the instruction register
RAUTO will be automatically incremented by 2.
 Then, updated value of RAUTO will be 3300 + 2 = 3302.
 At memory address 3302, the next operand will be found.

NOTE-

In auto-increment addressing mode,

 First, the operand value is fetched.
 Then, the instruction register RAUTO value is incremented by
step size „d‟.

12. Auto-Decrement Addressing Mode-

 This addressing mode is again a special case of Register

Indirect Addressing Mode where-

Effective Address of the Operand

= Content of Register – Step Size

In this addressing mode,

 First, the content of the register is decremented by step size
„d‟.
 Step size „d‟ depends on the size of operand accessed.
 After decrementing, the operand is read.
 Only one reference to memory is required to fetch the
operand.

Example-
 Assume operand size = 2 bytes.
Here,
 First, the instruction register RAUTO will be decremented by
2.
 Then, updated value of RAUTO will be 3302 – 2 = 3300.
 At memory address 3300, the operand will be found.

NOTE-

In auto-decrement addressing mode,

 First, the instruction register RAUTO value is decremented by
step size „d‟.
 Then, the operand value is fetched.
Types of Addressing Modes

There are various types of Addressing Modes which are as follows

−
Implied Mode − in this mode, the operands are specified
implicitly in the definition of the instruction. For example, the
instruction "complement accumulator" is an implied-mode
instruction because the operand in the accumulator register is
implied in the definition of the instruction. All register reference
instructions that use an accumulator are implied-mode instructions.
Instruction format with mode field
Opcode Mode Address

Immediate Mode − In this mode, the operand is specified in the

instruction itself. In other words, an immediate-mode instruction
has an operand field instead of an address field. The operand field
includes the actual operand to be used in conjunction with the
operation determined in the instruction. Immediate-mode
instructions are beneficial for initializing registers to a constant
value.
Register Mode − In this mode, the operands are in registers that
reside within the CPU. The specific register is selected from a
register field in the instruction. A k-bit field can determine any one
of the 2k registers.
Register Indirect Mode − In this mode, the instruction defines a
register in the CPU whose contents provide the address of the
operand in memory. In other words, the selected register includes
the address of the operand rather than the operand itself.
A reference to the register is then equivalent to specifying a
memory address. The advantage of a register indirect mode
instruction is that the address field of the instruction uses fewer bits
to select a register than would have been required to specify a
memory address directly.
Direct Address Mode − in this mode, the effective address is
equal to the address part of the instruction. The operand resides in
memory and its address is given directly by the address field of the
instruction. In a branch-type instruction, the address field specifies
the actual branch address.
Indirect Address Mode − in this mode, the address field of the
instruction gives the address where the effective address is stored
in memory. Control fetches the instruction from memory and uses
its address part to access memory again to read the effective
address.
Indexed Addressing Mode − in this mode, the content of an index
register is added to the address part of the instruction to obtain the
effective address. The index register is a special CPU register that
contains an index value. The address field of the instruction defines
the beginning address of a data array in memory.

Assembly Language vs Machine Language

 Assembly Language Machine Language

Assembly language is an Machine language is a low-

intermediate programming level language.

language between a high-level

programming language and

Machine language

Assembly language is English Machine language is in the

syntaxes, which is understood form of 0’s and1’s (binary

by the CPU after converting it format). One showcases the

to low-level language by true/on state while zero

interpreter and compilers. depicts the false/off state.

Programmers can understand CPU can directly understand

the assembly language, Machine language. No need

however, CPU cannot. of compiler or assembler.

Assembly language is a set of Machine code differs

instructions which are the platform to platform.

same irrespective of platform.

The codes and instructions of Binary codes here can’t be

assembly language can be memorized.

memorized.

Modification is not that tough Modification is not possible.

here. It has to be written from

scratch for a specific type of

CPU.

Here applications are device CDs, DVDs and Blu-ray Discs

drivers, low-level embedded represent an application

systems, and real-time systems of binary form.

Register Transfer Language (RTL)

o The symbolic notation used to describe the micro-

operation transfer among registers is called RTL
(Register Transfer Language).

o The use of symbols instead of a narrative explanation

provides an organized and concise manner for listing
the micro-operation sequences in registers and the
control functions that initiate them.

o A register transfer language is a system for expressing

in symbolic form the microoperation sequences among
the registers of a digital module.

o It is a convenient tool for describing the internal

organization of digital computers in concise and precise
manner.

Micro-operations:
The operation executed on the data store in registers is called
micro-operations. They are detailed low-level instructions used in
some designs to implement complex machine instructions.

Register-Transfer:

 The information transformed from one register to another

register is represented in symbolic form by replacement
operator is called Register Transfer.

 The statement R2← R1 denotes a transfer of the content of

register R1 into register R2.
  It designates a replacement of the content of R2 by the
content of R1.

 By definition, the content of the source register R 1 does not

change after the transfer.

Basic symbols of RTL:

Symbol Description Example

Letters and MAR, R1,

Numbers Denotes a Register R2

R1(8-bit)

() Denotes a part of register R1(0-7)

<- Denotes a transfer of information R2 <- R1

R1 <- R2
Specify two micro-operations of
, Register Transfer R2 <- R1

P : R2 <-
R1

: Denotes conditional operations if P=1

Naming Denotes another name for an already

Operator (:=) existing register/alias Ra := R1
Register Transfer Operations:

The operation performed on the data stored in the registers is

referred to as register transfer operations.
There are different types of register transfer operations:
Simple Transfer
R2 <- R1

The content of R1 are copied into R2 without affecting the content of

R1. It is an unconditional type of transfer operation.

Conditional Transfer

It indicates that if P=1, then the content of R1 is transferred to R2. It

is a unidirectional operation.
3. Simultaneous Operations –
If 2 or more operations are to occur simultaneously then they are
separated with comma (,).
If the control function P=1, then load the content of R1 into R2 and at the same
clock load the content of R2 into R1.

Bus Transfers
A bus consists of a set of common lines, one for each bit of
register, through which binary information is transferred one
at a time. Control signals determine which register is
selected by the bus during a particular register transfer.
A bus transfer is the most effective method to send data
by using a common bus system. It is constructed using
common bus registers in multiple registers. The mechanism
of the bus includes a collection of lines. These lines are
registers of one bit each, which share only one information at
a time. The data transfer is contained by the control signals.
The two methods that can be used in Bus transfer are as
follows −
 Using multiplexer
  Using three states bus buffers

Memory Transfer
Most of the standard notations used for specifying
operations on memory transfer are stated below.
o The transfer of information from a memory unit to the
user end is called a Read operation.
o The transfer of new information to be stored in the
memory is called a Write operation.
o A memory word is designated by the letter M.
o We must specify the address of memory word while
writing the memory transfer operations.
o The address register is designated by AR and the data
register by DR.
o Thus, a read operation can be stated as:

1. Read: DR ← M [AR]
o The Read statement causes a transfer of information into
the data register (DR) from the memory word (M)
selected by the address register (AR).
o And the corresponding write operation can be stated as:

2. : M [AR] ← R1
o The Write statement causes a transfer of information
from register R1 into the memory word (M) selected by
address register (AR).
Arithmetic Micro-operations

The operations implemented on data stored in registers are

known as micro-operations. A micro-operation is a basic
operation implemented on the data saved in one or more
registers.
The basic Arithmetic Micro-operations are classified in the following
categories:

1. Addition
2. Subtraction
3. Increment
4. Decrement
5. Shift

Some additional Arithmetic Micro-operations are classified as:

1. Add with carry

2. Subtract with borrow
3. Transfer/Load, etc.
Add Micro-Operation
It is described by the following statement −
R3 → R1 + R2
The following statement instructs the information or
contents of register R1 to be inserted to data or content of
register R2 and the sum must be converted to register R3.
Subtract Micro-Operation
Example −
R3 → R1 + R2' + 1
Subtract micro-operation are using minus operator we
create 1's complement and add 1 to the register which
obtains subtracted, i.e. R1 - R2 is similar to R3 → R1 + R2'
+1
Increment/Decrement Micro-Operation
In Increment and decrement micro-operations, it is usually
implemented by adding and subtracting 1 to and from the
register respectively.
R1 → R1 + 1
R1 → R1 – 1
The following table demonstrates the symbolic
representation of several Arithmetic Micro-operations.

Symbolic Representation Description

R3 ← R1 + R2 The contents of R1 plus R2 are

transferred to R3.

R3 ← R1 - R2 The contents of R1 minus R2 are

transferred to R3.

R2 ← R2' Complement the contents of R2 (1's

complement)

R2 ← R2' + 1 2's complement the contents of R2

(negate)

R3 ← R1 + R2' + 1 R1 plus the 2's complement of R2

(subtraction)

R1 ← R1 + 1 Increment the contents of R1 by one

R1 ← R1 - 1 Decrement the contents of R1 by one

Logic Micro-Operations

Logic operations are binary micro-operations

implemented on the bits saved in the registers.
These operations treated each bit independently
and create them as binary variables.
There are a total of 16 micro-operations available.
These are-
Before discussing these logic micro-operations, let‟s discuss their
truth tables.

The below diagram shows the truth table for all the 16 logic micro-
operations mentioned above. Here, x and y are the variables or
registers in which the data is stored and F0, F1, ….., F15 are the
outputs that occur after performing these logic micro-operations.

Clear
The Clear logic micro-operation is used to clear the register or set
the bits of the register to 0. To use this micro-operation, we need to
feed 0 to the register. In the above truth table, F0 represents the
truth table of Clear logic micro-operation.

For example, F <- 0 means the value of the register F is set to 0 or

is cleared. The previous value of register F will be removed.

Boolean expression-
The boolean expression for the Clear logic micro-operation is F0 = 0

AND
The AND logic micro-operation performs the logical AND between
the bits of the data stored in the two registers. The symbol to
represent the logical AND is ∧ .
Case 1: Both x and y values are true.
In the first case, if the values of both two registers are true then the
result of AND operation is 1; else, it is 0. F1 represents the truth
table of AND logic micro-operation in the above truth table.
For example, F <- A ∧ B means the registers A and B value will
undergo AND micro-operation, and the output will be stored in
register F.
Boolean expression-
The boolean expression for the AND logic micro-operation will
be F1 = x.y
Case 2: x is true, and y is false.
The logical AND operation we discussed above gives output 1
when both x and y are true. There is also another AND operation
which includes x but not y. Also known as inhibition, here for
performing the AND operation, the first value is taken from the x
variable or register. The second value is taken as
the complement of the y variable or register. If the value of the x
register is true and of the y register is false, then the result of AND
operation is 1; else, it is 0.
F2 represents the truth table of inhibition AND logic micro-
operation in the above truth table.
For example, F <- A ∧ B’ means the value of the registers A and
complement B will undergo AND micro-operation, and the output
will be stored in register F.
Boolean expression-
The boolean expression for the AND logic micro-operation will
be F2 = x.y’
Shift Micro-Operations

Shift micro-operations are those micro-operations that

are used for serial transfer of information. These are
also used in conjunction with arithmetic micro-
operation, logic micro-operation, and other data-
processing operations.
Shift micro-operations are used for the serial
transfer of data and also support in conjunction with
arithmetic, logic, and several data-processing
operations. The contents of a register can be shifted to
the left or the right.
Types of Shift Micro-operations

Logical Shift Left –

In this shift one position moves each bit to the left one by one. The
Empty least significant bit (LSB) is filled with zero (i.e, the serial
input), and the most significant bit (MSB) is rejected.
Logical Shift Right–
In this one position moves each bit to the right one by one and the
least significant bit(LSB) is rejected and the empty MSB is filled with
zero.

3.

Arithmetic :
This micro-operation shifts a signed binary number to the left or
to the right position. In arithmetic shift-left, it multiplies a signed
binary number by 2 and in an arithmetic shift-right, it divides the
number by 2.

1. Left Arithmetic Shift –

In this one position moves each bit to the left one by one. The
empty least significant bit (LSB) is filled with zero and the most
significant bit (MSB) is rejected. Same as the Left Logical Shift.
2. Right Arithmetic Shift –
In this one position moves each bit to the right one by one and
the least significant bit is rejected and the empty MSB is filled
with the value of the previous MSB.

3. Circular :
The circular shift circulates the bits in the sequence of the register
around the both ends without any loss of information.
1. Left Circular Shift –

2. Right Circular Shift –