Comp Arch Review
Comp Arch Review
Architecture of a System Bus In reality, each bus consists of 50 to 100 distinct physical lines divided into
three (3) subassemblies:
• Address bus (memory bus) – It is a unidirectional bus that transports memory addresses which
the processor wants to access to read or write data.
• Data bus – It is a bidirectional bus that transfers instructions coming from or going to the
processor.
• Control bus (command bus) – It is a bidirectional bus that transports orders and
synchronization signals coming from the control unit and traveling to all other hardware
components. It also transmits response signals from the hardware.
Methods of Data Transmission There are two (2) kinds of data transmission methods that are frequently
used in data communication:
• Serial – It is normally used for long-distance data transfer and in cases where the amount of
data being sent is relatively small. It ensures that the data integrity is maintained as it transmits
the data bits in a specific order, one after another. Data bits are sent one by one in a medium.
• Parallel – When data is sent using parallel data transmission, multiple data bits are transmitted
over multiple channels at the same time. This implies that data can be sent faster than using
serial transmission methods.
Bus Communication Protocols - A bus transfers electrical signals from one place to another. Data travels
between the CPU and memory along the data bus. The location (address) of that data is carried along
the address bus. There are two (2) types of bus protocols:
• Synchronous – Data bits are transmitted as a continuous stream in time with a master clock.
The data transmitter and receiver both operate using a synchronized clock frequency; therefore,
start bits, stop bits, and gaps are not used. This implies that data moves faster and timing errors
are less frequent because the transmitter and receiver time is synced. However, data accuracy is
highly dependent on timing being synced correctly between devices.
• Asynchronous – Data bits can be sent at any point in time. Stop bits and start bits are used
between data bytes to synchronize the transmitter and receiver and to ensure that the data is
transmitted correctly. The time between sending and receiving data bits is not constant; thus,
gaps are used to provide time between transmissions.
Bus Arbitration - More than one (1) module may need control of the bus (e.g., CPU and DMA controller).
The I/O module may need to read or write directly to memory, without sending the data to the
processor. The process by which multiple requests are recognized and priority is given to one of them is
called arbitration.
• Centralized Arbitration
O In here, an arbitration circuit receives requests from the contending bus masters and
then decides which of them is to be given control of the bus.
o The device may be part of the CPU or a separate module such as daisy-chaining.
• Distributed Arbitration
o In a system with distributed arbitration, each of the masters takes part in the
arbitration process.
o The system lacks a specific arbiter—each master monitors the other masters and
decides whether to continue competing for the bus or give up and wait until later.
Characteristics of a Computer Bus Listed below are the common characteristics that a computer bus
must have.
• Data Sharing – All types of buses found in computer transfer data between computer
peripherals connected to it.
• Addressing – A bus has address lines that match those of the processor. This allows data to be
sent to or from specific memory locations.
• Timing – A bus provides a system clock signal to synchronize the peripherals attached to it with
the rest of the system.
Chipset - is a component that routes data between a computer’s buses. This enables all of the
components that make up the computer to communicate with each other.
• Northbridge (memory controller) is in charge of controlling the transfer of data between the
processor and the random access memory (RAM), which is why it is located physically near the
processor.
o Internal Bus (Front-Side Bus or FSB) – This allows the processor to communicate with
the system’s central memory or the RAM.
Computer Bus Technologies - here are some of the common expansion bus types that were used in
computers: Previously Used Technology
• Industry Standard Architecture (ISA) – IBM introduced this bus for IBM PC using an 8088
microprocessor. This has an 8-bit data bus and 20 address lines at a clock speed of 8 MHz.
• Video Electronics Standards Association (VESA) – This bus is a standard interface between a
computer and its expansion. As applications became more graphically intensive, the VESA bus
was introduced to maximize throughput of video graphics memory. This also provides fast data
flow between stations and can transfer up to 132 Mbps.
• Accelerated Graphics Port (AGP) – This is connected to the CPU. This operates at the speed of
the processor bus and implies that video information is sent quickly to the card for processing.
The data transfer rate ranges from 264 Mbps to 528Mbps and 800 Mbps up to 1.5 Gbps. The
AGP connector is identified by its brown color.
• Peripheral Component Interconnect (PCI) – Intel Corporation developed this bus. The PCI bus
technology includes a 32- or 64-bit bus that runs at 33/66 MHz clock speed. It offers many
advantages for connections to hubs, routers, and network interface cards (NIC). In particular, PCI
provides more bandwidth up to 1 Gigabit per second as needed by these hardware components.
• Small Computer Systems Interface (SCSI) – It is a set of ANSI (American National Standards
Institute) standard electronic interfaces that allows PCs to communicate faster with peripheral
hardware (e. g., disk drives, tape drives, CD-ROM drives, printers, and scanners). It is more
flexible than previous parallel data transfer interfaces.
• Personal Computer Memory Card Industry Association (PCMCIA) – This was founded to give a
standard bus for laptop computers. A PCMCIA card has a 68-pin connector that connects into a
slot in the PC. These cards are plug-and-play devices that are often hot-swappable in most of the
operating systems.
I/O Architecture - The peripheral devices are the main vehicle for obtaining the benefits from the system
since they are responsible for the input/output (I/O) and for connecting the system to the outside world.
Some devices have a dual role, such as mass storage, networks, and so on—these are both I/O devices.
• Input peripherals – This allows user input from the outside world to the computer.
• Output peripherals – This allows information output from the computer to the outside world.
• Input-output peripherals – This allows information to be sent through input and output.
• Storage – This allows the usage of I/O for storing and fetching of information.
I/O Characteristics These are the following characteristics to consider in dealing with I/O devices and
controllers:
o Data rate – the amount of data transferred to or from the I/O device in a period. It is
typically measured in bits per second
• I/O considerations:
o Dependability – This refers to the capability of the range and control of an I/O device.
o Cost – This refers to the cost (how cheap or expensive) of an I/O module or device.
• I/O bandwidth (throughput) – This is the amount of information that can be input (output) and
communicated across an interconnect (say, for example, a bus) to the processor or memory (I/O
device) per unit time.
o How much data can be moved through the system at a certain time?
• I/O response time (latency) – This is the total elapsed time to accomplish by an input or output
operation. This is also an especially important performance metric in real-time systems.
Modes of I/O Data Transfer Data transfer between the central unit and I/O devices can be handled in
three (3) types of modes:
• Programmed I/O – These instructions are the result of I/O instructions written in a computer
program. The instruction in the program initiates each data item transfer. Usually, the program
controls data transfer to and from the CPU and peripheral. Transferring data under programmed
I/O requires constant monitoring of the peripherals by the CPU. The CPU has the following pair
of registers to interface with an I/O device:
• Interrupt Initiated I/O – The interface determines when the peripheral is ready for data
transfer, then it generates an interrupt. After receiving the interrupt signal, the CPU stops the
task it processes and service the I/O transfer. Then, it returns to its previous processing task.
Interrupts require CPU immediate attention (e.g., keyboard input, power failure, completion of
I/O, etc.). These are the following uses of interrupts:
o As an external event notifier. This process periodically checks for external events (ex.
checking keyboard input).
o As a means of allocating CPU time. The time between interrupt pulses is known as a
quantum, which represents the time that each program or process will have allotted to
it.
• Direct Memory Access (DMA) – It is a technique of removing the CPU from the path and letting
the peripheral device manage the memory buses directly to improve the speed of transfer. A
DMA controller manages the transfer of data between peripherals and memory unit. Many
hardware systems use DMA, such as disk drive controllers, graphic cards, network cards, sound
cards, etc. In DMA, the CPU initiates the transfer, does other operations while the transfer is in
progress, and receives an interrupt from the DMA controller when the transfer has been
completed. The three (3) main conditions to meet for a DMA to work are as follows:
o The I/O module must be able to read from and write to the memory
o Method to avoid conflict between the CPU and the I/O module writing to memory at
the same time.
o Buffer Chaining
The device hardware uses the next buffer on the list automatically.
o Operation Chaining
The processor gives a series of commands to the device, sometimes called a channel program.
The I/O controller serves as an intermediary interface between the CPU and a specific device that
accepts commands from the CPU and controls the exact device after. Most of the I/O controllers are
device controllers that serve as direct interfaces between a general system bus and each of the system’s
peripheral devices. In general, I/O controllers simplify the task of interfacing peripheral devices to a CPU.
I/O controllers offload a considerable amount of work from the CPU. They make it possible to control I/O
to a peripheral with a few simple I/O commands from the CPU. They also support DMA so the CPU may
be free to perform other tasks. Device controllers provide the specialized circuitry required to interface
different types of peripherals to the computer. I/O controllers allow the processing of each instruction to
progress in parallel.
• Interface translation – It includes the connection, voltage supply, protocol enactor, clocking.
• Addressing – It is able to process memory locations or addresses for the function of processing.
• Multiplexing – It can combine multiple signals over the bus to reduce multiple bus usage.
• Buffering – It gives data transfer a boost by preloading data into memory before processing.
Computer Drivers A device driver is a small piece of software that tells the operating system and other
software how to communicate with a piece of hardware. Device drivers are like translators between a
program being used and a device that program wants to utilize somehow. In other words, a software
program can provide information to a driver to explain what it wants a piece of hardware to do,
information the device driver understands and can fulfill with the hardware.