MSI Logic Circuits

Chapter 5
Decoders

The combinational circuit that change the binary information into 2^N output lines is known as Decoders. The
binary information is passed in the form of N input lines. The output lines define the 2^N-bit code for the binary
information. In simple words, the Decoder performs the reverse operation of the Encoder. At a time, only one
input line is activated for simplicity. The produced 2^N-bit output code is equivalent to the binary information.
2 to 4 line Decoder

In the 2 to 4 line decoder, there is a total of three inputs, i.e., A0, and A1 and E and four outputs, i.e.,
Y0, Y1, Y2, and Y3. For each combination of inputs, when the enable 'E' is set to 1, one of these four
outputs will be 1. The block diagram and the truth table of the 2 to 4 line decoder are given below.
 The logical expression of the

Logical Expression
term Y0, Y0, Y2, and Y3 is as
follows:
 3 to 8 Line Decoder
The 3 to 8 line decoder is also known as Binary to Octal Decoder. In a 3 to 8 line decoder, there is a total of eight
outputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three outputs, i.e., A0, A1, and A2. This circuit has an
enable input 'E'. Just like 2 to 4 line decoder, when enable 'E' is set to 1, one of these four outputs will be 1. The
block diagram and the truth table of the 3 to 8 line encoder are given below
Logical Expression
 4 to 16 Line Decoder with 3 to 8 Decoder
In the 4 to 16 line decoder, there is a total of 16 outputs, i.e., Y0, Y1, Y2,……, Y16 and four inputs, i.e., A0, A1,
A2, and A3. The 4 to 16 line decoder can be constructed using either 2 to 4 decoder or 3 to 8 decoder. There is
the following formula used to find the required number of lower-order decoders.
Logical Expression
Solved Problem
 BCD to 7 segment Decoder

Seven segment:Seven Segment display is an electronic device which consists of seven

Light Emitting Diodes (LEDs) arranged in a some definite pattern (common cathode or
common anode type), which is used to display Hexadecimal numerals(in this case decimal
numbers, as input is BCD i.e., 0-9).
Truth Table
 Encoders

The combinational circuits that change the binary information into N output lines are known as Encoders.
The binary information is passed in the form of 2^N input lines. The output lines define the N-bit code for
the binary information. In simple words, the Encoder performs the reverse operation of the Decoder. At a
time, only one input line is activated for simplicity. The produced N-bit output code is equivalent to the
binary information.
 4 to 2 Line Encoder

In 4 to 2 line encoder, there are total of four inputs, i.e., Y0, Y1, Y2, and Y3, and two outputs, i.e., A0 and A1.
In 4-input lines, one input-line is set to true at a time to get the respective binary code in the output side. Below
are the block diagram and the truth table of the 4 to 2 line encoder
Logic Diagram
 8 to 3 Line Encoder

The 8 to 3 line Encoder is also known as Octal to Binary Encoder. In 8 to 3 line encoder, there is a total of eight
inputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three outputs, i.e., A0, A1, and A2. In 8-input lines, one
input-line is set to true at a time to get the respective binary code in the output side. Below are the block diagram
and the truth table of the 8 to 3 line encoder.
Expression and Diagram
 Decimal to BCD Encoder
The block diagram and the truth table of the decimal to BCD encoder are given below.
Expression and Diagram
Priority Encoder
4 to 2 line Priority Encoder: In this priority encoder, there are total of 4 inputs, i.e., Y0, Y1, Y2, and Y3,
and two outputs, i.e., A0 and A1. The Y3 has high and Y0 has low priority inputs. When more than one
input is '1' at the same time, the output will be the (binary) code corresponding to the higher priority
input. Below is the truth table of the 4 to 2 line priority encoder.
Logic Diagram
 Multiplexer

A multiplexer is a combinational circuit that has 2^n input lines and a single output line. Simply, the multiplexer is a
multi-input and single-output combinational circuit. The binary information is received from the input lines and
directed to the output line. On the basis of the values of the selection lines, one of these data inputs will be
connected to the output.

Unlike encoder and decoder, there are n selection lines and 2^n input lines. So, there is a total of 2^N possible
combinations of inputs. A multiplexer is also treated as Mux.
 2×1 Multiplexer
In 2×1 multiplexer, there are only two inputs, i.e., A0 and A1, 1 selection line, i.e., S0 and single outputs, i.e., Y.
On the basis of the combination of inputs which are present at the selection line S0, one of these 2 inputs will be
connected to the output.
The block diagram and the truth table of the 2×1 multiplexer are given below.

The logical expression of the term

Y is as follows:

Y=S0'.A0+S0.A1
 4×1 Multiplexer:

In the 4×1 multiplexer, there is a total of four inputs, i.e., A0, A1, A2, and A3, 2 selection lines, i.e., S0 and S1 and
single output, i.e., Y. On the basis of the combination of inputs that are present at the selection lines S0 and S1,
one of these 4 inputs are connected to the output. The block diagram and the truth table of the 4×1 multiplexer
are given below.
The logical expression of the term Y is as follows:

Y=S1' S0' A0+S1' S0 A1+S1 S0' A2+S1 S0 A3

 8 to 1 Multiplexer
In the 8 to 1 multiplexer, there are total eight inputs, i.e., A0, A1, A2, A3, A4, A5, A6, and A7, 3 selection lines, i.e.,
S0, S1and S2 and single output, i.e., Y. On the basis of the combination of inputs that are present at the
selection lines S0, S1, and S2, one of these 8 inputs are connected to the output. The block diagram and the
truth table of the 8×1 multiplexer are given below.
 Expression and Logic Diagram

The logical expression of the term Y is as follows:

Y=S0'.S1'.S2'.A0+S0.S1'.S2'.A1+S0'.S1.S2'.A2+S0.S1.S2'.A
3+S0'.S1'.S2 A4+S0.S1'.S2 A5+S0'.S1.S2 .A6+S0.S1.S3.A7
 8 ×1 multiplexer using 4×1 and 2×1 multiplexer
We can implement the 8×1 multiplexer using a lower order multiplexer. To implement the 8×1 multiplexer, we
need two 4×1 multiplexers and one 2×1 multiplexer. The 4×1 multiplexer has 2 selection lines, 4 inputs, and 1
output. The 2×1 multiplexer has only 1 selection line. For getting 8 data inputs, we need two 4×1 multiplexers.
The 4×1 multiplexer produces one output. So, in order to get the final output, we need a 2×1 multiplexer. The
block diagram of 8×1 multiplexer using 4×1 and 2×1 multiplexer is given below.
 16×1 multiplexer using 8×1 and 2×1 multiplexer
We can implement the 16×1 multiplexer using a lower order multiplexer. To implement the 8×1 multiplexer, we
need two 8×1 multiplexers and one 2×1 multiplexer. The 8×1 multiplexer has 3 selection lines, 4 inputs, and 1
output. The 2×1 multiplexer has only 1 selection line. For getting 16 data inputs, we need two 8 ×1 multiplexers.
The 8×1 multiplexer produces one output. So, in order to get the final output, we need a 2×1 multiplexer. The
block diagram of 16×1 multiplexer using 8×1 and 2×1 multiplexer is given below.
 De-multiplexer

A De-multiplexer is a combinational circuit that has only 1 input line and 2^N output lines. Simply, the multiplexer
is a single-input and multi-output combinational circuit. The information is received from the single input lines
and directed to the output line. On the basis of the values of the selection lines, the input will be connected to
one of these outputs. De-multiplexer is opposite to the multiplexer.

Unlike encoder and decoder, there are n selection lines and 2n outputs. So, there is a total of 2^n possible
combinations of inputs. De-multiplexer is also treated as De-mux.

There are various types of De-multiplexer which are as follows:

 1×2 De-multiplexer:

In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y0, and Y1, 1 selection lines, i.e., S0, and single
input, i.e., A. On the basis of the selection value, the input will be connected to one of the outputs. The block
diagram and the truth table of the 1×2 multiplexer are given below.

The logical expression of the term

Y is as follows:
Y0=S0'.A
Y1=S0.A
 1×4 De-multiplexer:
In 1 to 4 De-multiplexer, there are total of four outputs, i.e., Y0, Y1, Y2, and Y3, 2 selection lines, i.e., S0 and S1
and single input, i.e., A. On the basis of the combination of inputs which are present at the selection lines S0 and
S1, the input be connected to one of the outputs. The block diagram and the truth table of the 1×4 multiplexer are
given below.
 Expression and Logic Diagram

The logical expression of the term

Y is as follows:

Y0=S1' S0' A
y1=S1' S0 A
y2=S1 S0' A
y3=S1 S0 A
 1×8 De-multiplexer
In 1 to 8 De-multiplexer, there are total of eight outputs, i.e., Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7, 3 selection
lines, i.e., S0, S1and S2 and single input, i.e., A. On the basis of the combination of inputs which are present at
the selection lines S0, S1 and S2, the input will be connected to one of these outputs. The block diagram and
the truth table of the 1×8 de-multiplexer are given below.
Logic Expression and Diagram

The logical expression of the term

Y is as follows:

Y0=S0'.S1'.S2'.A
Y1=S0.S1'.S2'.A
Y2=S0'.S1.S2'.A
Y3=S0.S1.S2'.A
Y4=S0'.S1'.S2 A
Y5=S0.S1'.S2 A
Y6=S0'.S1.S2 A
Y7=S0.S1.S3.A
 1×8 De-multiplexer using 1×4 and 1×2
de-multiplexer
We can implement the 1×8 de-multiplexer using a lower order de-multiplexer. To implement the 1×8
de-multiplexer, we need two 1×4 de-multiplexer and one 1×2 de-multiplexer. The 1×4 multiplexer has 2
selection lines, 4 outputs, and 1 input. The 1×2 de-multiplexer has only 1 selection line.

For getting 8 data outputs, we need two 1×4 de-multiplexer. The 1×2 de-multiplexer produces two outputs.
So, in order to get the final output, we have to pass the outputs of 1×2 de-multiplexer as an input of both
the 1×4 de-multiplexer. The block diagram of 1×8 de-multiplexer using 1×4 and 1×2 de-multiplexer is given
below.
Block Diagram
 1×16 de-multiplexer using 1×8 and 1×2
de-multiplexer

We can implement the 1×16 de-multiplexer using a lower order de-multiplexer. To implement the 1×16
de-multiplexer, we need two 1×8 de-multiplexer and one 1×2 de-multiplexer. The 1×8 multiplexer has 3
selection lines, 1 input, and 8 outputs. The 1×2 de-multiplexer has only 1 selection line.

For getting 16 data outputs, we need two 1×8 de-multiplexer. The 1×8 de-multiplexer produces eight
outputs. So, in order to get the final output, we need a 1×2 de-multiplexer to produce two outputs from a
single input. Then we pass these outputs into both the de-multiplexer as an input. The block diagram of
1×16 de-multiplexer using 1×8 and 1×2 de-multiplexer is given below.
Block Diagram