Dfca Unit I
Dfca Unit I
Poosaripatti, Pollachi
CLASS : I B.Sc. - CS & I - SEM
SUBJECT: DIGITAL FUNDAMENTALS AND COMPUTER ARCHITECTURE DATE: 27.07.2018
UNIT – I
Number System and Binary Codes
The technique to represent and work with numbers is called number system. Decimal number
system is the most common number system. Other popular number systems include binary
number system, octal number system, hexadecimal number system, etc.
Decimal Number System
Decimal number system is a base 10 number system having 10 digits from 0 to 9. This means
that any numerical quantity can be represented using these 10 digits. Decimal number system is
also a positional value system. This means that the value of digits will depend on its position. Let
us take an example to understand this.
Say we have three numbers – 734, 971 and 207. The value of 7 in all three numbers is different−
In 734, value of 7 is 7 hundreds or 700 or 7 × 100 or 7 × 10 2
In 971, value of 7 is 7 tens or 70 or 7 × 10 or 7 × 10 1
In 207, value 0f 7 is 7 units or 7 or 7 × 1 or 7 × 10 0
In digital systems, instructions are given through electric signals; variation is done by varying the
voltage of the signal. Having 10 different voltages to implement decimal number system in
digital equipment is difficult. So, many number systems that are easier to implement digitally
have been developed. Let’s look at them in detail.
Binary Number System
The easiest way to vary instructions through electric signals is two-state system – on and off. On
is represented as 1 and off as 0, though 0 is not actually no signal but signal at a lower voltage.
The number system having just these two digits – 0 and 1 – is called binary number system.
Each binary digit is also called a bit. Binary number system is also positional value system,
where each digit has a value expressed in powers of 2, as displayed here.
In any binary number, the rightmost digit is called least significant bit (LSB) and leftmost digit is
called most significant bit (MSB).
And decimal equivalent of this number is sum of product of each digit with its positional value.
110102 = 1×24 + 1×23 + 0×22 + 1×21 + 0×20
= 16 + 8 + 0 + 2 + 0
= 2610
Octal Number System
Octal number system has eight digits – 0, 1, 2, 3, 4, 5, 6 and 7. Octal number system is also a
positional value system with where each digit has its value expressed in powers of 8, as shown
here −
Decimal equivalent of any octal number is sum of product of each digit with its positional value.
7268 = 7×82 + 2×81 + 6×80
= 448 + 16 + 6
= 47010
Hexadecimal Number System
Octal number system has 16 symbols – 0 to 9 and A to F where A is equal to 10, B is equal to 11
and so on till F. Hexadecimal number system is also a positional value system with where each
digit has its value expressed in powers of 16, as shown here −
Decimal equivalent of any hexadecimal number is sum of product of each digit with its
positional value.
27FB16 = 2×163 + 7×162 + 15×161 + 10×160
= 8192 + 1792 + 240 +10
= 1023410
Number System Relationship
The following table depicts the relationship between decimal, binary, octal and hexadecimal
number systems.
HEXA DECIMAL OCTAL BINARY
DECIMAL
0 0 0 0000
1 1 1 0001
2 2 2 0010
3 3 3 0011
4 4 4 0100
5 5 5 0101
6 6 6 0110
7 7 7 0111
8 8 10 1000
9 9 11 1001
A 10 12 1010
B 11 13 1011
C 12 14 1100
D 13 15 1101
E 14 16 1110
F 15 17 1111
Decimal to Binary
Decimal numbers can be converted to binary by repeated division of the number by 2 while
recording the remainder. Let’s take an example to see how this happens.
The remainders are to be read from bottom to top to obtain the binary equivalent.
4310 = 1010112
Decimal to Octal
Decimal numbers can be converted to octal by repeated division of the number by 8 while
recording the remainder. Let’s take an example to see how this happens.
10110010102 = 26258
Binary to Hexadecimal
To convert a binary number to hexadecimal number, these steps are followed −
Starting from the least significant bit, make groups of four bits.
If there are one or two bits less in making the groups, 0s can be added after the most significant
bit.
Convert each group into its equivalent octal number.
Let’s take an example to understand this.
101101101012 = DB516
Binary Equivalent 000 001 010 011 100 101 110 111
546738 = 1011001101110112
Octal to Decimal
For example the system radix of octal is 8, since any of the 8 values from 0 to 7 can be written as
a single digit.
Convert 1268 to decimal.
Using the values of each column, (which in an octal integer are powers of 8) the octal value
1268 can also be written as:
(1x82) + (2x81) + (6 x 80)
As (82 = 64), (81 = 8) and (80 =1), this gives a multiplier value for each column.
Multiply the digit in each column by the column multiplier value for that column to give:
1x64 = 64 2x8 =16 6x1 = 6
Then simply add these results to give the decimal value.
64 + 16 + 6 = 8610
Therefore 1268 = 8610.
Octal to Hexadecimal
When converting from octal to hexadecimal, it is often easier to first convert the octal number
into binary and then from binary into hexadecimal. For example, to convert 345 octal into hex:
1) octal to hexadecimal
Octal = 3 4 5
Binary = 011 100 101 = 011100101 binary
Drop any leading zeros or pad with leading zeros to get groups of four binary digits (bits):
Binary 011100101 = 1110 0101
Then 2) binary into hexadecimal
Binary = 1110 0101
Hexadecimal = E 5 = E5 hex
Therefore, through a two-step conversion process, octal 345 equals binary 011100101 equals
hexadecimal E5.
Hexadecimal to Binary
Hexadecimal to Binary is a trivial conversion. Each hexadecimal digit can be directly converted
to its four bit binary equivalent.
For example the hex number FACE16 can be converted by converting F to 1111, A to 1010, C to
1100 and E to 1110. The binary number is then simply 1111101011001110.
FACE16 = 11111010110011102
Hexadecimal to Decimal
Convert B2D16 to decimal. Using the same method to convert hexadecimal to decimal.
= (Bx162)+(2x161)+(Dx160)
= (11x162)+(2x161)+(13x160)
= 2816 + 32 +13
= 286110
Therefore B2D16 = 286110.
Hexadecimal to Octal
When converting from hexadecimal to octal, it is often easier to first convert the hexadecimal
number into binary and then from binary into octal.
For example, to convert A2DE hex into octal:
1) hexadecimal number into binary
Hexadecimal = A 2 D E
Binary = 1010 0010 1101 1110 = 1010001011011110 binary
Add leading zeros or remove leading zeros to group into sets of three binary digits.
Binary: 1010001011011110 = 001 010 001 011 011 110
2) then binary into octal
Binary = 001 010 001 011 011 110
Octal = 1 2 1 3 3 6 = 121336 octal
Therefore, through a two-step conversion process, hexadecimal A2DE equals binary
1010001011011110 equals octal 121336.
Note: Computer memory is measured in terms of how many bits it can store. Here is a chart for
memory capacity conversion.
1 byte (B) = 8 bits
1 Kilobytes (KB) = 1024 bytes
1 Megabyte (MB) = 1024 KB
1 Gigabyte (GB) = 1024 MB
1 Terabyte (TB) = 1024 GB
1 Exabyte (EB) = 1024 PB
1 Zettabyte = 1024 EB
1 Yottabyte (YB) = 1024 ZB
1 Bit
4 Nibble
8 Byte
16 Word
32 Double Word
64 Quad Word
BINARY ARITHMETIC
Binary arithmetic is essential part of all the digital computers and many other digital system.
Binary Addition
It is a key for binary subtraction, multiplication, division. There are four rules of binary addition.
In fourth case, a binary addition is creating a sum of 1+1=101+1=10 i.e. 0 is written in the given column
and a carry of 1 over to the next column.
Example − Addition
Binary Subtraction
Subtraction and Borrow, these two words will be used very frequently for the binary subtraction. There
are four rules of binary subtraction.
Example − Subtraction
Binary Multiplication
Binary multiplication is similar to decimal multiplication. It is simpler than decimal multiplication
because only 0s and 1s are involved. There are four rules of binary multiplication.
Example − Multiplication
Binary Division
Binary division is similar to decimal division. It is called as the long division procedure.
Example − Division
1's complement
The 1's complement of a number is found by changing all 1's to 0's and all 0's to 1's. This is
called as taking complement or 1's complement. Example of 1's Complement is as follows.
2's complement
The 2's complement of binary number is obtained by adding 1 to the Least Significant Bit (LSB)
of 1's complement of the number.
2's complement = 1's complement + 1
Example of 2's Complement is as follows.
Subtraction by 1’s Complement
In subtraction by 1’s complement we subtract two binary numbers using carried by 1’s
complement.
The steps to be followed in subtraction by 1’s complement are:
i) To write down 1’s complement of the subtrahend.
ii) To add this with the minuend.
iii) If the result of addition has a carryover then it is dropped and an 1 is added in the last
bit.
iv) If there is no carry over, then 1’s complement of the result of addition is obtained to get
the final result and it is negative.
Evaluate:
(i) 110101 – 100101
Solution:
1’s complement of 10011 is 011010. Hence
Minued - 110101
010000
The required difference is 10000
(ii) 101011 – 111001
Solution:
1’s complement of 111001 is 000110. Hence
Minued - 101011
110001
Hence the difference is – 1 1 1 0
(iii) 1011.001 – 110.10
Solution:
1’s complement of 0110.100 is 1001.011 Hence
Minued - 1011.001
0100.101
00101.01
11011.10
Hence the required difference is – 00100.01 i.e. – 100.01
The following examples on subtraction by 2’s complement will make the procedure clear:
Evaluate:
(i) 110110 - 10110
Solution:
The numbers of bits in the subtrahend is 5 while that of minuend is 6. We make the number of
bits in the subtrahend equal to that of minuend by taking a `0’ in the sixth place of the
subtrahend.
Now, 2’s complement of 010110 is (101101 + 1) i.e.101010. Adding this with the minuend.
1 10110 Minuend
Minuend - 10110
Minuend - 1010.11
Result
(11101)2 = (00101001)BCD
Step 1 29 / 2 14 1
Step 2 14 / 2 7 0
Step 3 7/2 3 1
Step 4 3/2 1 1
Step 5 1/2 0 1
As mentioned in Steps 2 and 4, the remainders have to be arranged in the reverse order so that
the first remainder becomes the least significant digit (LSD) and the last remainder becomes the
most significant digit (MSD).
Decimal Number − 2910 = Binary Number − 111012
Result
(00101001)BCD = (11101)2
Excess-3 code
The Excess-3 code is also called as XS-3 code. It is non-weighted code used to express decimal
numbers. The Excess-3 code words are derived from the 8421 BCD code words adding (0011)2
or (3)10 to each code word in 8421. The excess-3 codes are obtained as follows −
Example
BCD to Excess-3
Steps
Step 1 -- Convert BCD to decimal.
Step 2 -- Add (3)10 to this decimal number.
Step 3 -- Convert into binary to get excess-3 code.
Example − convert (1001)BCD to Excess-3.
Result
(10011010)XS-3 = (01100111)BCD
Gray Code
It is the non-weighted code and it is not arithmetic codes. That means there are no specific
weights assigned to the bit position. It has a very special feature that, only one bit will change
each time the decimal number is incremented as shown in fig. As only one bit changes at a time,
the gray code is called as a unit distance code. The gray code is a cyclic code. Gray code cannot
be used for arithmetic operation.
Application of Gray code
Gray code is popularly used in the shaft position encoders.
A shaft position encoder produces a code word which represents the angular position of the shaft.
One example given below will make your idea clear. The
M.S.B of the binary will be 0 as the M.S.B of gray is 0. Now move to the next gray bit.
As it is 1 the previous binary bit will alter i.e it will be 1, thus the second binary bit will be
1. Next look at the third bit of the gray code. It is again 1 thus the previous bit i.e the
second binary bit will again alter and the third bit of the binary number will be 0. Now,
4th bit of the given gray is 0 so the previous binary bit will be unchanged, i.e 4th binary
bit will be 0. Now again the 5th grey bit is 1 thus the previous binary bit will alter, it will
be 1 from 0. Therefore the equivalent Binary number in case of gray code to binary
conversion will be (01001).
AND gate
Input 1 Input 2 Output
0 0 0
0 1 0
1 0 0
1 1 1
The OR gate gets its name from the fact that it behaves after the fashion of the logical inclusive
"or." The output is "true" if either or both of the inputs are "true." If both inputs are "false," then
the output is "false."
OR gate
A logical inverter, sometimes called a NOT gate to differentiate it from other types of electronic
inverter devices, has only one input. It reverses the logic state.
The NAND gate operates as an AND gate followed by a NOT gate. It acts in the manner of the
logical operation "and" followed by negation. The output is "false" if both inputs are "true."
Otherwise, the output is "true."
NAND gate
Input 1 Input 2 Output
0 0 1
0 1 1
1 0 1
1 1 0
The NOR gate is a combination OR gate followed by an inverter. Its output is "true" if both
inputs are "false." Otherwise, the output is "false."
NOR gate
Input 1 Input 2 Output
0 0 1
0 1 0
1 0 0
1 1 0
The XOR ( exclusive-OR ) gate acts in the same way as the logical "either/or." The output is
"true" if either, but not both, of the inputs are "true." The output is "false" if both inputs are
"false" or if both inputs are "true." Another way of looking at this circuit is to observe that the
output is 1 if the inputs are different, but 0 if the inputs are the same.
XOR gate
Input Input Output
1 2
0 0 0
0 1 1
1 0 1
1 1 0
The XNOR (exclusive-NOR) gate is a combination XOR gate followed by an inverter. Its output
is "true" if the inputs are the same, and"false" if the inputs are different.
XNOR gate
Input Input Output
1 2
0 0 1
0 1 0
1 0 0
1 1 1
Half Adder
A logic circuit block used for adding two one bit numbers or simply two bits is called as a half
adder circuit. This circuit has two inputs which accept the two bits and two outputs, with one
producing sum output and other produce carry output.
As we discussed above that binary addition is commonly performed by Ex-OR gate, but for the
first three rules , it performs the binary addition and when the two inputs are logic 1, it does
not develop any carry.
To accomplish the binary addition with Ex-OR gate, there is need of additional circuitry to
perform the carry operation. Hence, a half adder is formed by connecting AND gate to the input
terminals of the Ex-OR gate so as to produce the carry as shown in below figure.
In the above half adder , inputs are labeled as A and B. The sum output is labeled with the
summation symbol ? and the carry output or carry out is labeled with Co. Half adder is mainly
used for addition of augend and addend of first order binary numbers.
Half adder has limited number of applications, and practically not used in the application
especially multi-digit addition. In such applications carry of the previous digit addition must be
added along with two bits; hence it is three bits addition.
Full Adder
A binary full adder is a multiple output combinational logic network that performs the
arithmetic sum of three input bits. As we have seen that the half adder cannot respond to the
three inputs and hence the full adder is used to add three digits at a time.
It consists of three inputs, in which two are input variables represent the two significant bits to
be added, labeled as A and B, whereas the third input terminal is the carry from the previous
lower significant position and labeled as Cin. The two outputs are a sum and a carry outputs,
which are labeled as sum and Cout respectively.
Full adder can be formed by combining two half adders and an OR gate as shown in above
where output and carry-in of the first adder becomes the input to the second half adder that
produce the total sum output. The total carry out is produced by ORing the two half adder carry
outs as shown in figure. The full adder block diagram and truth table is shown below.
Parallel Binary Adders
As we discussed that a single full adder performs the addition of two one bit numbers and an
input carry. For performing the addition of binary numbers with more than one bit, more than
one full adder is required depends on the number bits. Thus, a parallel adder is used for adding
all bits of the two numbers simultaneously.
By connecting a number of full adders in parallel, n-bit parallel adder is constructed. From the
below figure, it is to be noted that there is no carry at the least significant position, hence we
can use either a half adder or made the carry input of full adder to zero at this position.
The figure below shows a parallel 4 bit binary adder which has three full adders and one half-
adder. The two binary numbers to be added are A3A2A1A0 and B3B2B1B0 which are applied to
the corresponding inputs of full adders. This parallel adder produces their sum as C4S3S2S1S0
where C4 is the final carry.
In the 4 bit adder, first block is a half-adder that has two inputs as A0B0 and produces their sum
S0 and a carry bit C1. Next block should be full adder as there are three inputs applied to it.
Hence this full adder produces their sum S1 and a carry C2. This will be followed by other two
full adders and thus the final sum is C4S3S2S1S0.
Most commonly Full adders designed in dual in-line package integrated circuits. A typical
74LS283 is a 4 bit full adder. Arithmetic and Logic Unit of a unit computer consist of these
parallel adders to perform the addition of binary numbers.
Half Subtractors
A half subtractor is a multiple output combinational logic network that does the subtraction of
two bits of binary data. It has input variables and two output variables. Two inputs are
corresponding to two input bits and two output variables corresponds to the difference bit and
borrow bit.
The binary subtraction is also performed by the Ex-OR gate with additional circuitry to perform
the borrow operation. Thus, a half subtractor is designed by an Ex-OR gate including AND gate
with A input complemented before fed to the gate.
The block model, truth table and logic diagram of a half subtractor shown in above figure. This
circuit is similar to the half adder with only difference in input A i.e., minuend which is
complemented before applied at the AND gate to implement the borrow output.
In case of multi-digit subtraction, subtraction between the two digits must be performed along
with borrow of the previous digit subtraction, and hence a subtractor needs to have three inputs.
Therefore, a half subtractor has limited applications and strictly it is not used in practice.
Full Subtractor
A combinational logic circuit performs a subtraction between the two binary bits by considering
borrow of the lower significant stage is called as the full subtractor. In this, subtraction of the
two digits is performed by taking into consideration whether a 1 has already borrowed by the
previous adjacent lower minuend bit or not.
It has three input terminals in which two terminals corresponds to the two bits to be subtracted
(minuend A and subtrahend B), and a borrow bit Bi corresponds to the borrow operation. There
are two outputs, one corresponds to the difference D output and other borrow output Bo as
shown in figure along with truth table.
By deriving the Boolean expression for the full subtractor from above truth table, we get the
expression that tells that a full subtractor can be implemented with half subtractors with OR gate
as shown in figure below.
By comparing the adder and subtractor circuits or truth tables, one can observe that the output D
in the full subtractor is exactly same as the output S of the full adder. And the only difference is
that input variable A is complemented in the full subtractor.
Therefore, it is possible to convert the full adder circuit into full subtractor by simply
complementing the input A before it is applied to the gates to produce the final borrow bit output
Bo.
It is also possible to design a 4 bit parallel subtractor 4 full adders as shown in the below figure.
This circuit performs the subtraction operation by considering the principle that the addition of
minuend and the complement of the subtrahend is equivalent to the subtraction process.
We know that the subtraction of A by B is obtained by taking 2’s complement of B and adding it
to A. The 2’s complement of B is obtained by taking 1’s complement and adding 1 to the least
significant pair of bits.
Hence, in this circuit 1’s complement of B is obtained with the inverters (NOT gate) and a 1 can
be added to the sum through the input carry.
BCD Adder:
The digital systems handles the decimal number in the form of binary coded decimal
numbers (BCD). A BCD adder is a circuit that adds two BCD digits and produces a sum
digit also in BCD. BCD numbers use 10 digits, 0 to 9 which are represented in the binary
form 0 0 0 0 to 1 0 0 1, i.e. each BCD digit is represented as a 4-bit binary number. When
we write BCD number say 526, it can be represented as
Here, we should note that BCD cannot be greater than 9. The addition of two BCD numbers
can be best understood by considering the three cases that occur when two BCD digits are
added.
Sum Equals 9 or less with carry 0
Let us consider additions of 3 and 6 in BCD.
The addition is carried out as in normal binary addition and the sum is 1 0 0 1,
which is BCD code for 9.
Sum greater than 9 with carry 0
The sum 1 1 1 0 is an invalid BCD number. This has occurred because the sum of the two
digits exceeds 9. Whenever this occurs the sum has to be corrected by the addition of six
(0110) in the invalid BCD number, as shown below
After addition of 6 carry is produced into the second decimal position. Sum equals 9 or
less with carry 1
Let us consider addition of 8 and 9 in BCD
In this, case, result (0001 0001) is valid BCD number, but it is incorrect. To get the correct
BCD result correction factor of 6 has to be added to the least significant digit sum, as shown
below
Going through these three cases of BCD addition we can summarise the BCD addition
procedure as follows :
1. Add two BCD numbers using ordina7 binary addition.
2. If four-bit sum is equal to or less than 9, no correction is needed. The sum is in proper BCD form.
3. If the four-bit sum is greater than 9 or if a carry is generated from the four-bit sum, the sum is invalid.
4. To correct the invalid sum, add 01102 to the four-bit sum. If a carry results from this addition, add it to
the next higher-order BCD digit.
5. Thus to implement BCD adder we require :
6. 4-bit binary adder for initial addition
7. Logic circuit to detect sum greater than 9 and
8. One more 4-bit adder to add 01102 in the sum if sum is greater than 9 or carry is 1.
The logic circuit to detect sum greater than 9 can be determined by simplifying the boolean
expression of given truth table.
With this design information we can draw the block diagram of BCD adder, as shown in the Fig. 3.32.
As shown in the Fig. 3.32 , the two BCD numbers, together with input carry, are first added
in the top 4-bit binary adder to produce a binary sum. When the output carry is equal to zero
(i.e. when sum ≤ 9 and C out = 0) nothing (zero) is added to the binary sum. When it is equal
to one (i.e. when sum > 9 or Cout = 1), binary 0110 is added to the binary sum through the
bottom 4-bit binary adder. The output carry generated from the bottom binary adder can be
ignored, since it supplies information already available at the output-carry terminal.
End of UNIT - I