Associative memory is also known as content addressable memory (CAM) or

associative storage or associative array. It is a special type of memory that is optimized

for performing searches through data, as opposed to providing a simple direct access to
the data based on the address.
Associative memory of conventional semiconductor memory (usually RAM) with added
comparison circuity that enables a search operation to complete in a single clock cycle. It
is a hardware search engine, a special type of computer memory used in certain very
high searching applications.
Applications of Associative memory :-
1. It can be only used in memory allocation format.
2. It is widely used in the database management systems, etc.
Advantages of Associative memory :-
1. It is used where search time needs to be less or short.
2. It is suitable for parallel searches.
3. It is often used to speedup databases.
4. It is used in page tables used by the virtual memory and used in neural networks.
Disadvantages of Associative memory :-
1. It is more expensive than RAM.
2. Each cell must have storage capability and logical circuits for matching its content with
external argument.
What is Cache Mapping?
As we know that the cache memory bridges the mismatch of speed between the main memory and the
processor. Whenever a cache hit occurs,

 The word that is required is present in the memory of the cache.

 Then the required word would be delivered from the cache memory to the CPU.
And, whenever a cache miss occurs,

 The word that is required isn’t present in the memory of the cache.
 The page consists of the required word that we need to map from the main memory.
 We can perform such a type of mapping using various different techniques of cache mapping.
Let us discuss different techniques of cache mapping in this article.

Process of Cache Mapping

The process of cache mapping helps us define how a certain block that is present in the main memory gets
mapped to the memory of a cache in the case of any cache miss.
In simpler words, cache mapping refers to a technique using which we bring the main memory into the cache
memory. Here is a diagram that illustrates the actual process of mapping:

Now, before we proceed ahead, it is very crucial that we note these points:

Important Note:
 The main memory gets divided into multiple partitions of equal size, known as the frames or blocks.
 The cache memory is actually divided into various partitions of the same sizes as that of the blocks,
known as lines.
 The main memory block is copied simply to the cache during the process of cache mapping, and this
block isn’t brought at all from the main memory.

Techniques of Cache Mapping

One can perform the process of cache mapping using these three techniques given as follows:
1. K-way Set Associative Mapping
2. Direct Mapping
3. Fully Associative Mapping

1. Direct Mapping
In the case of direct mapping, a certain block of the main memory would be able to map a cache only up to a
certain line of the cache. The total line numbers of cache to which any distinct block can map are given by the
following:

Cache line number = (Address of the Main Memory Block ) Modulo

(Total number of lines in Cache)
For example,

 Let us consider that particular cache memory is divided into a total of ‘n’ number of lines.
 Then, the block ‘j’ of the main memory would be able to map to line number only of the cache (j mod n).
The Need for Replacement Algorithm
In the case of direct mapping,

 There is no requirement for a replacement algorithm.

 It is because the block of the main memory would be able to map to a certain line of the cache only.
 Thus, the incoming (new) block always happens to replace the block that already exists, if any, in this
certain line.

Division of Physical Address

In the case of direct mapping, the division of the physical address occurs as follows:

2. Fully Associative Mapping

In the case of fully associative mapping,

 The main memory block is capable of mapping to any given line of the cache that’s available freely at
that particular moment.
 It helps us make a fully associative mapping comparatively more flexible than direct mapping.
For Example
Let us consider the scenario given as follows:

Here, we can see that,

 Every single line of cache is available freely.

 Thus, any main memory block can map to a line of the cache.
 In case all the cache lines are occupied, one of the blocks that exists already needs to be replaced.

The Need for Replacement Algorithm

In the case of fully associative mapping,

 The replacement algorithm is always required.

 The replacement algorithm suggests a block that is to be replaced whenever all the cache lines happen
to be occupied.
 So, replacement algorithms such as LRU Algorithm, FCFS Algorithm, etc., are employed.

Division of Physical Address

In the case of fully associative mapping, the division of the physical address occurs as follows:

3. K-way Set Associative Mapping

In the case of k-way set associative mapping,

 The grouping of the cache lines occurs into various sets where all the sets consist of k number of lines.
 Any given main memory block can map only to a particular cache set.
 However, within that very set, the block of memory can map any cache line that is freely available.
 The cache set to which a certain main memory block can map is basically given as follows:
Cache set number = ( Block Address of the Main Memory ) Modulo (Total Number of sets present in the Cache)

For Example
Let us consider the example given as follows of a two-way set-associative mapping:

In this case,

 k = 2 would suggest that every set consists of two cache lines.

 Since the cache consists of 6 lines, the total number of sets that are present in the cache = 6 / 2 = 3
sets.
 The block ‘j’ of the main memory is capable of mapping to the set number only (j mod 3) of the cache.
 Here, within this very set, the block ‘j’ is capable of mapping to any cache line that is freely available at
that moment.
 In case all the available cache lines happen to be occupied, then one of the blocks that already exist
needs to be replaced.

The Need for Replacement Algorithm

In the case of k-way set associative mapping,

 The k-way set associative mapping refers to a combination of the direct mapping as well as the fully
associative mapping.
 It makes use of the fully associative mapping that exists within each set.
 Therefore, the k-way set associative mapping needs a certain type of replacement algorithm.
Division of Physical Address
In the case of fully k-way set mapping, the division of the physical address occurs as follows:

Special Cases

 In case k = 1, the k-way set associative mapping would become direct mapping. Thus,
Direct Mapping = one-way set associative mapping

 In the case of k = The total number of lines present in the cache, then the k-way set associative mapping
would become fully associative mapping.

Frequently Asked Questions on Cache Mapping

What is cache mapping and its type?

Cache mapping refers to a technique using which the content present in the main memory is brought into the
memory of the cache. Three distinct types of mapping are used for cache memory mapping: Direct, Associative
and Set-Associative mapping.

Why do we need cache mapping?

The Cache Memory refers to a special, very high-speed memory that is used when we want to speed up and
synchronize with a high-speed CPU. The cache holds data and instructions that are frequently requested so that
they are available immediately to the CPU as and when needed. The cache memory is used to reduce the
overall average time that is required to access data and information from the main memory.

What is cache in simple terms?

A cache, in simpler words, refers to a block of memory used for storing data that is most likely used again. The
hard drive and CPU often make use of a cache, just like the web servers and web browsers do. Any cache is
made up of numerous entries, known as a pool.

What are the 3 types of cache memory?

The three types of general cache are:

 The L1 cache, also known as the primary cache, is very fast, but it is relatively small. It is embedded
usually in the processor chip in the form of the CPU cache.
 The secondary cache, also known as the L2 cache, is often comparatively more capacious than the L1
cache.
 The Level 3 (or L3) cache refers to a specialized memory that is developed in order to improve the actual
performance of the L1 and L2.
Cache Memory is a special very high-speed memory. It is used to speed up and
synchronizing with high-speed CPU. Cache memory is costlier than main memory or disk
memory but economical than CPU registers. Cache memory is an extremely fast memory
type that acts as a buffer between RAM and the CPU. It holds frequently requested data
and instructions so that they are immediately available to the CPU when needed.
Cache memory is used to reduce the average time to access data from the Main
memory. The cache is a smaller and faster memory which stores copies of the data from
frequently used main memory locations. There are various different independent caches
in a CPU, which store instructions and data.

Levels of memory:
 Level 1 or Register –
It is a type of memory in which data is stored and accepted that are immediately
stored in CPU. Most commonly used register is accumulator, Program counter,
address register etc.
 Level 2 or Cache memory –
It is the fastest memory which has faster access time where data is temporarily stored
for faster access.
 Level 3 or Main Memory –
It is memory on which computer works currently. It is small in size and once power is
off data no longer stays in this memory.
 Level 4 or Secondary Memory –
It is external memory which is not as fast as main memory but data stays permanently
in this memory.
Cache Performance:
When the processor needs to read or write a location in main memory, it first checks for a
corresponding entry in the cache.
 If the processor finds that the memory location is in the cache, a cache hit has
occurred and data is read from cache
 If the processor does not find the memory location in the cache, a cache miss has
occurred. For a cache miss, the cache allocates a new entry and copies in data from
main memory, then the request is fulfilled from the contents of the cache.
The performance of cache memory is frequently measured in terms of a quantity
called Hit ratio.
Hit ratio = hit / (hit + miss) = no. of hits/total accesses
We can improve Cache performance using higher cache block size, higher associativity,
reduce miss rate, reduce miss penalty, and reduce the time to hit in the cache.
Cache Mapping:
There are three different types of mapping used for the purpose of cache memory which
are as follows: Direct mapping, Associative mapping, and Set-Associative mapping.
These are explained below.
1. Direct Mapping –
The simplest technique, known as direct mapping, maps each block of main memory
into only one possible cache line. or
In Direct mapping, assign each memory block to a specific line in the cache. If a line is
previously taken up by a memory block when a new block needs to be loaded, the old
block is trashed. An address space is split into two parts index field and a tag field.
The cache is used to store the tag field whereas the rest is stored in the main
memory. Direct mapping`s performance is directly proportional to the Hit ratio.
2. i = j modulo m
3. where
4. i=cache line number
5. j= main memory block number
m=number of lines in the cache
For purposes of cache access, each main memory address can be viewed as
consisting of three fields. The least significant w bits identify a unique word or byte
within a block of main memory. In most contemporary machines, the address is at the
byte level. The remaining s bits specify one of the 2 s blocks of main memory. The
cache logic interprets these s bits as a tag of s-r bits (most significant portion) and a
line field of r bits. This latter field identifies one of the m=2 r lines of the cache.
6. Associative Mapping –
In this type of mapping, the associative memory is used to store content and
addresses of the memory word. Any block can go into any line of the cache. This
means that the word id bits are used to identify which word in the block is needed, but
the tag becomes all of the remaining bits. This enables the placement of any word at
any place in the cache memory. It is considered to be the fastest and the most flexible
mapping form.

7. Set-associative Mapping –
This form of mapping is an enhanced form of direct mapping where the drawbacks of
direct mapping are removed. Set associative addresses the problem of possible
thrashing in the direct mapping method. It does this by saying that instead of having
exactly one line that a block can map to in the cache, we will group a few lines
together creating a set. Then a block in memory can map to any one of the lines of a
specific set..Set-associative mapping allows that each word that is present in the
cache can have two or more words in the main memory for the same index address.
Set associative cache mapping combines the best of direct and associative cache
mapping techniques.
In this case, the cache consists of a number of sets, each of which consists of a
number of lines. The relationships are
m = v * k
i= j mod v

where
i=cache set number
j=main memory block number
v=number of sets
m=number of lines in the cache number of sets
k=number of lines in each set
Application of Cache Memory –
1. Usually, the cache memory can store a reasonable number of blocks at any given
time, but this number is small compared to the total number of blocks in the main
memory.
2. The correspondence between the main memory blocks and those in the cache is
specified by a mapping function.

Types of Cache –
 Primary Cache –
A primary cache is always located on the processor chip. This cache is small and
its access time is comparable to that of processor registers.
 Secondary Cache –
Secondary cache is placed between the primary cache and the rest of the memory.
It is referred to as the level 2 (L2) cache. Often, the Level 2 cache is also housed
on the processor chip.

Locality of reference –
Since size of cache memory is less as compared to main memory. So to check which
part of main memory should be given priority and loaded in cache is decided based on
locality of reference.
Types of Locality of reference
5. Spatial Locality of reference
This says that there is a chance that element will be present in the close proximity
to the reference point and next time if again searched then more close proximity to
the point of reference.
6. Temporal Locality of reference
In this Least recently used algorithm will be used. Whenever there is page fault
occurs within a word will not only load word in main memory but complete page
 fault will be loaded because spatial locality of reference rule says that if you are
referring any word next word will be referred in its register that’s why we load
complete page table so the complete block will be loaded.

In Cache memory, data is transferred as a block from primary memory to cache memory. This process is
known as Cache Mapping.

There are three types of cache mapping:

1. Associative mapping
2. Set-associative mapping
3. Direct mapping
We will study about each cache mapping process in detail.

Associative Mapping

In associative mapping both the address and data of the memory word are stored.
The associative mapping method used by cache memory is very flexible one as well as very fast.
This mapping method is also known as fully associative cache.

Advantages of associative mapping

 Associative mapping is fast.
 Associative mapping is easy to implement.
Disadvantages of associative mapping
 Cache Memory implementing associative mapping is expensive as it requires to store address along
with the data.

Direct Mapping

In direct mapping cache, instead of storing total address information with data in cache only part of address
bits is stored along with data.
The new data has to be stored only in a specified cache location as per the mapping rule for direct
mapping. So it doesn't need replacement algorithm.

Advantages of direct mapping

 Direct mapping is simplest type of cache memory mapping.
 Here only tag field is required to match while searching word that is why it fastest cache.
 Direct mapping cache is less expensive compared to associative cache mapping.
Disadvantages of direct mapping
 The performance of direct mapping cache is not good as requires replacement for data-tag value.

Set-Associative Mapping

In Set-Associative cache memory two or more words can be stored under the same index address.
Here every data word is stored along with its tag. The number of tag-data words under an index is said to
form a text.

Advantages of Set-Associative mapping

 Set-Associative cache memory has highest hit-ratio compared two previous two cache memory
discussed above. Thus its performance is considerably better.
Disadvantages of Set-Associative mapping
 Set-Associative cache memory is very expensive. As the set size increases the cost increases.

In associative mapping and set associative mapping there is multiple choice in terms of selecting locations
for word storage so replacement algorithms are needed.

Associative Memory

Associative memory searches stored data only by the data value itself rather by an address. This type
of search helps in reducing the search time by a large extent.

What is associative memory?

When data is accessed by data content rather than data address, then the memory is refered
to as associative memory or content addressable memory.
How associative memory works?
Given below is a series of steps that depicts working of associative memory in computer
architecture:
 Data is stored at the very first empty location found in memory.
 In associative memory when data is stored at a particular location then no address is stored along
with it.
 When the stored data need to be searched then only the key (i.e. data or part of data) is provided.
 A sequential search is performed in the memory using the specified key to find out the matching key
from the memory.
 If the data content is found then it is set for the next reading by the memory.
Associative memory organization
The associative memory hardware structure consists of:
 memory array,
 logic for m words with n bits per word, and
 several registers like input resgister, mask register, select register and output register.
The block diagram showing organization of associative memory is shown below:
Functions of the registers used in associative memory is given below:
 Input Register (I) hold the data that is to be written into the associative memory. It is also used
to hold the data that is to be searched for. At a particular time it can hold a data containing one word
of length (say n).
 Mask Register (M) is used to provide a mask for choosing a key or particular field in the input
register's word. Since input register can hold a data of one word of length n so the maximum length
of mask register can be n.
 Select Register (S) contains m bits, one for each memory words. When input data in I register
is compared to key in m register and match is found then that particular bit is set in select register.
 Output Register (Y) contains the matched data word that is retrieved from associative memory.

Advantages of associative memory

Advantages of associative memory is given below:
 Associative memory searching process is fast.
 Associative memory is suitable for parallel searches.

Disadvantages of associative memory

Disadvantages of associative memory is given below:
 Associative memory is expensive than RAM
This is all about associative memory.

Virtual Memory

What is Virtual Memory?

Virtual memory in computer organization architecture is a technique and not actually a
memory in physical form present in computer system. This is the reason it is known
as virtual memory.
Virtual memory in COA is simply a technique used to provide an illusion of presence of large main
memory to the programmer, when in actual it’s not present physically.

The size of virtual memory is equivalent to the size of secondary memory. Each virtual address or logical
address referenced by the CPU is mapped to a physical address in main memory.

A hardware device called Memory Management Unit (MMU) performs this mapping during run time.
To perform this activity MMU actually takes help of a memory map table, which is maintained by the
operating system.

What is logical address space and physical address space?

The set of all logical address generated by CPU or program is known as logical address space. It is
also called as virtual address space.
The set of all physical addresses corresponding to the above logical addresses is known as physical
address space.

The complete procedure is something like this. When a program is required to be executed
then the CPU or program would generate a addresses called logical addresses. And executing
program occupies corresponding addresses in physical memory called as physical address.
virtual memory image

From the above diagram, it is visible that mapping method uses special register known as relocation
register or base register. The content of the base register is added to every logical address generated by
user program at the beginning of execution.

Advantages of Virtual memory

Listed below are major advantages of using virtual memory techniques:
 Virtual memory technique helps in efficient utilization of main memory. As larger size programs are
divided into blocks and partially each block is loaded into main memory as per need. This makes
simultaneous execution of multiple program possible.
 Virtual memory helps in efficient CPU utilization
 Virtual memory helps to improve overall throughput.

What is paging?

What is Paging?
Virtual memory can be configured using non-contiguous memory allocation method known as Paging.

In paging technique, the program will be divided into many small blocks. And then small blocks are
loaded into elsewhere in main memory.
In Paging technique, the virtual address space is divided into equal size blocks known as pages while
physical memory is divided into equal size blocks called frames.

Page size is equal to the frame size. Size of the page or a frame depends on the operating system. In
general the size of page or frame is 4KB.

Virtual memory configured using paging technique has operating system maintaining a data
structure to map logical address to the physical address.
This data structure is known as page table.
The page table contains two fields:
1. Page number
2. Frame number
Advantages of Paging
Listed below are advantages of paging:
 The paging technique is easy to implement.
 The paging technique makes efficient utilization of memory.
 The paging technique supports time-sharing system.
 The paging technique supports non-contiguous memory allocation
Disadvantages of Paging
Listed below are disadvantages of paging:
 Paging may encounter a problem called page break.
 When the number of pages in virtual memory is quite large, maintaining page table become hectic.

Cache Memory-
Before you go through this article, make sure that you have gone through the previous article
on Cache Memory.

We have discussed-
 Cache memory bridges the speed mismatch between the processor and the main memory.

When cache hit occurs,

 The required word is present in the cache memory.
 The required word is delivered to the CPU from the cache memory.

When cache miss occurs,

 The required word is not present in the cache memory.
 The page containing the required word has to be mapped from the main memory.
 This mapping is performed using cache mapping techniques.

In this article, we will discuss different cache mapping techniques.

Cache Mapping-

 Cache mapping defines how a block from the main memory is mapped to the cache memory in case
of a cache miss.
OR
 Cache mapping is a technique by which the contents of main memory are brought into the cache
memory.

The following diagram illustrates the mapping process-

 Now, before proceeding further, it is important to note the following points-

NOTES

 Main memory is divided into equal size partitions called as blocks or frames.
 Cache memory is divided into partitions having same size as that of blocks called as lines.
 During cache mapping, block of main memory is simply copied to the cache and the block is
not actually brought from the main memory.

Cache Mapping Techniques-

Cache mapping is performed using following three different techniques-

1. Direct Mapping
2. Fully Associative Mapping
3. K-way Set Associative Mapping

1. Direct Mapping-

In direct mapping,
 A particular block of main memory can map only to a particular line of the cache.
 The line number of cache to which a particular block can map is given by-

Cache line number

= ( Main Memory Block Address ) Modulo (Number of lines in Cache)

 Example-

 Consider cache memory is divided into ‘n’ number of lines.

 Then, block ‘j’ of main memory can map to line number (j mod n) only of the cache.

Need of Replacement Algorithm-

In direct mapping,
 There is no need of any replacement algorithm.
 This is because a main memory block can map only to a particular line of the cache.
 Thus, the new incoming block will always replace the existing block (if any) in that particular line.

Division of Physical Address-

In direct mapping, the physical address is divided as-

 2. Fully Associative Mapping-

In fully associative mapping,

 A block of main memory can map to any line of the cache that is freely available at that moment.
 This makes fully associative mapping more flexible than direct mapping.

Example-

Consider the following scenario-

Here,
 All the lines of cache are freely available.
 Thus, any block of main memory can map to any line of the cache.
 Had all the cache lines been occupied, then one of the existing blocks will have to be replaced.
 Need of Replacement Algorithm-

In fully associative mapping,

 A replacement algorithm is required.
 Replacement algorithm suggests the block to be replaced if all the cache lines are occupied.
 Thus, replacement algorithm like FCFS Algorithm, LRU Algorithm etc is employed.

Division of Physical Address-

In fully associative mapping, the physical address is divided as-

3. K-way Set Associative Mapping-

In k-way set associative mapping,

 Cache lines are grouped into sets where each set contains k number of lines.
 A particular block of main memory can map to only one particular set of the cache.
 However, within that set, the memory block can map any cache line that is freely available.
 The set of the cache to which a particular block of the main memory can map is given by-

Cache set number

= ( Main Memory Block Address ) Modulo (Number of sets in Cache)

Also Read- Set Associative Mapping | Implementation and Formulas

Example-

Consider the following example of 2-way set associative mapping-

 Here,
 k = 2 suggests that each set contains two cache lines.
 Since cache contains 6 lines, so number of sets in the cache = 6 / 2 = 3 sets.
 Block ‘j’ of main memory can map to set number (j mod 3) only of the cache.
 Within that set, block ‘j’ can map to any cache line that is freely available at that moment.
 If all the cache lines are occupied, then one of the existing blocks will have to be replaced.

Need of Replacement Algorithm-

 Set associative mapping is a combination of direct mapping and fully associative mapping.
 It uses fully associative mapping within each set.
 Thus, set associative mapping requires a replacement algorithm.

Division of Physical Address-

In set associative mapping, the physical address is divided as-

 Special Cases-

 If k = 1, then k-way set associative mapping becomes direct mapping i.e.

1-way Set Associative Mapping ≡ Direct Mapping

 If k = Total number of lines in the cache, then k-way set associative mapping becomes fully
associative mapping.