Annai College o

Department of ............................................................................................................

Reg. No.
 LAB PLAN

Session Exercise
Experiments to be covered
No. No.

1 (a) Characteristics of PN Junction Diode

1
1 (b) Characteristics of Zener diode

2 Operation of Full Wave Rectifier with Filters

2

3 Design of Zener diode Regulator

3

4 4 Input-output Characteristics of Common Emitter

5 5 MOSFET drain and transfer chracterstics

6 (a) Frequency response of CE amplifiers.

6
6 (b) Frequency response of CS amplifiers.

7 (a) Frequency response of CB amplifiers.

7
7 (b) Frequency response of CC amplifiers.

8 10 Frequency response of Cascode Amplifier

CMRR measurement of Differential Amplifier

9 9

Class A Transformer Coupled Power Amplifier.

10 10

5
 1.(a) CHARACTERISTICS OF P-N JUNCTION DIODE
EX NO:

Date:
AIM:

To observe the characteristics of PN junction diode under Forward bias and Reverse
bias.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Regulated power supply voltage 0-30V 1

2. Voltmeter 0-1V or 0-20V 1

3. Ammeter 0-20mA,200µA 1

4. Connecting wires & bread board - -

5 Diode IN4007 1

6 Resistors 1kΩ,10kΩ 1

THEORY:
The V-I characteristics of the diode are curve between voltage across the diode and
current through the diode. When P-type (Anode is connected to +ve terminal and n- type
(cathode) is connected to –ve terminal of the supply voltage, is known as forward bias. The
potential barrier is reduced when diode is in the forward biased condition. At some forward
voltage, the potential barrier altogether eliminated and current starts flowing through the diode
and also in the circuit. The diode is said to be in ON state. The current increases with increasing
forward voltage. When N-type (cathode) is connected to +ve terminal and P-type (Anode) is
connected –ve terminal of the supply voltage is known as reverse bias and the potential barrier
across the junction increases. Therefore, the junction resistance becomes very high and a very
small current (reverse saturation current) flows in the circuit. The diode is said to be in OFF
state. The reverse bias current is due to minority charge carriers. The p-n junction diode conducts
only in one direction.
CIRCUITDIAGRAM:

Forward bias:

Reverse Bias:

Model Graph:
PROCEDURE:
A) FORWARD BIAS:
1. Connections are made as per the circuit diagram.
2. For forward bias, the RPS +ve is connected to the anode of the diode and RPS –ve is
connected to the cathode of the diode
3. Switch on the power supply and increases the input voltage (supply voltage) in Steps of
0.1V
4. Note down the corresponding current flowing through the diode and voltage across the
diode for each and every step of the input voltage.
5. The reading of voltage and current are tabulated.
6. Graph is plotted between voltage (Vf) on X-axis and current (If)on Y-axis.

TABULAR COLUMN: Forward Bias:

S. No Applied Voltage Across Diode Current Through
Voltage (V) (V) Diode(mA)
1 0.1
2 0.2
3 0.3
4 0.4
5 0.5
6 0.6
7 0.7
8 0.8
9 0.9
10 1
 B) REVERSE BIAS:
1. Connections are made as per the circuit diagram
2. For reverse bias, the RPS +ve is connected to the cathode of the diode and RPS –ve is
connected to the anode of the diode.
3. Switch on the power supply and increase the input voltage (supply voltage) in Steps of
1V.
4. Note down the corresponding current flowing through the diode voltage across the diode
for each and every step of the input voltage.
5. The readings of voltage and current are tabulated.
6. Graph is plotted between voltage (VR) on X-axis and current (IR)on Y-axis.

TABULAR COLUMN: Reverse Bias:

S. No Applied Voltage Across Diode Current Through
Voltage (V) (V) Diode(µA)
1 0.1
2 0.2
3 0.3
4 0.4
5 0.5
6 0.6
7 0.7
8 0.8
9 0.9
10 1

RESULT:
Thus the VI Characteristics of PN Junction Diode was observed and graph was plotted.
 1.(b) CHARACTERISTICS OF ZENER DIODE
EX NO:

Date:
AIM:

To study the characteristics of Zener diode under Forward bias and Reverse bias.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Regulated power supply voltage 0-30V 1

2. Voltmeter 0-1V or 0-20V 1

3. Ammeter 0-20mA,200µA 1

4. Connecting wires & bread board - -

5 Zener Diode BZ6.2v 1

6 Resistors 1kΩ 1

Theory:
A Zener diode is heavily doped p-n junction diode, specially made to operate in the
break down region. A p-n junction diode normally does not conduct when reverse biased. But if
the reverse bias is increased, at a particular voltage it starts conducting heavily. This voltage is
called Break down Voltage. High current through the diode can permanently damage the device.
To avoid high current, we connect a resistor in series with Zener diode. Once the diode starts
conducting it maintains almost constant voltage across the terminals whatever may be the current
through it, i.e., it has very low dynamic resistance. It is used in voltage regulators. It is also
called as stabilizer diode or constant voltage device.
CIRCUITDIAGRAM:
a) Static Characteristics:

b) Reverse Bias Characteristics:

Model Graph:
PROCEDURE: -

Forward bias characteristics:

1. Connect the circuit diagram as shown in figure for Forward bias using zener diode
2. Switch on the RPS supply voltage Vs and vary in steps from 0V onwards (0.1V,
0.2V……1V) note down the forward current (If) through the diode for different
forward Voltages (Vf) across the diode without exceeding the rated value
(Vs=10V)
3. Tabulate the results in the tabular form.
4. Plot the graph between Vf & If.
TABULAR COLUMN: Forward Bias:

S. No Applied Zener Voltage (V) Zener Current

Voltage (V) (mA)

1 0.1
2 0.2
3 0.3
4 0.4
5 0.5
6 0.6
7 0.7
8 0.8
9 0.9
10 1

Reverse bias characteristics:

1. Connect the circuit diagram as shown in figure for Reverse bias using Zener
diode.
2. Now vary RPS supply voltage Vs in steps from 0V onwards (1V, 2V……10V)
note down the Reverse current (Ir) through the diode for different Reverse
voltages (Vr) across the diode without exceeding the rated value (Vr Max=15V)
 3. Tabulate the results in the tabular form.
4. Plot the graph between Vr & Ir

TABULAR COLUMN: Reverse Bias:

S. No Applied Zener Voltage (V) Zener Current

Voltage (V) (mA)

1 0.1
2 0.2
3 0.3
4 0.4
5 0.5
6 0.6
7 0.7
8 0.8
9 0.9
10 1

RESULT:
Thus the VI Characteristics of Zener Diode was observed and graph was plotted
 2. OPERATION OF FULL WAVE RECTIFIER WITH FILTER
EX NO:

Date:
AIM:

To examine the input and output waveforms of Full Wave Rectifier with filter and also
calculate its load regulation and ripple factor.
APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transformer 6-0-6V or 9-0-9V 1

2. Diode In4007 2

3. Resistors 1k 1each

4. Voltmeter 0-20V 1

5. Capacitors 100µF 1

6. Decade Resistance Box - 1

7. Digital Multimeter - 1

THEORY:-
The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. During
positive half cycle of secondary voltage (input voltage), the diode D1 is forward biased and D2is
reverse biased. The diode D1 conducts and current flows through load resistor RL.During
negative half cycle, diode D2 becomes forward biased and D1 reverse biased. Now, D2 conducts
and current flows through the load resistor RL in the same direction. There is a continuous
current flow through the load resistor RL, during both the half cycles and will get unidirectional
current as show in the model graph. The difference between full wave and half wave rectification
is that a full wave rectifier allows unidirectional (one way) current to the load during the entire
360 degrees of the input signal and half-wave rectifier allows this only during one half cycle
(180 degree)

CIRCUIT DIAGRAM:

MODEL WAVEFORMS:
PROCEDURE:

1. Connect a capacitor (100µf/35V) across the load resistance RL..

2. Note down the voltage across the secondary of transformer and across
the output terminals (Vo) i.e. across load resistor RL (with 1K, 4.7K,
10K, 100k) use DRB Decade resistance box or discrete component.
3. Vary the RL load resistor for different values note down AC and DC
voltages acrossthe RL using DMM or CRO.
4. Now Disconnect the RL and note the No Load voltage VNL.
5. Calculate the ripple factor & regulation using formula for different loads and
tabulate.
TABULAR COLUMN:

S.No RL (Ohm) VFL=Vdc Vac Ripple factorг=Vac/Vdc Idc(Ma)

1 1K
2 2K
3 3K
4 4K
5 5K

Were % of regulation =VNL-VFL/VFL*100=11.65%

[VNL= No load voltage
VFL= Full load voltage]
THEORITICAL CALCULATIONS:-
Vrms = Vm/ √2 , Vm =Vrms√2 , Vdc=2Vm/П
Ripple factor, r = 1/ (4√3 f C RL)
Where f =50Hz, C =100µF & RL=1KΩ.

RESULT:
Thus the input and output wave form of full wave rectifier with filter was plotted and ripple
factor was calculated.
 3. DESIGN OF ZENER DIODE REGULATOR
EX NO:

Date:
AIM:

To Design the Zener Diode as a Voltage Regulator.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Regulated power supply voltage 0-30V 1

2. Voltmeter 0-20V 1

3. Ammeter 0-20mA 1

4. Connecting wires & bread board - -

5 Zener Diode EZ5.1v 1

6 Decade Resistance Box - 1

THEORY:-
A Zener diode is heavily doped p-n junction diode, specially made to operate in the
break down region. A p-n junction diode normally does not conduct when reverse biased. But if
the reverse bias is increased, at a particular voltage it starts conducting heavily. This voltage is
called Break down Voltage. High current through the diode can permanently damage the device.
To avoid high current, we connect a resistor in series with Zener diode. Once the diode starts
conducting it maintains almost constant voltage across the terminals whatever may be the current
through it, i.e., it has very low dynamic resistance. It is used in voltage regulators. It is also
called as stabilizer diode or constant voltage device.
CIRCUIT DIAGRAM:

Model Graph:
PROCEDURE:
1. Connect the Circuit as per the Circuit Diagram on the bread board.
2. By changing the load Resistance, kept constant I/P Voltage at 5V,10V,15V as per table
given below. Take the readings of O/P Voltmeter (Vo=Vz).
3. Now by changing the I/P Voltage, kept constant load Resistance at 1K, 2K, 3K as per
table given below. Take the readings of O/P Voltmeter (Vo=Vz).

TABULAR COLUMN:

Load Regulation: Line Regulation:

RESULT:

Thus the voltage regulation of Zener diode was found.

 4. INPUT-OUTPUT CHARACTERISTICS OF COMMON EMITTER
EX NO:

Date:
AIM:

To draw the input and output characteristics of transistor connected in CE Configuration

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transistor(BC-107) - 1
2. Resistors 1KΩ, 470Ω 1
3. Regulated PowerS upply (0-30)VDC 1
4. Bread Board - 1
5. Digital Ammeters (0-200)μA/(0-200)mA 2
6. Digital Voltmeters (0-20)VDC 2
7. Connecting Wires As Required -

THEORY:-
A transistor is a three terminal device. The terminals are emitter, base, collector. In
common emitter configuration, input voltage is applied between base and emitter terminals and
output is taken across the collector and emitter terminals. Therefore the emitter terminal is
common to both input and output.
The input characteristics resemble that of a forward biased diode curve. This is expected
since the Base-Emitter junction of the transistor is forward biased. As compared to CB
arrangement IB increases less rapidly with VBE. Therefore input resistance of CE circuit is higher
than that of CB circuit.
The output characteristics are drawn between Ic and VCE at constant IB. the collector
current varies with VCE unto few volts only. After this the collector current becomes almost
constant, and independent of VCE. The value of VCE up to which the collector current changes
with VCE is known as Knee voltage. The transistor always operated in the region above Knee
voltage, IC is always constant and is approximately equal to IB. The current amplification factor
of CE configuration is given by β = ΔIC/ΔIB
CIRCUIT DIAGRAM:

MODELGRAPHS:

B) OUTPUT CHARACTERSITICS:
PROCEDURE:
(i) INPUT CHARACTERSTICS:
1. Connect the circuit as per the circuit diagram.
2. For plotting the input characteristics the output voltage VCE is kept constant at 1V and
for different values of VBE, note down the values of IB.
3. Repeat the above step by keeping VCE at 2V and 3V.
4. Tabulate all the readings.
5. Plot the graph between VBE on x-axis and IB on y-axis for constant VCE.
(ii) OUTPUT CHARACTERSTICS:
1. Connect the circuit as per the circuit diagram.
2. For plotting the output characteristics the input current IB is kept constant at 50μA and
for different values of VCE, note down the values of IC.
3. Repeat the above step by keeping IB at75μA and 100μA.
4. Tabulate the all the readings.
5. Plot the graph between VCE on x-axis and IC on y-axis for constant IB.

OBSERVATIONS:

(i) INPUTCHARACTERISTICS:

VCE=1V VCE=2V VCE=3V

S.No VBE(V) IB(μA) VBE(V) IB(μA) VBE(V) IB(μA)

 (ii) OUTPUT CHARACTERISTICS:

IB= 50 μA IB= 75 μA IB= 100 μA

S.No VCE(V) IC(mA) VCE(V) IC(mA) VCE(V) IC(mA)

CALCULATIONS:
1. Input resistance: To obtain input resistance find ΔVBE and ΔIB at constant VCE on
one of the input characteristics. Then Ri=ΔVBE/ΔIB (VCE constant)
2. Output resistance: To obtain output resistance, find ΔIC and ΔVCE at constant IB.
Ro=ΔVCE/ΔIC (IB constant)
3. The current amplification factor of CE configuration is given by
β=ΔIC/ΔIB
RESULT:
The input and output characteristics of a transistor in CE configuration are drawn. The
Input (Ri) and Output resistances (Ro) and β of a given transistor are calculated.
1. The Input resistance(Ri)of a given Transistor is
2. The Output resistance(Ro)of a given Transistor is
3. The Current amplification factor is
 5. MOSFET DRAIN AND TRANSFER CHARACTERISTICS
EX NO:

Date:
AIM:

To plot the Transfer and Drain characteristics of MOSFET.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. MOSFET IRF740 1 No
2. Resistor 560Ω 1 No
3.
Ammeter(DC) 0-60mA 1 No
4.
Voltmeter(DC) 0-60V 1 No
5. Voltmeter(DC) 0-30V 1 No
6. Multimeter - 1 No
7. VRPS 0-30V 3 Nos
8. Connecting wires - -

THEORY:-
A MOSFET (Metal oxide semiconductor field effect transistor) has three terminals called
Drain, Source and Gate. MOSFET is a voltage controlled device. It has very high input
impedance and works at high switching frequency.
MOSFET’s are of two types 1) Enhancement type 2) Depletion type.
CIRCUIT DIAGRAM:

MODEL GRAPH:
PROCEDURE:
A) Transfer Characteristics:
1. Make the connections as per the circuit diagram.
2. Initially keepV1and V2 at 0 V.
3. Switch ON the regulated power supplies. By varying V1, set VDS to some
constant voltage say 5V.
4. Vary V2 in steps of 0.5V, and at each step note down the corresponding
values of VGS and ID. (Note: note down the value of VGS at which ID starts
increasing as the threshold voltage).
5. ReduceV1andV2 to zero.
6. By varying V1, set VDS to some other values at 10V.
7. Repeat step 4.
8. Plot a graph of VGS versus ID for different values of VDS.

B) Drain or Output Characteristics:

1. Make the connections as per the circuit diagram.
2. Initially keepV1and V2at zero volts.
3. By varying V2, set VGS to some constant voltage (must be more than
Threshold voltage).
4. By gradually increasing V1, note down the corresponding value of VDS
and ID. (Note: Till the MOSFET jumps to conducting state, the voltmeter
which is connected across device as VDS reads approximately zero voltage.
Further increase in voltage by V1 source cannot be read by VDS, so
connect multimeter to measure the voltage and tabulate the readings in the
tabular column).
5. Set VGS to some other value(more than threshold voltage)and repeat step4.
6. Plot a graph of VDS versus ID for different values of VGS.
 TABULARCOLUMN:

A) Transfer Characteristics:

VDS1= Volts VDS2= Volts

VGS(V) ID (mA) VGS(V) ID(mA)

B) Drain Characteristics:

VGS1= Volts VGS2= Volts

VDS (V) ID (mA) VDS (V) ID(mA)

Result:
Thus the Drain and transfer characteristics of MOSFET was obtained.
 6(a). FREQUENCY RESPONSE OF CE AMPLIFIER.
EX NO:

Date:
AIM:

To obtain the frequency response of the Common Emitter BJT Amplifier.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transistor(BC-107) 1

2. 1KΩ, 4.7KΩ, 10KΩ,

Resistors 1
15KΩ, 68 KΩ
3. 10µF 2
Capacitors
47 µF 1
4. Bread Board - 1
5. Regulated Power Supply (0-30)VDC 1
6. Function Generator (100-1M)Hz 1
7. CRO (100-20M)Hz 1
8. Connecting Wires As Required -

THEORY:-
The CE amplifier provides high gain &wide frequency response. The emitter lead is
common to both input & output circuits and is grounded. The emitter-base circuit is forward
biased. The collector current is controlled by the base current rather than emitter current. The
input signal is applied to base terminal of the transistor and amplifier output is taken across
collector terminal. A very small change in base current produces a much larger change in
collector current. When +ve half-cycle is fed to the input circuit, it opposes the forward bias of
the circuit which causes the collector current to decrease, it decreases the voltage more–ve. Thus
when input cycle varies through a –ve half-cycle, increases the forward bias of the circuit, which
causes the collector current to increases thus the output signal is common emitter amplifier is in
out of phase with the input signal.

CIRCUIT DIAGRAM:

FREQUENCYRESPONSE:
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set Source Voltage Vs = 50mV(say) at 1KHz frequency,using function generator.
3. Keeping the input voltage constant, vary the frequency from 50Hz to 1MHz in
regular steps and note down the corresponding output voltage.
4. Calculate the Voltage Gain by using the formula
Av= Output voltage(V0) / Input voltage(Vs)
5. Calculate the Voltage Gain in dB by using Voltage Gain Av(dB)=20 log10(Vo/Vs).
6. Plot the Graph by taking Voltage gain (dB)on x-axis and frequency(Hz)on y-axis.
7. The Bandwidth of the amplifier is calculated from the graph using the expression,
Bandwidth, BW=f2-f1, Where f1is lower 3-dB frequency f2 is upper 3-dBfrequency
OBSERVATIONS:
Vs = V
Input Output
Voltage Voltage Gain (dB)
Frequency Voltage(Vo)
S.No Gain=Vo/Vs =20log10(Vo/Vs)
(Hz) (volts)

RESULT: The Voltage gain and Bandwidth of CE amplifier is measured and the frequency
response of the CE Amplifier is obtained.
1. The Voltage gain of CE Amplifier is ---------
2. The Bandwidth of CE Amplifier is ----------
 6(b). FREQUENCY RESPONSE OF CS AMPLIFIER.

EX NO:

Date:

AIM:

To design and construct a common-source amplifier circuit and to determine its

frequency response.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transistor BFW 10 1
2. RPS (0-30)V 1
3. Signal Generator (0-3)MHz 1
4. CRO (0-30)MHz 1
5. Bread Board - 1
6. Resistors 10K, 2.2K, 3.3M 1
7. Capacitors 0.1uf 2
8.
Single strand Wires - -
9.
Probe - 3

THEORY:-

The common source configuration for a FET is similar to the common emitter bipolar
transistor configuration, The common source amplifier can provide both a voltage and current
gain. Since the input resistance looking into the gate is extremely large the current gain available
from the FET amplifier can be quite large, but the voltage gain is generally inferior to that
available from a bipolar device. Thus FET amplifiers are most useful with high output-
impedance signal sources where a large current gain is the primary requirement. The source by-
pass capacitor provides a low impedance path to ground for high frequency components and
hence AC signals will not cause a swing in the bias voltage.A basic common- source amplifier
circuit containing an N-channel JFET. The characteristics of this circuit include high input
impedance and a high voltage gain. The function of the circuit components are C1 and C2 are the
input and output coupling capacitors. Rg is the gate return resistor.

CIRCUIT DIAGRAM:
Frequency Response:

TABULATION:
Vin= V

S.NO Frequency in Hz Vo in Volts Gain = 20 log(Vo/Vin) dB

PROCEDURE:
1. Connect the circuit diagram as per the circuit diagram.
2. Set Vi = 50mV, using the signal generator.
3. Keeping the input voltage constant, Vary the frequency from 0 Hz to 1 MHz in
regular steps and note down the corresponding output voltage.
4. Plot the graph: Gain (dB) vs Frequency(Hz)
5. Calculate the bandwidth from the graph.

RESULT:
Thus the common source amplifier has been constructed, and frequency response of the
amplifier was determined.
 7(a). FREQUENCY RESPONSE OF CB AMPLIFIER.

EX NO:

Date:

AIM:

To design and construct a Common-Base amplifier circuit and to determine its frequency
response.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transistor BC 547 1
2. RPS (0-30)V 1
3. Resistor 22 K,4.7K, 330 Ω, 1.2K 1
4. Capacitor 1 uf 3
5. Bread Board - 1
6. Single strand Wires - -
7. CRO 30 MHz 1
8. CRO Probes - 3
9. Function Generator (0 - 3) MHz 1

THEORY:-

An amplifier is used to increase the signal level; the amplifier is use to get a larger signal
output from a small signal input The transistor can be used as a amplifier, if it is biased to
operate in the active region, i.e. base-emitter junction is to be forward biased, while the base –
collector junction to be reverse biased. Common-Base amplifier is constructed using self-bias
circuit. The resistors R1, R2 and RE are biasing resistors. Due to the change in the temperature or
β, the base current increases so this makes to increase the collector current IC, therefore a Reverse
Leakage Current ICO increases hence this affects the stability of transistor. By providing an
emitter resistor RE, it creates a voltage drop across RE therefore the increased emitter current due
to IC starts to flow through RE to ground and this makes in the reduction of Base Emitter Voltage
VBE. Due to reduction in VBE, base current IB reduces and hence collector Current IC also reduces
and the output remains constant.
For the common base amplifier the AC Input resistance is typically low from 10 to 100Ω.
The output resistance of CB amplifier is typically high from 50KΩ to 1MΩ. Typical values of
voltage amplification (Av) for CB amplifier vary from 50 to 300. The current amplification is
always less than 1.The basic CB amplifying action was proposed for transferring the current
from low resistance to high resistance circuit.

CIRCUIT DIAGRAM:

PROCEDURE:
1. Connect the circuit as per the circuit diagram
2. Set Vs = 50mV using signal generator.
 3. Keep the input voltage constant; vary the frequency from 50 Hz to 3 MHz
insteps.
4. Note down the corresponding output voltage.
5. Plot the graph gain Vs frequency.
6. Calculate the bandwidth from the graph.

TABULATION:
Vin =

S.NO Frequency (Hz) Output Voltage (Vo) Gain = 20 log (Vo / Vi) (db)
FREQUENCY RESPONSE:

RESULT:
Hence designed and constructed the Common Base Amplifier and calculated the band
width and cut-off frequency.
 7(b). FREQUENCY RESPONSE OF CC AMPLIFIER.

EX NO:

Date:

AIM:

To design and construct a common collector amplifier and to calculate the bandwidth and
cut off frequency.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transistor BC 547 1
2. RPS (0-30)V 1
3. 150 K Ω, 10K Ω, 4.7K
Resistor 2,1,1,1
Ω, 1.2K Ω
4. Capacitor 1 uf 2
5. Bread Board - 1
6. Single strand Wires - -
7. CRO (0 - 30) MHz 1
8. CRO Probes - 3
9. Function Generator (0 - 3) MHz 1

THEORY:-

The d.c biasing in common collector is provided by R1, R2 and RE .The load resistance is
capacitor coupled to the emitter terminal of the transistor. When a signal is applied to the base of
the transistor, VB is increased and decreased as the signal goes positive and negative,
respectively. Considering VBE is constant the variation in the VB appears at the emitter and
emitter voltage VE will vary same as base voltage VB. Since the emitter is output terminal, it can
be noted that the output voltage from a common collector circuit is the same as its input voltage.
Hence the common collector circuit is also known as an emitter follower.
CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect the circuit as per the circuit diagram

2. Set Vs = 2V using signal generator.
3. Keep the input voltage constant; vary the frequency from 50 Hz to 1 MHz
insteps.
4. Note down the corresponding output voltage.
5. Plot the graph gain Vs frequency.
6. Calculate the bandwidth from the graph.
TABULATION:

Vin = v

S.NO Frequency (Hz) Output Voltage (Vo) Gain = 20 log (Vo / Vi) (db)
FREQUENCY RESPONSE:

RESULT:
Hence designed and constructed the Common collector Amplifier and calculated the band
width and cut-off frequency.
 8. FREQUENCY RESPONSE OF CASCODE AMPLIFIER.

EX NO:

Date:

AIM:

To design and construct a cascode amplifier circuit and to draw its frequency response
graph.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transistor BC 547 2
2. RPS (0-30)V 1
3. Resistor 1.2K, 33 K,22K, 12K 1
4. Resistor 680Ω 1
5. Capacitor 1 uf, 2.2uf 2
6. Bread Board - 1
7. Single strand Wires - -
8. CRO (0 - 30) MHz 1
9. CRO Probes - 3
10. Function Generator (0 - 3) MHz 1

THEORY:-

A cascode amplifier comprises of a common emitter amplifier and a common base

amplifier stages in cascade. In the circuit diagram Q1 common base configuration and Q2 is
common emitter configuration. Principal advantage of this circuit is its low internal capacitance
which is a limiting factor gain at high frequencies. Cascode amplifier can able to amplify wide
range of frequencies than that is possible with CE amplifier. This is because no high frequency
feedback occurs from the output back to input through the miller capacitance as it occurs in
transistor CE configuration. Cascode amplifier provides same voltage gain of CE amplifier but in
wide range of frequencies. The advantage of CE and CB stages are put together in cascode
connection.

CIRCUIT DIAGRAM:

PROCEDURE:

1. Connect the circuit as per the circuit diagram

2. Set Vs = 50mV using signal generator.
3. Keep the input voltage constant; vary the frequency from 50 Hz to 1 MHz
insteps.
4. Note down the corresponding output voltage.
5. Plot the graph gain Vs frequency. Calculate the bandwidth from the graph.
TABULATION:

Vin=

S.NO Frequency (Hz) Output Voltage (Vo) Gain = 20 log (Vo / Vi) (db)
FREQUENCY RESPONSE:

RESULT:
Hence designed and constructed the Cascode Amplifier and calculated the band width
and cut-off frequency.
 9. CMRR MEASUREMENT OF DIFFERENTIAL AMPLIFIER.

EX NO:

Date:

AIM:

To construct a differential amplifier circuit for single input balanced output in the
common mode and differential mode configuration and study the output waveform and to find
Common Mode Rejection Ratio (CMRR).

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Transistor BC 107 2
2. Dual trace Regulated power supply (0-30)V 1
3. Resistor 10K 2
4. Resistor 4.7 k 1
5. Function Generator (0-3)MHz 1
6. Bread Board - 1
7. Single strand Wires - -
8. CRO (0-30)MHz 1
9. CRO Probes - 4

THEORY:-

The Differential amplifier amplifies the difference between two input signals. The
transistorized differential amplifier consists of two ideal emitter biased circuits. The differential
amplifier circuit is obtained by connecting the two emitter terminals E1 and E2. Hence RE is the
parallel combination of RE1 and RE2. The output is taken between the two collector terminals C1
and C2.Hence we say this connection as balanced output or double ended output. It works in two
modes of operation.
Differential mode operation:
In the differential mode operation two input signals (V1 and V2) are different in
magnitudes and opposite in phase and it produces the difference between the two input signals
(V1~V2).The differential mode gain (AD) can be calculated by AD =Rc * β / 2* hie.
Common mode operation:
In the common mode operation two input signals are same in magnitude and phase. At
emitter resistance RE both the input signal appears across RE and adds together since it just acts
like an emitter follower .Therefore RE carries a signal current and provides a negative feedback.
This feedback reduces the common mode gain of the differential amplifier. The Common mode
gain Ac can be calculated by |Ac| = Rc * β / hie + (2Re [1+ β] )CMRR.
CMRR (Common Mode Rejection Ratio) is defined as the ratio of differential gain to
common mode gain. Ideally the CMRR should be infinity. CMRR = 20 log (AD / Ac).

CIRCUIT DIAGRAM:
PROCEDURE:
Differential mode configuration :
1. Connections are given as per circuit diagram
2. Set Vs =50 mV, using signal generator
3. Keeping the input voltage constant vary the frequency from 50Hz to1MHz in
regular steps
4. Observe both input and output on the CRO (sine wave)
5. The differential gain is calculated at mid frequency range where the magnitude of
the sine wave is maximum.
6. The differential gain is calculated by Ad = Vo /Vi
Common mode configuration:
1. Connections are given as per circuit diagram.
2. Set Vs =50 mV, using signal generator.
 3. Keeping the input voltage constant vary the frequency from 50Hz to1MHz in
regular steps.
4. Observe both input and output on the CRO (sine wave).
5. The common mode gain is calculated at mid frequency range where the magnitude
of the sine wave is maximum.
CALCULATION:
1. The Common mode gain is calculated by Ac = Vo / Vi CMRR
2. CMRR is calculated by substituting the practical values of Ad and Ac in the
formula CMRR = 20 log (AD /Ac)

TABULATION:
DIFFERENTIAL MODE:
Output Theoretical Practical Differential
Input Amplitude
Amplitude (Vo) Differential gain gain (Vo / Vi)
S.NO (Vi) (Volts)
(Volts) (Ad) (Ad)

COMMON MODE:
Output Theoretical Practical Differential
Input Amplitude
Amplitude (Vo) Differential gain gain (Vo / Vi)
S.NO (Vi) (Volts)
(Volts) (Ac) (Ac)

CMRR:

S.NO Theoretical CMRR Practical CMRR = 20 log (AD / Ac)

RESULT:
Thus constructed a differential amplifier circuit for single input balanced output in the
common mode and differential mode configuration and studied the output waveform, also its
CMRR has been determined and verified practically.
Differential mode :
Common mode :
CMRR :
 10. CLASS A TRANSFORMER COUPLED POWER AMPLIFIER.

EX NO:

Date:

AIM:

To observe the input and output waveforms and to calculate the efficiency using
transformer coupled power amplifier.

APPARATUS REQUIRED:

S.No Device Range/Rating Qty

1. Digital Multimeter - 1
2. Dual trace Regulated power supply (0-30)V 1
3. Resistor 36KΩ, 5.6KΩ, 470Ω 2
4. Capacitor 47 µF, 2.2µF 1
5. Function Generator (0-3)MHz 1
6. Bread Board - 1
7. Transformer - -
8. CRO (0-30)MHz 1
9. CRO Probes - 4

THEORY:-

The amplifier is said to be class A power amplifier if the q point and the input signal are
selected such that the output signal is obtained for a full input cycle . For this class the position
of q point is approximately y at the mid point of the load line. For all the values of input signal
the transistor remains in the active region and never entire into the cutoff or saturation region.
The collector current flows for 360ᵒ (life cycle) of the input signal in other words the angle of the
collector current flow is 360ᵒ the class A amplifiers or furthers classified as directly coupled and
transformer coupled amplifiers in directly coupled type .The load is directly connected in the
collector circuit while in the transformer coupled type, the load is coupled to the collector using
the transformer.

CIRCUIT DIAGRAM:

PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set Vs (say 250 to 300 mV), at 10 KHz using signal generator.
3. Connect milli ammeter to the ammeter terminals
4. By keeping the input voltage constant, vary the frequency from 0 to 1MHz
in regular steps .
5. Note down the corresponding output voltage from CRO
6. Calculate the DC input power using the formula Pdc= VccIc
7. Calculate the AC output power using the formula Pac = VO2/8RL
8. Calculate the efficiency η = Pac /Pdc
MODEL WAVEFORMS:

OBSERVATIONS:
VO = , VI =
VCC =
RL =
CALCULATIONS:
Efficiency (Pac/ Pdc) =
P ac = Vcc Ic
Pdc = Vm/2RL = V2pp/8RL
% η = Pac/ Pdc X 100 %

RESULT:
Thus the Gain and frequency of Class A power amplifier was observed and calculated.
% η = Pac/ Pdc X 100 = %