08.DLC Lecture Note
08.DLC Lecture Note
1
Outline of Chapter 4
4.1 Introduction
4.2 Combination Circuits
4.3 Analysis Procedure
4.4 Design Procedure
4.5 Binary Adder-Subtractor
4.6 Decimal Adder
4.7 Binary Multiplier
4.8 Magnitude Comparator
4.9 Decoders
4.10 Encoders
4.11 Multiplexers
4.12 HDL Models of Combination Circuits
4.1 Introduction
A combinational circuits
n
◆ 2 possible combinations of input values
…..
Logic Circuit
◆ Specific functions
» Adders, subtractors, comparators, decoders, encoders, and multiplexers.
» MSI (Medium Scale Integrated) circuits or standard cells.
4-3 Analysis Procedure
A combinational circuit
◆ Make sure that it is combinational not sequential
» No feedback path.
◆ Derive its Boolean functions (truth table)
◆ Design verification
◆ A verbal explanation of its function
Analysis Procedure (1/3)
Analysis procedure
◆ Make sure the that circuit is combinational or sequential
◆ obtain 1) the output Boolean functions or 2) the truth table
Analysis Procedure (2/3)
Boolean function
◆ Label all gate outputs
◆ Make output functions at each level
◆ Substitute final outputs to input variables
Truth table
◆ Put the input variables to binary numbers
◆ Determine the output value at each gate
◆ Obtain truth table
Analysis Procedure (2/3)
T2 = ABC
F1 = T3+T2
T1 = A+B+C
T3 = F2'T1
F2 = AB+AC+BC
Boolean function
◆ Label all gate outputs Figure 4.2 Logic Diagram for Analysis Example
◆ Make output functions at each level
Boolean function
◆ Label all gate outputs
‘
4-4 Design Procedure
Design Procedure
1) System Specification: BCD to excess-3 code converter
- Excess-3 code : decimal digit + 3
Code Conversion Example
Design Procedure
Step 1) System Specification: BCD to excess-3 code converter
- Excess-3 code : decimal digit + 3
01
ABCD wxyz
11
X X X X
10
X X
Don’t care !!
The Maps
BCD to excess-3 code
=w=
4) Design Procedure
Obtain the simplified Boolean functions AB
CD BD BC
00 01 11 10
00
01
1 1 1
A
11
X X X X
10
1 1 X X
w (A, B, C, D)
= S(5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15) = A + BC + BD
The Maps
BCD to excess-3 code B’D
=x= B’C
4) Design Procedure
CD
Obtain the simplified Boolean functions AB 00 01 11 10
00
1 1 1
BC’D’
01
1
11
X X X X
10
1 X X
x (A, B, C, D)
= S(1,2,3,4,9,10,11,12,13,14,15) = B’C + B’D + BC’D’
The Maps
BCD to excess-3 code C’D’ = y = CD
4) Design Procedure
CD
Obtain the simplified Boolean functions AB 00 01 11 10
00
1 1
01
1 1
11
X X X X
10
1 X X
y (A, B, C, D)
= S(0, 3, 4, 7, 8,10,11,12,13,14,15) = CD + C’D’
The Maps
BCD to excess-3 code
=z= D’
4) Design Procedure
CD
Obtain the simplified Boolean functions AB 00 01 11 10
00
1 1
01
1 1
11
X X X X
10
1 X X
z (A, B, C, D)
= S(0, 2, 4, 6, 7, 10, 11, 12, 13, 14, 15) = D’
The Maps
z = D'
y = CD +C'D' = CD + (C+D)'
x = B'C + B'D+BC'D’
= B'(C+D) +B(C+D)‘
w = A+BC+BD
Binary adder
◆ Half adder : performs the addition of 2-bits (x+y)
: is a combinational circuit that performs the addition of two bits, this circuit
needs two binary inputs and two binary outputs.
◆ Full adder : performs the addition of 3-bits (x+y+z)
:is a combinational circuit that performs the addition of three bits (two
significant bits and previous carry).
◆ Two half adder can be employed to a full adder
Half adder
◆ Sum of 2 binary inputs
◆ 0 + 0 = 0 ; 0 + 1 = 1 ; 1 + 0 = 1 ; 1 + 1 = 10
◆ Two input variables: x, y
◆ Two output variables: C (carry), S (sum)
◆ Truth table
C=xy = AND
S=x’y+xy’ = XOR
4-5 Binary Adder-Subtractor
Full-Adder
◆ The arithmetic sum of three input
bits.
◆ Three input bits
» x, y: two significant bits.
» z: the carry bit from the previous
lower significant bit.
◆ Two output bits: C, S
Fig. 4-8 Implementation of Full Adder with Two Half Adders and an OR Gate
◆ S = x'y'z+x'yz'+ xy'z'+xyz
◆ C = xy+xz+yz
◆ S = z(xy) = z'(xy'+x'y)+z(xy'+x'y)'= z'xy'+z'x'y+z((x'+y)(x+y')) =
xy'z'+x'yz'+xyz+x'y'z
◆ C = z(xy'+x'y)+xy = xy'z+x'yz+ xy
Binary Adder
Overflow
C = K +Z8Z4 + Z8Z2
1100 1010
1101 1011
1110
1111
BCD Adder (3/3)
Block diagram
6
1100 1010
1101 1011
1110
1111
Partial products
◆ AND operations
(4-bits) x (3-bits)
(4 x 3) =12 AND gates,
(3-1)ea 4-bit adder needed
D B
1 ◆ B = x’y
1 0
0
◆ D = x’y+xy’ = xy
Quiz (1) ANS
Full-Subtractor (Hint: input 3 bits (X,Y, and Bi); Bi is for borrow input/output 2 bits (D, Bo) of
difference between two inputs and borrow output. Design step - First, design the truth table. Second
simplify the Boolean function using the Karnaugh map. Third, find the simplified Boolean function from
the Karnaugh map. Finally, draw the logic circuit.)