Experiment - 3
Experiment - 3
A.Compulsory Experiments
1. Design and verification of following arithmetic circuits using 74xx family ICs.
a. Half adder and Fulladder
b. Half subtractor and full subtractor
2. Toperform the code conversion- binary to gray and gray to
table verification. binary and its truth
3. To design a combinational logic circuit using 74xx
table verification in both SOP and POS family ICs and its truth
4. Realization of 2:4 decoders and 4:2 forms.
table. encoder circuit and verification of its truth
5. To design and verify the truth table of
6. To design a 1-bit multiplexer and demultiplexer circuits.
comparator using 74xx family ICs and to study the
performance of4-bit comparator IC7485.
7. Designand verification of basic
slave JK flip-flop using IC7476. Flip-Flops using 74xx family ICs and master
B. Optional Experiments
8. To realize and verify the truth table of
shift register-SIPO/SISO and
PISO/PIPO.
9. Design and verification of asynchronous counter
10. To realize andverify the truth table of design and Mod-n counter.
synchronous counter design.
Specification of Apparatus Used- Power Supply, Digital Trainer, IC's
(7404, 7408, 7432) Connecting leads
Theoretical Concept
a) SOP: - It is the Sum of product form in which the terms are taken
as 1. It is denoted in the K-map expression by sigma ()
|. o
A.B, + AB
Logic Circuit Of this expression:
AND
A NNeT A )AND
B NOTB
b) POS: - It is the product of the sums form in which the terms are
taken as 0. It is denoted in the K-Map expression by the Sign pie
(A+B) (B+ C)(A+C)
Circuit Diagram
A
B OR
Y
AND
AND
OR
0 0 0 0 0 (A+B)(B+CXA+C')
0 0 1 0 0
0 0 1 1
1 0 0
0
0
1 0 1 1
1
1 1 0 1 1
1 1
1
Precautions:
1. Connecting wires should be rubbed with sand papers so that there is no
rust.
2. Make sure that the apparatus is switched off while placing 1Cs and
connecting of wires.
3. The connections should be tights.
4. ICsare placed in a proper way in the breadboard. There is no short of
current in the in same inputs.