Chapter 4: BJT Biasing Circuits 35

Chapter Four
BJT Biasing Circuits
4.1 Introduction
Transistors are used for many applications like: as a switch, as a comparator, as a current
source, as an amplifier etc. The most common application of a transistor is amplification.
Transistor used in an amplifier circuit must be biased in the active region with constant levels
of base, collector and emitter currents and constant terminal voltages. The levels of these
currents and voltages set a particular operating point of the transistor which is called the DC
operating point or quiescent point. In Chapter 3, we have seen that, to use a transistor is active
region, the B-E junction must be forward biased and the B-C junction must be reverse biased.
We have done this using two set of batteries which is not practical. We have to design circuits
that can provide both the forward bias and reverse bias voltages from a single battery or
power source. This type of circuits are called biasing circuits. Ideally the DC current and voltage
levels in a biasing circuit should remain absolutely constant. In practical circuits, these
quantities change due to the variations of temperature and the transistor current gain
( ). The aim of designing good bias circuits is to provide stable DC current and voltage
levels irrespective of the temperature and . The simplest bias circuit consists of the
smallest number of components and hence, they are the least costly. But they are not able to
provide stable biasing. On the other hand, a complicated bias circuit is costly, but can provide
better biasing for the transistor. In this chapter, we will study different biasing circuits and
their performance.
4.2 Biasing From a Single Source
In Chapter 3, we have seen how to bias a transistor using two sets of batteries. Fig. 4.1(a)
shows such a circuit to bias a transistor in CE configuration. Here, resistors and are used
to limit the base current and the collector current to our desired levels. The battery , used
to forward bias the B-E junction, has small value (say 3 V) and , used to bias the B-C
junction, has higher value (say 18 V). But using suitable resistance values we can also use

IC IC
IB RC IB RC
VCE 2 k VCE 2 k

23 k RB VBE 173 k RB VBE

VCC = VCC =
VBB = IE 18 V VBB = IE 18 V
3V 18 V

(a) (b)

higher voltage for the B-E junction. Fig. 4.1(b) shows the biasing circuit using same values for
and . We can redraw the circuit as shown in Fig. 4.1(c). Now, connecting the terminals
Chapter 4: BJT Biasing Circuits 36

of same potential in a single point we get the circuit of Fig.4.1(d). Thus, we have found the first
bias circuit redrawn with a single voltage source (supply voltage).

VBB = 18 V VCC = 18 V VCC = 18 V

RC 2 k RC 2 k
173 k RB 173 k RB
IC IC
IB IB
VCE VCE
VBE VBE
IE IE
(c) (d)

Fig. 4.1: Biasing circuit of transistor (a) VBB = 3 V and RB = 23 k (b) VBB = 3 V and RB
= 173 k, (c) and (d) alternate representations of the same circuit.

Example 4.1
For the biasing circuits of Fig. 4.1, calculate the values of and assuming .
Solution:
For circuit (a):
Considering a Si transistor .
The value of can be calculated as (the equations are derived later),

Therefore, the value of will be,

Now, the value of can be calculated as,

For circuit (b):

Considering a Si transistor .
The value of can be calculated as,

Therefore, the value of will be,

Chapter 4: BJT Biasing Circuits 37

Now, the value of can be calculated as,

As the circuits of Fig.4.1(c) and (d) use the same voltages and resistances, same results will be
found for them.
Comments: Same collector current and collector-emitter voltage is found using two batteries
and a single battery.

4.3 DC Load Line and Operating Point

As we are interested with the output of a transistor and the power of a transistor depends on
the output voltage and output current, the operating point of a transistor is represented in
terms of them. For example, in case of CB configuration the values of output current ( ) and
output voltage ( ) represent a point on the output characteristic curves which is called the
operating point. Similarly, for CE
configuration, the operating point is VCC
represented by the values of and . RL RL C-E
That is, the point that gives the values of RB RB
loop
IC IC
output voltage and output current of a VCC
IB IB
transistor is called the operating point. VCE VCE
Depending on the bias voltage and the VBE VBE
circuit components, the operating point IE IE
can be at any location on the output
characteristics. But, for a fixed value of Fig. 4.2: Transistor Circuit for determining load line.
bias voltage and output resistance (or load
resistance) operating point can be at any
location within a line on the output characteristics. This line is called the load line. Thus, the
line, drawn on the transistor output characteristics, that gives all possible positions of the
operating point is called the load line. To draw a load line we will consider a common-emitter
(CE) circuit as shown in Fig. 4.2. For CE configuration, the load-line is a graph of collector
current ( ) versus collector-emitter voltage ( ) for a given value of collector resistance
and given supply voltage . That is, the load line shows all corresponding levels of and
that can exist in a particular circuit.
To draw the load line, we need an expression that relates and . This can easily be found
form the C-E circuit of Fig. 4.2(a). By applying KVL to C-C loop of this circuit we get,

or,
Chapter 4: BJT Biasing Circuits 38

Equ. (4.2) is an equation of straight line or the load line. To draw this line on the output
characteristics of the transistor we have to determine two points. Let’s do that.
Point A:
When, from Equ. (4.2) we get,

Point B: IC (mA)
When, , again from the same equation 10
we get, B IB = 40 A
8
IB = 30 A
6 1
Slope =
RL
Now, if we put these points on the output IB = 20 A
characteristics of the transistor and connect 4
them we get the load line as shown in Fig.4.3. DC load line IB = 10 A
2
Equation (4.2) can be written as, IB = 0
0 5 10 15
A 25 VCE 20

(V)
Fig. 4.3: Load line drawn on the output
Now, equation (4.3) is comparable with a characteristic curves.
standard equation of straight line,

Comparing equations (4.3) and (4.4) we find that, the slope of the load line is and
is the -intercept. Thus, the shape of the load-line completely depends on the values
of and .
If the values of and are fixed the operating IC (mA)
point of the transistor can change only along this load 1
0
line depending on the values of . For example, if 8
the value of increases (with constant values of Operating
6 or Q-point
point
and ) the operating point will move toward the IBQ
ICQ
point B and if decreases the operating point will 4
move to point A. But, for a fixed value of , the 2
DC load line
operating point also be fixed as shown in Fig. 4.4. VCEQ
0 15 20
5 1025 VCE (V)
Thus, the intersecting pint of the DC load line and the
output characteristic curve of a transistor is called Fig. 4.4: Operating point (intersection
the operating point. It is also called the quiescent of load line and a fixed output
point or simply -point. Therefore, a -pint gives a characteristic curve).
fixed value of output voltage and output current
which are represented as and . If we draw a vertical line through the -pint it will
intersect the -axis and this is the value of . Similarly, a horizontal line through the -pint
Chapter 4: BJT Biasing Circuits 39

will intersect the -axis and that will give the value of . The value of the base current for
which the operating pint is set, is called quiescent base current and denoted as .
It is not always necessary to have the device characteristics in order to draw DC load line. A
simple graph of versus can be draw for any value of and . But if the load line is
drawn on the output characteristics, knowing any value of or the other two can
easily be determined.
4.4 Variation of Load Line and Operating Point
We know that the shape and position of the load line depends only on the values of and
. It will not depend on the properties of the transistor. The position of the Q-point depends
on the load line and the value of . Keeping constant, if we increase the value of , the
value of decreases. Then, the load lines will start from the same pint on the -axis, but
on the -axis they will go down, and for a fixed value of base current , the operating point
will move from right to left as shown in Fig.4.5. On the other hand, if the value of increases
with a constant value of , the load lines will be parallel to each other as shown in Fig.4.6.
Because, if is made double will also be double. In this case, for a fixed value of ,
the operating point will also move from left to right.

IC IC IC
Q-point shifting Q-point shifting Q-point shifting
to left to right to left-up
Q-point 2 Q-point 2
IBQ3
Q-point 1 Q-point 3
IBQ IBQ Q-point 3 IBQ2
Q-point 2
IBQ1
Q-point 3 Q-point 1 Q-point 1
VCC VCE VCC1 VCC2 VCC3 VCE VCC VCE
Fig. 4.5: Variation of load line Fig. 4.6: Variation of load line Fig. 4.7: Variation of Q-point
and Q-point for fixed and and Q-point for fixed and for fixed and but
variable . variable . variable or .

Another reason of variation of the operating pint is the change of base current or the change
of of the transistor. In both the cases, the output collector current and C-E voltage change
along the load line. This is illustrated in Fig. 4.7.

Example 4.2:
For the circuit of Fig.4.2 draw the load line and the operating point. Assume, ,
and . Also determine the values of and .
Solution:
Chapter 4: BJT Biasing Circuits 40

To solve this problem, we will use the characteristic curves of Fig.4.3. We already know that
the load line can be drawn connecting two points, on the -axis and on the
-axis. For this example these points will be and .

IC (mA)
10 B(0,10)
IB = 40 A
8
Q-point I = 30 A
B
6
Load line
ICQ = 4 IB = 20 A
5.7 mA
IB = 10 A
2
A(20,0)
IB = 0
0 5 10 15 20 25 VCE (V)
VCEQ = 8.53 V
Fig. 4.8: Load line and Q-point for example 4.2.

Now, these points are put on the output characteristic curve and connecting them the load
line is drawn as shown in Fig.4.8. The intersecting point of this load line and the
curve is the Q-point. From the Q-point the values and are found as and
, respectively.

4.5 Swing of Operating Point for AC signal

As already stated, the DC operating point determines the transistor collector current and
collector-emitter voltage. Thus, it defines the DC conditions of the circuit. But, when a
transistor is used as an amplifier, an AC signal is applied to the input circuit as described in
Chapter 3. For common emitter amplifier the AC signal is applied to the base through a
capacitor as shown in Fig. 4.9. Due to this AC signal, changes according to the instantaneous
value of the AC signal which is shown in Fig.4.10. This variation in causes to vary, and
consequently produces a variation in . During the positive half-cycle of the signal,
increases and for this reason increases also. Due to this increase in , the value of
decreases. On the other hand, during the negative half-cycle of the input signal, decreases
and consequently decreases. As decreases, the value of increases. In this way, an AC
swing is produces in the output current and in the output voltage . To make the process
clearer, let us draw the DC load line and the operating point for
and . The load line and the operating point ( ) are shown in
Fig.4.10. When, due to the positive swing of the input signal, is increased from DC quiescent
value to , increases to approximately and becomes as
illustrated by point C on the load line. Thus, the swing (change) of the output voltage due to
the positive cycle of the input is,
Chapter 4: BJT Biasing Circuits 41

And the swing in the output current is,

IC (mA)

10 B
iC 8.3 mA IB = 50 A
iB
VCC Im C Im
8
RC IB = 40 A
RB

I/P AC signal
IC swing
IC 6 IB = 30 A
C IB 0 0
VCE 4 Q-point IB = 20 A
VBE
vi IE IB = 10 A
2
-Im -Im
D
A IB = 0
1.7 mA
0 5 10 15 20 25 VCE (V)
Fig. 4.9: CE circuit with AC 3.4 V 0
0 vCE 16.4 V
signal applied to the base.
-Vm
VCE swing Vm
Fig. 4.10: Swing of Q-point along the load line.

Now, due to the negative swing of the input signal, is decreased from to 1 ,
decreases to approximately 1.7 and becomes as illustrated by point D on the
load line. Thus the swing of the output voltage (for –ve cycle of input) is,

iC IC
And the swing in the output current is, Im
B
IC swing

Therefore, we find that, with the -point Q-point

set at and a 0 t
variation of in the base current
( ) produces an output voltage ( )
swing of and also a an output -Im 0 A
current ( ) swing of . The higher 0 VCC VCE
0
the swing in the greater the voltage 0 vCE
-Vm
gain can be achieved from the transistor VCE swing Vm
circuit. t
Fig. 4.11: Swing of Q-point along
The maximum possible C-E voltage swing
the load line.
( ) for a given circuit, can be
determined without using the transistor characteristics. For convenience, if we neglect the
effect of saturation and cutoff region, it may be assumed that can be driven to zero at one
extreme and to at the other extreme. For his changes, the C-E voltage will also change
Chapter 4: BJT Biasing Circuits 42

from to as illustrated in Fig. 4.11. Thus, if we set the Q-pint at the centre of
the load line it is possible to achieve the maximum collector voltage swing and the maximum
collector current swing. Then, the value of the maximum swing in will be and the
value of the maximum swing in will be .

4.6 Effect of Cutoff and Saturation Region on Q-Point Swing

The cutoff and saturation region of a transistor hamper to produce the maximum swing of
and . We have already learnt in Chapter 3 that in saturation region both the B-E and B-C
junctions are forward biased and in cutoff
IC
region both of them are reverse biased.
Hence, when a transistor is used as an
amplifier, these regions are avoided. That is, Highest
Q-point
is never allowed to fall below the
Load line
saturation voltage of the transistor .
Similarly, is never allowed to fall below Q-point
Max IC

. Thus, in practical transistor circuit the

maximum swing of the operating point will
not touch the -axis and -axis, rather its Lowest
Q-point
swing will be as shown in Fig. 4.12. But, as
VCE(sat) ICEO
the value of is very small compared to
the level , in the first approximation, it can
VCE
be neglected. For low power transistor the Max VCE
value of . Hence, in the
Fig.4.12 Possible max. swing of Q-point
second approximation this value can also be
considering and .
neglected. Then, we will get the swing of
the Q-point as shown in Fig.4.11

4.7 Selection of DC Operating Point

It is wise to set the DC operating point at the middle of the maximum swing span. Then, the
circuit can amplify comparatively a larger input signal as shown in Fig.4.11. But, if we do not
set the Q-point at the middle of the swing range, the peak swing will be limited by the lower
portion of the load line as shown in Fig.4.13(a).
Q-point can be set either by the value of or by the value of . If one parameter is set at
the middle of the load line the other parameter will automatically be set.
For ideal circuit (neglecting and ) the Q-pint will be set at the middle of the load
line by any one of the following equations.
Chapter 4: BJT Biasing Circuits 43

IC IC
iC B
B

iC

Q-point Q-point

0 t 0 t
A A
0 0
0 VCC VCE 0 VCC VCE
0 0
vCE vCE

(a) t (b) t

Fig.4.13: Result of setting Q-point not in the middle of the swing span, (a) Small swing
of and , and (b) One half-cycle is distorted for large swing of and .

On the other hand, for a practical circuit (considering and ), we have to use either
of the following equations to set the Q-pint at the middle of swing span.

Example 4.3
TIP2955 and TIP 3055 are two power transistors. The values of and are
and , respectively. Considering and , (i) draw the load line, (ii)
maximum swing span and (iii) position of the operating point. Show them using a sketch.
Solution:

(i) By plotting the points, on the -axis and on the

-axis and joining them the load line is drawn on the Fig.4.14.
(ii) The swing span of : Minimum value of ,
Chapter 4: BJT Biasing Circuits 44

Maximum value of ,

Thus the swing span of will be,

IC (A)

1.0
B(0,1)
Highest
Q-point
0.8
The swing span of : Minimum value
of , 0.6

IC = 0.8993
450.35 mA Q-point
0.4
Lowest
Maximum value of , 16.49 V
Q-point
0.2
VCE(sat)= 3 V ICEO = 0.7 mA
A(30,0)
0
0 5 10 15 20 25 30 VCE (V)
VCE = 26.98
Fig. 4.14: Graph for example 4.3.
Thus, the swing span of will be,

(iii) To get maximum swing, the Q-point must be set at the middle point. So the value of
and will be,

All of the results are shown in Fig.4.14.

Comments: The effect of is insignificant and can be neglected.

4.8 Bias Stability (Stability of Operating Point)

The target of a biasing circuit is to provide proper bias of the transistor junctions and to keep
the bias conditions fixed irrespective of the change of related parameters. The bias point or
the operating point is determined by the circuit components as well the parameters of the
transistor. But the transistor parameters do not remain constant, rather they change due to
the variation of temperature. Even, transistors with same number may have different
parameters due to manufacturing tolerance. The parameter is a prime example: it increases
Chapter 4: BJT Biasing Circuits 45

with temperature as well as with collector current. Again, every transistor may have any value
of within a range to . All the variable parameters cause instability of the biasing
condition and shift the operating point. To design a better biasing circuit we must have the
knowledge of the parameters that are sensitive to with temperature. These are listed below:
Beta ( ): Beta increases with the increase in temperature.
Barrier voltage of B-E junction : decreases with the increase in temperature. For Ge
transistor its value decreases at the rate of about and for Si transistor the decrease
rate is about .
Leakage current : For both Ge and Si transistor the value of doubles for every
rise in temperature.
The changes of these parameters, from the reference temperature to , are
illustrated in Fig.4.15.

IC (mA) IB (A) ICBO (nA)

5 120 50
at 40 C at 40 C IE = 0
4 100 40
80 IB at 40 C
3
at 40 C IB = 20 A 30
60 at 30 C IE = 0
2 at 20 C 20
IB = 20 A IB at 20 C
at 20 C 40
at 20 C IE = 0
1 20 10

0 0 0
0 5 10 15 20 25 VCE (V) 0 0.2 0.4 0.6 0.8 1.0 1.2 VBE (V) 0 5 10 15 20 25 VCB (V)

(a) (b) (c)

Fig. 4.15: Effect of temperature (a) Effect of  increase, (b) Effect of VBE
decrease, and (c) Increase of ICBO.

The value of of a transistor depends on all of these parameters. To understand this, look at
the following equation.

directly depends on and . Moreover, if decreases due to increases in

temperature, will increase which will further increase .
Thermal Runaway:
The flow of collector current produces heat in the transistor. This rises the temperature of the
transistor. With the rise in temperature, the values of and increase, and the value of
decreases. According to equation (4.9) the change in these parameters increase the value
of . The increase in increases the temperature of the transistor further. If the biasing point
of the transistor is not properly stabilized, this regenerative effect may increase to an
excessively high level. This excessive value of produces a lot of heat, which is not possible
Chapter 4: BJT Biasing Circuits 46

for the transistor to withstand. Consequently, the transistor is destroyed. This type of self-
destruction of an unstaibilzed transistor is called thermal runaway.
4.9 Stability Factor
Stability factor is a parameter that expresses how much the operating condition of a transistor
circuit is stable. That is, a stability factor is a measure of how sensitive the collector bias
current ( ) is to the change in , and due to temperature or any other reason. Thus,
stability factor is defined for each of these parameters as:

To illustrate, if the value of for a certain circuit is 20, then a change in from
to will cause a change in equal to
. An ideal circuit will have the value of stability factor of zero, implying no
change in for any change in the related parameters. The actual value of a practical bias
circuit depends on the components used in the circuit and never be 0.
Each of the equations (4.10) to (4.12) gives the stability factor related to variation in one
parameter only, so the total change in collector current over a certain temperature range can
be calculated approximated by,

The expression is an approximation because all three parameters change simultaneously with
temperature.

4.10 Biasing Circuits

In section 4.2 we have seen how a transistor can be biases properly using a single voltage
source (battery or power supply). This is the simplest form of biasing circuit. To achieve the
fixed operating point, there are many other biasing circuits. The names of different biasing
circuits are:
a) Fixed bias or base bias
b) Base bias with emitter feedback or emitter bias
c) Collector-to-base bias
d) Voltage divider bias
4. 11 Fixed Bias Circuit
Chapter 4: BJT Biasing Circuits 47

Well, the simplest biasing circuit discussed in section 4.2 is called the fixed bias. For proper
understanding of the calculation, the circuit is redrawn in Fig. 4.16(a). The collector resistor
used in transistor circuit is also called the load resistance. So, for biasing only a fixed resistance
is used in the base circuit. That’s why, this circuit is called fixed bias or base bias. The value of
the supply voltage and sets a base current . Depending on the of the transistor a
collector current is developed. is determined by , and . As the target of the
biasing circuit is to set a DC operating point or bias point, we will derive the equations that
determine the position of the operating point.
VCC
IC
RC RC
RB IB ICRC
IC IC C-E
IB VBE IB VCC
RB IBRB
VCE VCE loop
VBE B-E IE
VCC loop
IE IE

(a) (b) (c)

Fig. 4.16: Fixed bias circuit, (a) Complete circuit, (b) B-E loop, and (c) C-E loop.

Applying KVL in the base-emitter circuit [Fig. 4.16(b)] we get,

Using this equation we can easily calculate the value of . As, this value determines the
position of Q-point, it is also represented by .
If we know the value of of the transistor, the collector current can be calculated as,

Now, applying KVL in the collector-emitter circuit [Fig. 4.16(c)] we get,

Using the equations (4.14) to (4.16), we can calculate the value of and corresponding
the operating point of the base bias circuit. That’s why, these collector current is represented
by and the collector-emitter voltage is represented by .
Determination of Load Line of Fixed Bias Circuit:
Chapter 4: BJT Biasing Circuits 48

Determination process of load line for fixed bias circuit has already been discussed in Section
4.2. Load line can be drawn using Equ. (4.16). When , and when
. Thus, the load line starts from on the -axis and ends to on the -
axis.
Saturation of Transistor in Fixed Bias Circuit:
In fixed bias circuit, if a resistor of any value is connected to the base, the transistor will never
go to cutoff. This is true for all basing circuits that will be discussed later. That is, by using any
inaccurate biasing components, there is no chance of driving the transistor to cutoff. But if we
use incorrect values of biasing resistors, transistor may become saturated. That’s why in
transistor biasing, we should be aware of saturation of the transistor, because saturation
causes distortion. Transistors in base bias circuit may be saturated due to very large value of
and , and very small value of . In servicing (repair) electronic circuit with base bias, we
may replace the transistor. If the new transistor has a very large value of the transistor may
be saturated. Similarly, if we replace by a very low value resistor, or by a very high value
resistor the transistor may also be saturated. To make the concept clear refer to Example 4.5.
The saturation current of base bias will be approximately,

Example 4.4:
Assuming , , and a silicon transistor with ,
determine the operating point of the circuit of Fig. 4.16(a). Sketch the load line and show the
Q-point. Also calculate the saturation current
considering . IC (mA)
12
Solution: Load line
10
Using Equ. (4.14), the base current of the bias point is, 8 Q-point

6 IBQ = 62.8 A
ICQ=6.28 mA
4
2 VCEQ=5.72 V
Using Equ. (4.15), collector current at the bias point is,
0
0 2 4 6 8 10 12 VCE (V)

Fig. 4.17: Load line and Q-point

Using Equ. (4.16), collector-emitter voltage at the of example 4.4.
operating point is,

The calculated operating pint and the load line is drawn in Fig. 4.17.
The saturation current can be calculated from Equ.(4.16) as,
Chapter 4: BJT Biasing Circuits 49

Example 4.5:
A fixed bias circuit is designed with and a VCC = 12 V
transistor with which is shown in Fig. 4.18.
In this design the operating point is set at the middle RB RC 3k
of the load line. Calculate the operating point. To 560 k IC
check how higher values of and and lower value IB
 = 100
of saturate the transistor, calculate the operating
points considering , and IE
, one by one.
Solution:
Fig. 4.18: Fixed bias circuit for
Example 4.5.

As, , the operating is at the middle of the load line.

Operating point for :

Operating point for :

Operating point for :

Chapter 4: BJT Biasing Circuits 50

Comments: From this example, it is clear that higher value of and , and lower value of
can saturate a transistor in fixed bias circuit.
Calculation of Stability Factors:
To calculate the stability factor we need the exact expression of the collector current,

Putting the value of from Equ. (4.14) into Equ. (4.15),

Differentiating the Equ. (4.17) with respect to considering and constant,

Now, differentiating Equ. (4.17) with respect to for constant values of and ,

Again, differentiating Equ. (4.17) with respect to for constant and ,

Chapter 4: BJT Biasing Circuits 51

Example 4.6:
The following table shows the parameter values for a typical transistor at temperature
and . Find the total change in DC collector current over the temperature range for the
base bias circuit of Fig.4.16(a). Assume the values of and .

Solution:
Using Equ. (4.14), base current at ,

Using Equ. (4.15), collector current at is,

Using Equ.(4.13),

Using equations (4.18) to (4.20),

Comments: The change in is mostly responsible for the change in collector current due to
temperature.
Chapter 4: BJT Biasing Circuits 52

Effect of and :
When the transistor’s DC current gain is known, it is easy to determine the circuit bias
condition as in Example 4.4. Similarly, if the value of is given, we can easily design a bias
circuit. However, in practical situation the manufacturer’s datasheet of transistor does not
mention a single value of . We know, transistors are usually identified by type numbers. For a
specific number of a transistor, datasheet mentions the value of in a range. That is, the
minimum value of and the maximum value of (written as Min. and Max. ). In
circuit analysis, it is sometimes convenient to use the typical value of of the transistor. But,
we should be aware of the effect of .
To illustrate the situation, let us consider the transistor BD135. The values of and
are 40 and 250, respectively (shown in the data in Chapter 3). We will first design a fixed bias
circuit considering the value of in between the range, say and then, will see the
effect of and . To design the bias circuit, assume .
To set the Q-point at the middle of the load line, the value of the collector-emitter voltage
should be,

the voltage drop across the collector resistor will be,

Therefore, the value of collector resistor will be,

The value of base current will be,

So, the value of base resistor should be (using Equ. 4.14),

The designed biasing circuit is shown in Fig. 4.19(a).

For the designed value of , actual base current will be,

Hence, the actual operating will be,

Chapter 4: BJT Biasing Circuits 53

The designed circuit is shown in Fig.4.19(a), and the load line and the operating point are
shown in Fig.4.19(b).
Now, to see the effect and , we will recalculate the operating point considering,
. These can be done using the above two equations.
For :

For :

The variation of the Q-point for is also shown in the same figure.
The variation is so large that the circuit will not work properly with .

IC (mA)
Q-point: max = 250
VCC = 12 V 4
IBQ = 13.781 A

RC 3k 3 Design Q-point

RB
820 k IC IBQ = 13.781 A
IB 2
 = 145
1
Q-point: min=40
IE IBQ = 13.781 A

0
0 2 4 6 8 10 12 VCE (V)
(a)
(b)

Fig. 4.19: Effect of operating point, (a) Designed circuit with

, and (b) Load line and operating points.

4.12 Fixed Bias with Emitter Feedback

This biasing circuit is exactly same as fixed bias, but an additional resistor ( ) is used in the
emitter terminal as shown in Fig. 4.20(a). This biasing circuit is also called emitter bias. The
function of is to provide better stability of the DC operating point than the fixed bias
network. The more stable a configuration, the less its response will change due to undesirable
changes in temperature and device parameter variations. The emitter resistor applies a voltage
to the input circuit which is proportional to the output current. This mechanism is called
feedback, which will be studied later. For this reason is called emitter feedback resistor.
Chapter 4: BJT Biasing Circuits 54

Calculation of operating point:

From the forward biased B-E circuit, using KVL [Fig. 4.20(b)] we get,

VCC
IC
RB RC IB IC RC
IC
VBE
C-E
RB IE VCE loop VCC
IB
IB B-E
VCC loop RE
IE RE IE RE

(a) (b) (c)

Fig. 4.20: Fixed bias with emitter resistor, (a) Complete circuit, (b) B-E loop, and (c) C-E loop.

Once, is found, the collector current can be calculated as,

We can also calculate , without calculating as,

Chapter 4: BJT Biasing Circuits 55

Now, applying KVL, in the C-E loop of Fig.4.20(c) we get,

Using equations (4.21), (4.22) and (4.24), the operating point of the circuit can easily be
calculated.
Stabilization mechanism:
From the forward biased B-E circuit we have found,

For fixed values of and the value of will be fixed. Now, if due to the increase
in temperature collector current increases, will also increase. Hence, according to
Equ.(4.25), will also decrease. With this decrease in collector current will decrease. In
this way any attempt to increase will automatically be adjusted. On the other hand, if
decrease from the DC bias point due to decrease in temperature, will decrease, will
increase and will also increase.
Emitter Resistance Feedback to Input:
From equation (4.21), we see that the emitter resistor also affect the input (base) current.
Actually is fed back to the input
circuit. Equation (4.21) can be
represented by an equivalent circuit as IB B IB B
in Fig.4.21(b). This figure will produce B-E
junction
the same result as equation 4.21. From RB VBE RB VBE
this figure it is clear that is reflected E E
to the base circuit being multiplied by a VCC IE RE VCC Ri = IB (+1)RE
factor . In other words, the (+1)RE
emitter resistor, which is part of the
collector–emitter loop, appears as (a) (b)
in the base–emitter loop.
Because is typically 50 or more, the Fig. 4.21: Equivalent circuit of B-E junction side,
emitter resistor, multiplied by a large (a) B-E junction is represented by a diode,
(b) B-E junction is represented by its barrier
number, appears to the base circuit.
voltage VBE.
Therefore, the resistance in the base
terminal is increased. In general, for the configuration of Fig. 4.21(b), the input resistance ( )
seen from the base terminal will be,
Chapter 4: BJT Biasing Circuits 56

Actually, the static resistance ( ) of the forward biased B-E junction will be included in series
with . But, as its value is very low, in the analysis of bias circuit it is neglected.
Determination of Load Line of Emitter Bias Circuit:
Determination process of load line for emitter bias circuit is a little different from the fixed bias
circuit. Load line can be drawn using Equ. (4.24).

When , and when . Point lies on the -

axis and the point lies on the -axis. Connecting these two points, we can
draw the load line.
Saturation of Transistor in Emitter Bias Circuit:
We have already learnt that there is very little change to drive a transistor in cutoff, by using
any inaccurate values of biasing resistors or by changing unless the base terminal is open. In
changing components, we should be aware of saturation of the transistor. We will try to use
components of designed values. But in any case, if we use inaccurate value of components,
transistor in emitter bias circuit may also be saturated. Here, the transistors may be saturated
for very large value of and , and very small value of . Any change in cannot saturate
the transistor. These saturation effects are explained further in Example 4.7. The value of
current that will saturate the transistor is,

Example 4.7
An emitter bias circuit is designed with
VCC = 12 V
and a transistor with which is shown in Fig.
4.22. In this design the operating point is set at the RB RC 3 k
middle of the load line. Calculate the operating point. 470 k IC
To check how the higher values of and and the IB
lower value of saturate the transistor, calculate  = 100
the operating points considering , IE
and , one by one. Also to RE 1 k
prove that cannot saturate the transistor repeat
the problem for and .
Fig. 4.22: Emitter bias for Example 4.7.
Solution:
Operating point of the given circuit:
Using Equ.(4.21)
Chapter 4: BJT Biasing Circuits 57

Using Equ.(4.24)

As, , the operating point in the given circuit is at the middle of the load line.
Operating point for :

Operating point for :

Operating point for :

Operating point for :

Operating point for :

Chapter 4: BJT Biasing Circuits 58

Comments: Although, from Equ. (4.24) it is apparent that the higher values of will saturate
the transistor. But from this example, we find that higher values of tend to shift the
transistor to cutoff, as the base current is reduced drastically.

Calculation of Stability Factors:

From the B-E circuit we have found that,

From the B-C circuit we have found,

Putting the value of from Equ. (4.28) into Equ. (4.15),

Differentiating Equ. (4.29) with respect to for constant and ,

Chapter 4: BJT Biasing Circuits 59

Now, differentiating Equ. (4.29) with respect to for constant and ,

Now, differentiating Equ. (4.29) with respect to for constant and ,

Since, the differentiating terms have variables in numerator and denominator, we have to use
method. Let, , and
.

Now, let and

and .
Chapter 4: BJT Biasing Circuits 60

Again, let and

and .

If we compare the three stability factors of this circuit with those of base bias circuit, we find
that the stability factors for this circuit are quite smaller. These are reduced by a term
. This is due to the feedback of the emitter resistor to the input circuit.

Example 4.8
Fig. 4.23(a) shows a fixed bias circuit with emitter resistor, designed to set the operating pint
at the middle of load line considering a typical value of 145. Calculate the load line and
operating point of this circuit. If the transistor has and , calculate the
lowest and the highest operating point. Compare the results with the results of Fig.4.19.
Chapter 4: BJT Biasing Circuits 61

IC (mA)
4
VCC = 12 V Q-point: max = 250

3 IBQ = 11.57 A
RB RC 1.5 k
600 k Design Q-point: =145
IC 
IB 2
IBQ = 13.8 A
 = 145
IE 1 Q-point: min=40
IBQ = 17.08A
RE 1.5 k
 0
0 2 4 6 8 10 12 VCE (V)
(a)
(b)
Fig. 4.23: Circuit diagram and graph for Example 4.8.

Solution:
Using Equ.(4.21),

Using Equ.(4.24),

For :

For :

The load line will start from on -axis and ends to on -

axis. The load line and the operating points are shown in Fig. 4.23(b).
The values of operating pints of the circuits of Fig. 4.19(a) and 4.23(a) for different values of
are given in Table 4.3.
Table 4.3. Variation of operating points due to variation in .
Chapter 4: BJT Biasing Circuits 62

Without RE With RE

40 0.551 10.35 0.683 9.95

145 1.998 6.00 2.000 6.00
250 3.445 1.67 2.893 3.32

Comments: From the table we see that, the change in operating point is less in the circuit with
emitter resistor. In the circuit with emitter resistor, base current decrease with the increase in
. Explanation of this decrease is given in section (Stabilization mechanism). Here, only a
resistor is used in the emitter. By using resistor of larger value, we could have achieved
more stabilized operating point.

4.13 Base Bias for PNP Transistor

The base bias and the emitter bias have been discussed for NPN transistors. Here, we will
study the same bias circuits for PNP transistors. In Chapter 3, we have already known how to
bias a PNP transistor. Let us start from that circuit. It is redrawn in Fig. 4.24(a). Now applying

IC IC
IB IB
VCE RC 2 k VCE RC 2 k

23 k RB VBE VCC = 137k RB VBE VCC =

VBB = 18 V VBB = 18 V
3V IE 18 V IE

(a) (b)

VBB = -18 V VCC = -18 V VCC = -18 V VEE = +18 V

IE
RC 2 k RC 2 k VBE
173 k RB 173 k RB IB
IC IC VCE
IB IB
VCE VCE IC
VBE VBE 173 k RB RC 2 k
IE IE
(c) (d) (e)

Fig. 4.24: Base bias for PNP transistor, (a) Biasing using and sources, (b) Biasing
using two sources, (c)-(e) Alternate representations of Fig.(b).
Chapter 4: BJT Biasing Circuits 63

the same concept as NPN transistor, we can use resistors to control the currents [Fig.4.24(b)].
Using suitable values of exactly same amount of voltage can be applied to both in base and
collector [Fig.4.24(c)]. Now connecting the same potential terminals we can draw the circuit of
Fig. 4.24(d). It can also be represented as in Fig. 4.24(e). This is the base bias circuit for PNP
transistor.
Here also we can use an emitter resistor to stabilize the Q-point as in Fig. 4.25. This circuit is
the base bias with emitter feedback resistor (or emitter bias) for PNP transistor.
Now adding a resistor in the emitter terminal, we will find the emitter feedback bias for PNP
transistor. This biasing circuit is shown in Fig. 4.25.

VCC = -18 V VEE = +18 V

IC RC IE RE
RB
VBE
IB IB
VCE VCE
VBE
RB IC RC
IE RE

(a) (b)
Fig. 4.25: Emitter feedback bias for PNP transistor, (a) For
negative voltage system, and (b) Positive voltage system.

All the equations, derived so far for base bias and emitter bias using the NPN transistors are
also applicable for the biasing circuits of PNP transistor.

4.14 Collector-to-Base Bias

The collector-to-base bias circuit is shown in Fig.4.26(a). In this circuit, collector voltage is used
to bias the B-E junction, that’s why it is called collector-to-base bias. Like the emitter resistor,
here, the collector resistor provides feedback for bias stabilization. For this reason, this biasing
circuit is also called base bias with collector feedback or simply collector feedback bias. The
stabilization mechanism is same as described for emitter feedback bias circuit. If collector
current ( ) increases due to increase in temperature, collector voltage ( ) decreases. This
decrease in collector voltage reduces the level of base current. In the same process, if ( )
decreases due to decrease in temperature, collector voltage increases which increases the
base current. In this way, this biasing circuit provides better stabilized operating point.
In the emitter feedback bias, we can increase the stability by increasing the value of . Thus
the voltage drop across will also increase and hence, the voltage drop across will
decrease. So for a fixed value of , the value of will be low. But the voltage gain of an
amplifier depends on the value of . Therefore, the increased stability reduces the value of
and hence, the value of voltage gain. On the other hand, in collector feedback bias circuit,
Chapter 4: BJT Biasing Circuits 64

to get better stabilization, we have to increase the value of . This increased value of will
also increase the voltage gain of the amplifier circuit.

VCC VCC VCC

RC RC IC + IB IC + IB RC
KVL
KVL
IB IC IB IB I
RB IC C
RB RB
VCE VCE VCE
IB
VBE VBE VBE
IE IE IE
(a) (b) (c)

Fig. 4.26: Circuit diagram of collector-to-base bias, (a) Biasing circuit,

(b) KVL applied to input circuit, and (c) KVL applied to output circuit.

Calculation of Operating Point

Applying KVL in the forward biased B-E circuit as shown in Fig.4.26(b), we get,

Another equation for the base current can be found by applying KVL in the loop: emitter-to-
collector, collector-to base through and then base-to-emitter as,

Once, is found, the collector current can be calculated as,

We can also calculate , without calculating from Equ.(4.33),

Chapter 4: BJT Biasing Circuits 65

Now, applying KVL, in the reverse biased C-E junction we get [Fig.4.26(c)],

Using equations (4.16), (4.10) and (4.17), the operating point of the circuit can easily be
calculated.

Example 4.9
Calculate the operating pint of the circuit of VCC = 6 V
Fig.4.27. Assume . Verify the collector
current using Equ.(4.37) 5k RC

Solution:
390 k RB
Using Equ.(4.34), the value of base current is,  =100

Using Equ.(4.36), the value of collector current is,

Fig. 4.27: Circuit for Example 4.9.

Using Equ.(4.38), the value of collector-emitter voltage is,

Let us check using Equ.(4.37),

Chapter 4: BJT Biasing Circuits 66

Determination of Load Line of Collector-to-Base Bias Circuit:

Determination process of load line for collector-to-base bias circuit can be determined using
Equ. (4.38).

When , and when . The points are exactly same as

fixed bias circuit. Putting these points on an coordinate system, we can easily draw
the load line.
Saturation of Transistor in Collector-to-Base Bias Circuit:
Same as the previous biasing circuits, use of inaccurate component values may also saturate
transistors in collector-to-bias circuit. Here, the transistors can be saturated for very large
value of and , and very small value of . The effects are same as the emitter bias circuit.
The proof of these saturations are left for the students in Exercise no. 4.. The value of collector
current that will saturate the transistor of collector-to-base bias will be approximately,

Calculation of Stability Factor

From the forward biased B-E circuit, we have already found Equ.(4.33) which is,

The collector current is,

Putting the value of from Equ. (4.40) into Equ. (4.15),

After solving the above equation for , we find,

Chapter 4: BJT Biasing Circuits 67

Comparing Equ.(4.41) with Equ.(4.29), we find that the only difference is in place of . So
differentiating Equ.4.41, we will get exactly the same results, but, in place of . Therefore,
the stability factors for this biasing circuit will be,

and,

Example 4.10
If the value of of the transistor of Fig. 4.27 increases from 100 to 150, calculate the change in
collector current using normal procedure and using Equ.4.44.
Solution:
Normal procedure:
Using Equ.(4.34), the value of base current is,

Using Equ.(4.36), the value of collector current when will be,

The value of collector current when is calculate in Example 4.9.

Using that value, the change in collector current is,

Using Equ.4.44:
Here, change in current gain is,
As Equ.(4.44) is applicable for a very small change in , we have to use it in some small steps.
Staring from , Equ. 4.44 is solved for every 5 increase in . Their average value is
determined. The data are shown in the following Table.
Chapter 4: BJT Biasing Circuits 68

 100 105 110 115 120 125 130 135 140 145 150 Average
S()(A) 2.61 2.47 2.34 2.22 2.11 2.01 1.92 1.83 1.75 1.67 1.6 2.048

Thus, the average value of the stability factor is,

Comment: Exactly same results are found using normal procedure and the stability factor.

Example 4.11
Fig. 4.28(a) shows a collector-to-base bias circuit, designed to set the operating pint at the
middle of load line considering a typical value of 145. Calculate the load line and operating
point of this circuit. If the transistor has and , calculate also the lowest
and the highest operating point. Compare the results with the results of two other biasing
circuits.
IC (mA)
VCC = 12 V
4
Q-point: max = 250
RC 3
3 k Q-point: =145
IBQ = 9.89 A
IB 2 IBQ = 13.65 A
RB IC
390 k Q-point: min=40
1
IB IBQ = 22.039A
IE
0
0 2 4 6 8 10 12 VCE (V)
(a)
(b)
Fig. 4.28: Circuit diagram and graph for Example 4.11.

Solution:
Using Equ.(4.34),

Using Equ.(4.38) [neglecting ],

For :
Chapter 4: BJT Biasing Circuits 69

For :

The load line will start from on -axis and ends to on -axis. The load
line and the operating points are shown in Fig. 4.28(b).
The values of operating pints of circuits this collector-to-base bias and other two biasing
circuits for different value of are given in Table 4.3.
Table 4.3. Variation of operating points due to variation in .
Without RE With RE Collector-to-Base Bias

40 0.551 10.35 0.683 9.95 0.881 9.36

145 1.998 6.00 2.000 6.00 1.979 6.06
250 3.445 1.67 2.893 3.32 2.471 4.59

Comments: From the table we see that, the change in operating point is less in the collector-
to-base bias circuit then other two biasing circuits. Here, only a 3 resistor is used in the
collector. By using larger value of , we can achieve more stabilized operating point.

VEE -VCC

IE
IC + IB RC
VBE
VCE IB
IB IC
RB
RB
IB
VCE
IB
VBE
IC + IB RC IE

(a) (b)

Fig. 4.29: Collector feedback bias for PNP transistor, (a) For negative voltage
system, and (b) Positive voltage system.
Chapter 4: BJT Biasing Circuits 70

4.15 Collector-to-Base Bias for PNP Transistor

The collector-to-base bias circuit for a PNP transistor is shown in Fig.4.29. The circuit is exactly
same except the polarity of the biasing voltage and the directions of currents are reversed. All
the equations derived for the NPN transistor can be used to analyze the circuits for PNP
transistors.
4.16 Variation of Stability Factors:
So far, we have studied three types of biasing circuits. Three stability factors have been
calculated for all the biasing circuits. Before going to the next biasing circuit, we will study the
variation of the stability factors. Already we know that, to stabilize the operating pint, we need
to keep the stability factor as small as possible.
From the stability factors for fixed bias [Equ.(4.18) to (4.20)], we find that they depend on the
value of , and . is the current gain of the transistor. We want a larger value of . On
the other hand, is determined by the system voltage. Again, we cannot increase the value
of , because an exact value of is necessary to set the value . Hence, for the fixed bias
circuit practically we have a little scope to control the stability factor.
S S

S( )

S(ICBO)

S(VBE)
S(VBE)
S(ICBO) S( )

(a) RB (k) (b) RE or RC (k)

Fig. 4.30: Variations of stability factors with

(a) Variable , (b) Variable or .

The stability factors for the emitter feedback circuit and the collector feedback circuit are given
by Equ.(4.30) to (4.32) and Equ.(4.42) to (4.44). The stability factors of emitter feedback circuit
depend on , , and . But the stability factors of collector feedback circuit depend on
, , and . While in the fixed bias circuit larger value of gives lower stability factor,
in the emitter bias lower value of gives a better stability factor (lower values of stability
factors) except . The variation of stability factors with the variations of are shown in
Fig.4.30(a). On the other hand, the higher values of and improve all the stability factors
which are sown in Fig.4.30(b). Only depends on the value of (biasing voltage of the
base circuit) and lower value gives better stability. In summary, we can say for better stability
the values of and biasing voltage of the base-emitter circuit should be smaller and the
value of and should be larger.
Chapter 4: BJT Biasing Circuits 71

4.10 Voltage Divider Bias

Voltage divider biasing circuit is the best among the four biasing circuits. It provides the scope
to set any value of and . The voltage divider biasing circuit is shown in Fig.4.31(a), Here,
instead of supplying the full (as done in previous bias circuits), it is divided using the
voltage divider network and then supped to the base. For this reason, it is called voltage
divider bias. It is also called self bias. By changing the ratio of and any value of voltage
can be set for the base circuit. Similarly, by changing the values of and the value of
(here it will be ) can be set to any desired value. Like the other two feedback biasing
circuits, here also produces negative feedback and provide better stability of the circuit.

VCC VCC VCC

R1 IC RC R1 IC RC IC RC

IB B R1 B

I2
R2 VCC R2
R2 VB RE RE
IE RE
G G
Thevenin’s Thevenin’s
Theorem Theorem
(a) (b) (c)
Fig. 31: (a) Voltage divider bias circuit, (b) Location of Thevenin’s theorem, (c) Fig. b is redrawn.

Calculation of the operating point

The circuit can be analyzed both in exact method and also in approximate method. We will see
the exact analysis first. R1
B
Exact Analysis:
ETh = VR2
First, we have to determine the Thevenin’s equivalent VCC R2 V R
= CC 2
circuit of the voltage divider portion, i.e., at the base- R1+R2
emitter terminals as shown in Fig.4.31(b) and 4.31(c). G
(d)
calculation: Thevenin’s voltage will be the open
circuit voltage across [see Fig.4.31(d)]. Applying R1
voltage divider rule we get, B
RTh = R1ǁ R2
VCC = 0 R2 R R
= 1 2
R1+R2
calculation: To calculate , first we have to G
replace the voltage source by short circuit as shown in (e)
Fig.4.31(e). Looking at the and terminals we find
Fig.4.31: (d) Circuit for ETh calculation,
that and are in parallel. Therefore the
(e) Circuit for RTh calculation.
Chapter 4: BJT Biasing Circuits 72

Thevenin’s resistance will be,

Now, if we redraw the biasing circuit using the Thevenin’s equivalent circuit, we get the circuit
of Fig.4.32 (only the input loop is shown).
To calculate the value of (which is also ), let us apply KVL in the base-emitter circuit of
Fig.4.32.

IC
Therefore, the value of collector current will be, IB RTh B

VBE

ETh B-E IE RE
The collector-emitter loop will be exactly same as in the loop
Fig.4.20(c). Applying KVL to that loop,
Fig.4.32: Base-emitter loop with
Thevenin’s equivalent circuit.

Using Equ.(4.48) and (4.49) the exact position of the operating pint of voltage divider bias
circuit can be calculated.
Analysis Neglecting the Effect of (Approximate Analysis):
When can we neglect : The voltage divider network, and hence, the Thevenin’s equivalent
circuit works as the source of supply voltage to the base-emitter circuit. If very small amount
of current is drawn by the base terminal of the transistor ( is very small), we can neglect the
voltage drop across . Alternately, we can neglect the drop of if the load connected to
the Thevenin’s circuit is very large compared to . The condition will be true if the load
resistance is ten times of or even more. As shown in Fig.4.33, the load resistance
connected to the Thevenin’s circuit is seen from the base circuit, i.e., . Thus the
condition to neglect the effect of is:
Chapter 4: BJT Biasing Circuits 73

But, generally in a voltage divider bias circuit and for any

transistor . Hence, we can write
the condition as, IC
RTh B

IB
If any voltage divider bias circuit fulfill the condition of IE
Equ.(4.52), we can neglect the effect of and ETh Ri = ( +1)RE RE
analyze the circuit very easily. This analysis is called G
approximate analysis.
Approximate Analysis:
Fig. 4.33: Load resistance of the
If we neglect the voltage drop across , Equ.(4.47) Thevenin’s circuit is Ri = ( +1)RE.
can be written as,

The value of will be same as before, i.e., . The value of

can be calculated using Equ.(4.51).

Example 4.12
For the voltage divider biasing circuit of Fig. 4.34, calculate the following using exact analysis
and approximate analysis. (i) , (ii) , (iii) , (iv) , and (v) . Compare the results
obtained from exact and approximate analysis.

VCC = 12 V
Solution:
Exact Analysis: R1 RC
IC
5.6 k
Values of and can be calculated using 22 k
Equ.(4.45) and Equ.(4.46) as,
 = 100
IB
R2
4.7 k RE
IE
1.5 k

Fig. 4.34: Voltage divider bias circuit

The biasing base current can be calculated using for example 4.12.
Chapter 4: BJT Biasing Circuits 74

Equ.(4.48),

Now the quiescent collector current will be,

Using Equ.(4.51), we can calculate ,

and can be calculated multiplying and by the current flowing through them.

Approximate Analysis:

Condition for approximate analysis : or or

Values of and can be calculated using Equ.(4.53) and Equ.(4.51),

and can be calculated multiplying and by the current flowing through them.

Now, dividing by we will get the value of ,

Chapter 4: BJT Biasing Circuits 75

Comparison:

Exact
Approx.
Variation 3.52% 3.41% -4.14% 3.68% 3.33%

Comment: As the condition for approximate analysis was true, the variation is less than 5%.
But the variation will be different depending on the values of and , even the condition
is true.

Example 4.13

Even the condition for approximate analysis is not

VCC =12 V
true for the voltage divider bias circuit of Fig. 4.35,
repeat Example 4.12, to see the differences in the
R1 IC RC
results. 8.2 k
430 k

Solution:  = 100
IB
R2
Here, , and RE
100 k IE
. 1.5 k

Now applying the same formulas as example 4.12 Fig. 4.35: Voltage divider bias circuit
for example 4.13.
the values of , , , , and have been
calculated using exact method and approximate
method. The results are shown in the following table:

Exact
Approx.
Variation 55.21% 55.22% -65.51% 56.00% 55.17%

Comment: As the condition is not true for this example, the differences between the exact and
approximate method are very high. To get more detail idea how the values of and
affect the results, refer to the graph of Fig.4.36. Here, the difference (%error) between
found in exact method and approximate method is shown for different values of the ratio of
to .
Chapter 4: BJT Biasing Circuits 76

%error

18
16
14
12
 RE =10R2
10
8
% error in ICQ calculated using
6
approximate method.
4
2  RE/10R2
0
01 5 10 15 20 25 30 35

Fig.4.36: % error in ICQ calculated using approximate method of voltage divider

bias with , and variable and .

Determination of Load Line of Voltage Divider Bias Circuit:

Determination process of load line for voltage divider bias circuit is exactly the same as that of
emitter bias circuit. Load line can be drawn using Equ. (4.51).

When , and when . Now, we have to put these

two points on a coordinate system. Point lies on -axis and the point
lies on -axis. Joining these two points by a straight line, we will get the
load line.
Saturation of Transistor in Voltage Divider Bias Circuit:
We have already learnt the causes of saturation of transistors in different biasing circuits.
Voltage divider biasing circuit may also be saturated by inaccurate component values. Here,
the transistors can be saturated for very larger values of and , and very small values of
and . Any value of will not saturate the transistor. The proof of these saturations are
left for the students in Exercise no. 4.. The saturation collector current for this voltage divider
circuit will be approximately,

Calculation of Stability Factors of Voltage Divider Bias

From the forward biased input circuit (B-E loop), we have already found Equ.4.47, which is
Chapter 4: BJT Biasing Circuits 77

We know that the collector of a transistor is,

Putting the value of from Equ. (4.45) into Equ. (4.56),

Now, if we compare Equ.4.57 with Equ.4.29, we find that the only difference is: in place of
and in place of . So differentiating Equ.4.57, we will get exactly the same results,
but, in place of and in place of . Therefore, the stability factors for the voltage
divider bias circuit will be,

and,

The expressions for the stability factors for voltage divider bias are comparable with those of
the emitter bias and collector feedback bias circuits. Already we have found that a lower value
of and give better stability. In voltage divider bias, the corresponding values are
and . But the the values of and are much lower than that of and . So, the
Chapter 4: BJT Biasing Circuits 78

voltage divider bias provides the best stability for operating point. The dependency of the
stability factors on , will be same as shown in Fig.4.30.
Lower values of and higher values of give improved stability factor except
[higher values of and give better ]. However, lower value of causes power
loss in voltage divider network, and higher value of decrease the voltage gain of the
transistor circuit. For this reason, we cannot make very low, and very high. We have to
make a tradeoff between them. To make it clear, let us rewrite Equ. (4.58) as,

From Equ. (4.61), if , i.e., , we can write, To get exactly

, must be zero, which is not possible. But, theoretically can be
made equal to 2 by making . Again, practically it is not possible. Because, in practical
circuit, must be greater than .
If , i.e., , then we get, That is, the
value of will remain less than .
Finally, if , i.e., , then the value of the stability factor will
be Although, here we have approximate three different values of ,
actual values will changes gradually with the increase in the ration of as shown in the
graph of Fig. 4.37. This is a semi-log graph, that has been drawn with
, and different values of and . To keep the value of unchanged (and hence
the operating point of the bias circuit) the ration of was not changed. As practically
cannot be 1, the graph start from 2 for . When , the value

60

50

40

30
26
20

10
2
0
1 10 51 100 1000 10000

Fig.4.37: Variation of with the variation of

Chapter 4: BJT Biasing Circuits 79

of will be . As the graph has been drawn for , this point is shown by
(51, 26) on the graph.
Although, the graph shows the variation of for voltage divider bias, by using for
the result for emitter feedback bias and using in place of collector feedback bias will be
found. The shape of the graphs from them will be same and all the conditions and results
discussed here, will be equally applicable from them.

Example 4.14
Fig. 4.38(a) shows a voltage divider bias circuit considering a typical value of 145. Calculate
the load line and operating point of this circuit. If we consider BD135 transistor, that has
and , calculate the lowest and the highest operating point. Compare
the results with the results of Fig.4.19, and Fig.4.23.

VCC =12 V IC (mA)

4
R1 RC
IC Q-point: max = 250
18 k 2k 3
Q-point:  =145
 = 145 2
IB
R2 Q-point: min=40
5.6 k RE 1
IE
1k
0
0 2 4 6 8 10 12

Fig. 4.38(a): Voltage divider Fig. 4.38(b): Operating points of

bias circuit for Example 4.14 example 4.14

Solution:
Exact Analysis:
Values of and can be calculated using Equ. 4.45 and Equ. 4.46 as,

The biasing base current can be calculated using Equ. 4.48,

Now the quiescent collector current will be [Equ.(49)],

Chapter 4: BJT Biasing Circuits 80

Using Equ.(4.51), we can calculate ,

By repeating the above process, the operating points for and have
been calculated and the results are given below:

: , and

: , and

The load line will start from on -axis and ends to on -axis.
The load line and the operating points are shown in Fig.4.38(b).

For comparison the results of three types of biasing circuits are shown in Table 4.5.

Table 4.5: Variation of operating points due to variation in .

Fixed bias Emitter feedback bias Voltage divider bias

40 0.551 10.35 0.683 9.95 1.897 6.31

145 1.998 6.00 2.000 6.00 2.072 5.78
250 3.445 1.67 2.893 3.32 2.103 5.69

Comments: Look at the operating points of the voltage divider bias. In spite of a very large
variation in , there is a very small change in the operating points.

4.11: Voltage Divider Bias for PNP Transistor

The voltage divider bias circuit for a PNP transistor is shown in Fig.4.339. Here, the collector is
connected to lower potential and the emitter is connected to higher potential, which is just
opposite to that of NPN transistor. Moreover, the polarity of the voltages across the terminals
and the direction of currents are reversed. In case of negative voltage system, Thevenin’s
theorem has to be applied in the same position as for NPN transistor, but for positive voltage
system, Thevenin’s voltage has to be calculated across instead of , i.e., the base voltage
( ) will be across . has to be calculated as,
Chapter 4: BJT Biasing Circuits 81

Apart from these differences, a PNP transistor voltage divider bias circuit can be analyzed in
exactly the same way as an NPN transistor. That is, the equations derived for the NPN
transistor can be used for the circuits with PNP transistors.

Thevenin’s
Theorem VEE -VCC

R1 IE RE R1 IC RC

IB

IB
R2 R2
IC RC IE RE

Thevenin’s
(a) Theorem (b)

Fig. 4.39: Voltage divider bias for PNP transistor, (a) Negative
voltage system, and (b) Positive voltage system.

Example 4.15
For the voltage divider circuits of Fig. 4.40, calculate the operating pints.

VEE = 12 V VCC = -12 V

R1 RE R1 RC
IE IC
47 k 1.3 k 130 k 3k
IB
 = 145  = 145
IB
R2 R2
130 k RC 47 k RE
IC IE
3k 1.3 k

(a) (b)
Fig. 4.40: PNP transistor circuits for Example 4.15 (a) Positive voltage (b) Negative voltage.

Solution:
Positive voltage system [Fig. 4.40(a)]:
Using Equ.(4.62),
Chapter 4: BJT Biasing Circuits 82

Using Equ.(4.46),

Using Equ.(4.48),

Using Equ.(4.49),

Using Equ.(4.51),

Negative voltage system [Fig. 4.40(b)]:

Using Equ.(4.45),

Rest of the calculation is same and the same results will be found.
Comments: For positive voltage system the values of and will be just reversed. will
be connected to ground and will be connected to . Thevenin’s theorem has to be
applied to . But for negative voltage system the circuit is exactly same as NPN transistor and
the analysis is also exactly same.

4.12: Biasing Circuit with Split Power Supply

We know a normal power supply (a voltage VCC VCC
source) has two terminals: a positive
RC RC
terminal and a negative terminal or ground RB
IC IC
same as any battery. But, there are some IB IB
power sources that have three terminals: a VCE VCE
positive terminal, a negative terminal and a VBE RB VBE
ground. This type of power source is called IE IE
-VEE -VEE
split power supply. Some electronic circuits (a) (b)
need split power supplies. In this section, we
will see how to analyze basing circuits if a Fig. 4.41: Base bias circuit with split power supply.
split voltage source (split power supply) is
connected to the circuit.
Base Bias Circuit with Split Power Supply
Chapter 4: BJT Biasing Circuits 83

If a base bias or fixed bias circuit uses a split supply as shown in Fig. 4.41(a), the circuit can be
analyzed using the same formulae as single supply base bias circuit. Only the difference is,
instead of , we have to use . The expressions for finding the operating point of
this circuit will be:

Base bias with split power supply is sometimes represented as in Fig.4.41(b). For this circuit,
Equ. (4.63) will only be different. Now the base-emitter circuit will be forward biased by .
Therefore,

Example 4.16
Calculate the operating point of the base bias circuit of Fig. 4.42. Also determine the operating
point if a base resistor of is connected from ground to the base.

+9 V +9 V
RC
RB IC RC 2.4 k
560 k 2.4 k IC
IB
 = 120  = 120
IB RB
IE 270 k IE
-9 V -9 V
(a) (b)

Fig. 4.42: Circuit for Example 4.16.

Solution:
Using Equ.(4.63),

Using Equ.(4.64),
Chapter 4: BJT Biasing Circuits 84

The resistor is connected from ground to the base. So this circuit is same as that of
Fig.4.41(b).
Using Equ.(4.65),

Using Equ.(4.64),

Comments: Using lower value resistor from ground to base same result can be found.

Emitter Bias with Split Voltage Supply

Emitter bias circuit with split voltage
VCC VCC
supply may also have two configurations.
One configuration is same as previous RB IC RC IC RC
emitter bias circuit [Fig. 4.43(a)] and the IB
other is the base resistor connected to
ground [Fig. 4.39(b)]. For the circuit of IB VBE
RB
Fig. 4.43(a) the equations will be, IE RE IE RE

-VEE -VEE
(a) (b)
Fig. 4.43: Emitter bias with split voltage supply.

In circuit of Fig.4.43(b), the collector is connected to positive terminal and the emitter is
connected to negative terminal of the split source. The base is connected to ground through a
small resistor . This circuit is also called emitter current bias. The lower value of provides
better stability. As is very small, voltage drop across it will also be very small. If we neglect
this voltage drop, we can assume the base is connected to the ground potential. Now applying
KVL in the base-emitter circuit, we get,
Chapter 4: BJT Biasing Circuits 85

If is selected so small that is very small compared to . A good approximation

is Then, the value of can be calculated very simply as,

If is very larger than , we can write,

From Equ.(4.69), we find that in independent of and . Thus the circuit will give a very
stable operating point.

For both the circuit the base-emitter voltage will be,

Collector-to-Base Bias with Split

VCC
Voltage Supply
RC RC
VCC
The collector-to-base bias with split
IB IC IB IC
power supply ( is shown RB RB
in Fig.4.44. All the equations derived
VCE VCE
for single voltage source can be sued IB
VBE
IB
VBE -VEE
to analyze this circuit by using IE IE
instead of . -VEE

Fig. 4.44: Collector-to-base bias with split power supply.

Chapter 4: BJT Biasing Circuits 86

Voltage Divider Bias with Split Supply

The voltage divider bias with split voltage is shown in Fig.4.45(a). A positive voltage is supplied
to the collector and a negative voltage is supplied to the emitter. The input and the output to
this circuit will be with respect to ground as shown in the figure. All the equations derived for
voltage divider bias with single voltage source can be used to analyze this circuit using
instead of .

VCC VCC

R1 IC RC IC RC
R1
C1 IB C1 IB C2
C2
RL RL
Vin R2 Vin R2
IE RE RE
-VEE -VEE
(a) (b)

VCC I1 I2
R1 VCC I1 R1 VCC R1

R2 VEE R2 VEE R2
VEE RE I2

(c) Thevenin’s (d) (e)

Theorem
Fig. 4.45: Voltage divider bias With split voltage source, (a) Biasing circuit with input and
output source, (b) DC equivalent circuit, (c) Position of Thevenin’s equivalent, (d)
calculation, and (e) calculations.

However, in some literature, instead of using the same equations, is calculated in different
way. To do that, look at the figures- Fig.4.45(b) is the DC equivalent circuit, Fig.4.45(c) is the
same figure with two voltage sources connected with respect to ground and the terminals are
opened where Thevenin’s theorem has to be applied. Since, there are two voltage sources, we
have to use superposition theorem to calculate the value of . is the voltage to the base
with respect to ground. If we replace by a short circuit and consider only , value of
will be . As shown in Fig.4.45(d), this voltage is positive. If we replace by
Chapter 4: BJT Biasing Circuits 87

a short circuit and consider only , value of will be [as shown in

Fig.4.55(e)]. According to the superposition theorem, the value of will be

If we short both the source of Fig.4.45(d) or Fig.4.45(e),

we can find the value of as,
IC
IB RTh B

VBE
Fig. 4.46 shows the base-emitter loop of the biasing
network with Thevenin’s equivalent circuit. Now value ETh B-E IE RE
of can be calculated by applying KVL in the base- loop
VEE
emitter loop as,

Fig.4.46: Base-emitter loop with

Thevenin’s equivalent circuit.

Value of can be calculated by apply KVL in the collector-emitter circuit. Its value will be,

VCC VCC

IC RC IC RC
R1
IB
IB
VB = 0 RTh

R2 ETh= 0
IE IE RE
RE

-VEE -VEE
(a)

Fig.4.47: (a) Voltage divider bias equivalent to emitter

current bias, (b) Thevenin’s equivalent circuit.
Chapter 4: BJT Biasing Circuits 88

Emitter Current Bias from Voltage Divider Bias:

In circuit of Fig.4.45(b), if the values of and are selected in proportion with the negative
and positive voltages, i.e., , then from Equ. (4.73) the value of will be
zero. However, the value of will not be zero. Now if of Fig.4.46 is replaced by a short
circuit, it will be like that of Fig. 4.47(b), which is same as the emitter current bias circuit [Fig.
4.43(b)]. Thus, we can say that the circuit of Fig.4.47(a) is the voltage divider equivalent of
emitter current bias circuit with the condition .

Example 4.17

For the voltage divider biasing circuit of Fig.4.48, determine the operating point, draw the load
line and place the operating point on the load line.

IC (mA)
+9 V 3.0
2.77 mA
IC RC 2.5
R1
5k 2.0 Q-point
47 k
IBQ = 11.19 A
IB 1.5
 = 140
1.0 ICQ=1.56 mA
R2 0.5 VCEQ=7.82 V 18 V
10 k IE RE
1.5 k 0
0 5 10 15 20 VCE (V)
-9 V

Fig. 4.48: Voltage divider bias Fig.4.49: Load line and operating
circuit for Example 4.17 point of Example 4.

Solution:

Using Equ.(4.73),

And the value of ,

Using Equ.(4.74),
Chapter 4: BJT Biasing Circuits 89

Using Equ.(4.75),

The load line:

From Equ.(4.75), when ,

When ,

The load line is drawn by connecting two points: one is (18 V, 0) on the -axis and the other is
on the -axis [Fig.4.49].

Comments: This problem can also be solved using the following equations:

4.13: Comparison of Biasing Circuits

It is already discussed that the main target of a biasing circuit is to provide a stable operating
point irrespective of the change in temperature or the transistor current gain . As the values
of for a particular transistor changes in a wide range (from to ), the biasing circuit
must have the ability to compensate this wide change of . Suppose an electronics company
has designed a biasing circuit using the typical value of for transistor. But when the circuit is
manufactured, the transistor may have maximum value of . If the biasing circuit doesn’t have
the ability of compensate this change, the transistor may be saturated and the circuit will not
Chapter 4: BJT Biasing Circuits 90

work. In actual design, a circuit is tested whether it works for the minimum and maximum
value of . Thus, the performance of a biasing circuit is evaluated by the change in operating
point due to the change in . This is the main parameter of evaluation. Moreover, we can
consider the number of components required, thermal stability, power loss etc.

VCC = 12 V VCC = 12 V

RB RC 3k RB RC 1.5 k
820 k IC 600 k IC 
IB IB
 = 145  = 145
IE
IE
RE 1.5 k
IC (mA) IC (mA) 
Q-point: max = 250
4 4
IBQ = 13.781 A Q-point: max = 250

3 3 IBQ = 11.57 A
Design Q-point
Design Q-point: =250
IBQ = 13.781 A
2 2
IBQ = 13.8 A

1
Q-point: min=40 1
Q-point: min=40
IBQ = 13.781 A IBQ = 17.08A

0 0
0 2 4 6 8 10 12 VCE (V) 0 2 4 6 8 10 12 VCE (V)

(b) (a)
Fig. 4.50: Comparison of biasing circuits, (a) Base bias, and (b) Emitter bias.

So far we have studied four types of biasing circuits. We have already designed four biasing
circuits considering . For every circuit the quiescent collector currents have been set
approximately and at the middle of the load line. The total resistance in the
collector and emitter is for every circuit. Then, the change in operating pint for
and has also been calculated. For better comparison the circuits and
the graphs are reproduced here in Fig.4.50 and 4.51. The positions of the operating pints are
also plotted in a single load line in Fig. 4.52.

From these graphs we can say that the voltage divider biasing circuit gives the highest stability
and the base bias gives the minimum stability against the change of . The emitter bias has
stability greater than the base bias but lower than, collector-to-base bias voltage divider bias.
Although, here, the effect of change of has been shown, the voltage divider bias gives the
best thermal stability as well. That’s why voltage divider bias is mostly used. The main
disadvantages of voltage divider bias are, it needs more components, and the voltage divider
network produces some power loss. On the other hand, the base bias needs the fewest
components and produces no extra losses. For this reason, the base bias is used for switching
purpose.
Chapter 4: BJT Biasing Circuits 91

VCC =12 V
VCC = 12 V

RC RC
3 k R1 IC
18 k 2k
RB IB IC
390 k  = 145
IB
IB R2
IE 5.6 k IE RE
1k

IC (mA) IC (mA)
4 4
Q-point: max = 250
Q-point: max = 250
3 Q-point:  =145 3
IBQ = 9.89 A Q-point:  =145
2 IBQ = 13.65 A 2
Q-point: min = 40 Q-point: min= 40
1 1
IBQ = 22.039A
0 0
0 2 4 6 8 10 12 VCE (V) 0 2 4 6 8 10 12
(a) (b)
Fig. 4.51: Comparison of biasing circuits, (a) Collector-to-base bias, and (b) Voltage divider bias.

IC (mA) VCC = 12 V
RC = 3 kor, (RC + RE) = 3 k
4
max = 250
Base bias
3
min = 40

Emitter bias
2

1 Voltage divider
bias
Collector-to-base
0 bias
0 2 4 6 8 10 12 VCE (V)
Fig. 4.52: Change of operating points due to change in in four biasing circuits.

4.14: Biasing Circuit Design

Designing any circuit means to determine the appropriate values of the components and also
selection of the devices. Designing a bias circuit depends on a lot of decisions, for example,
supply voltage, the load to be driven, level of stability, position of operating point, level of
Chapter 4: BJT Biasing Circuits 92

collector current etc. However, for a given supply voltage, collector current and the transistor
current gain , design process is quite simple. Unless otherwise specified normally the biasing
circuit is designed to keep the operating point more or less middle of the load line. If the level
of collector current is not given and the load is also not known, then the collector current level
can be considered in the range of . After selecting the value of , the voltage
levels of and are determined. Dividing the collector current by base current is
calculated and solving standard equations of the bias circuit, values of different resistors are
calculated. Once, we get the resistance values, we have to find the nearest standard values.
Then we may have to recalculate the current or voltage using the standard values of the
resistance. The list of the standard resistors is given in Appendix. We have to calculate the
currents and voltage levels using and as well.

Base Bias Circuit Design

If is known, to set the operating point at middle of the load line, we have to set
, or if the value of is given, voltage drop across the collector resistor
will be . Now, if the value of is given or selected, dividing by will give
the value of . Value of can be calculated simply dividing by . Finally, the value of
can be calculated as .

VCC

RC
RB
IC
IB

VBE
IE

(a)

Fig.4.53: Base bias circuit design.

Example 4.18

Design a base bias circuit that will be operated by a supply voltage of . Assume the
current gain of the transistor is .

Solution:

As the collector current level is not given, let it be . Value of is not given as well. So,
Chapter 4: BJT Biasing Circuits 93

VCC = 12 V

RB RC 3k
The value of base current will be, 680 k IC 2 mA
IB
VCE = 6 V
16.67 A
Therefore, IE

Fig.4.54: Designed base bias

circuit of Example 4.18
Value of can be calculated as,

The designed base bias circuit is shown in Fig. 4.54.

Emitter Bias Circuit Design

The design procedure of emitter bias circuits is almost similar to that of base bias circuits
except to determine the level of emitter voltage and hence the value of . The values of
collector current should be decided by the current drawn by the load. To keep the voltage gain
unchanged, should be very large compared to load current (2 to 10 times). But, if the values
of and are unknown, can be set in the range of 1 to . Once is decided, next
we have to determine the values of and . Well, a larger value of will result in a larger
value of and a larger provides better stability. Question is how large should we set the
value of . A larger value of or produces smaller AC voltage swing across the load
resistor . Therefore, we can achieve stability at the cost of voltage gain. As the target of the

VCC

RB RC
IC
IB

VBE
IE
RE

Fig.4.55: Emitter bias circuit design.

Chapter 4: BJT Biasing Circuits 94

biasing circuit is to provide voltage amplification, we must trade-off between the stability and
the voltage gain. A thumb rule is to allocate more or less one-eighth of the supply voltage to
the emitter. That is . The rest of the voltage should be equally divided between
and . Now the values of and can easily be calculated by dividing their voltages by
their current. Next by dividing by , the value of can be calculated. Using this , can
be found solving the equation of base current. The equations required to design a emitter bias
circuit are shown in Fig.4.55. To make the concept clear, refer to the Example 4.19.

Example 4.19

Design an emitter bias circuit that will be operated by a supply voltage of . Assume
that the transistor has the current gain of 150.

Solution:
VCC = 20 V
Let,
RB RC 4.3 k
and, 1.2 M IC IC = 2.1 mA
IB
VCE = 8.5 V
14 A
IE
RE VE = 2.5 V
1.2 k

Use (standard).
Fig.4.56: Emitter bias circuit
designed in Example 4.19

Use standard Actual value of will be

The value of actual

Chapter 4: BJT Biasing Circuits 95

Let,

The designed circuit is shown in Fig. 4.56.

Collector-to-Base Bias Circuit Design

The design procedure of collector-to-base bias circuits is almost similar to that of base bias
circuits. But the voltage and current levels are different for calculating and . So, different
equations have to be used to calculate their values. As found earlier, for this circuit the voltage
across is and the current through is . The design equations are shown
in Fig.4.57. To make the concept clear, refer to the Example 4.

VCC

IB+IC RC

IB
RB IC

IB
VBE
IE

Fig.4.57: Collector-to-base bias circuit design.

Example 4.20
VCC = 20 V
Design a collector-to-base bias circuit to have IB+IC RC
1.6 k
and . Assume that the
supply voltage is and the transistor has IB
RB IC = 5 mA
. 270 k
IB
Solution: VCE = 12 V
41.67 A
VBE
IE

The value collector resistor can be found as, Fig.4.58: Collector-to-base bias circuit.
Chapter 4: BJT Biasing Circuits 96

Now, the value can be calculated as,

The designed circuit is shown in Fig.4.58.

Voltage Divider Bias Circuit Design

The design procedure of voltage divider bias circuits is almost similar to that of emitter bias
circuits except the calculation of and . Here also, the value of collector current should be
decided depending on the current drawn by the load. To keep the voltage gain unchanged,
should be very large compared to load current (2 to 10 times). If the values of and are
unknown, can be set as before, i.e., in the range of to . Determination process of
is discussed in emitter bias circuit design. The same concept can be apply here. That is,
. The rest of the voltage should be equally divided between and . Values of
and can be calculated simply from Ohm’s law. Next by dividing by , the value of
can be calculated. The base voltage will be .

VCC

R1 IC RC

IB
I2 VBE
R2 VB
IE RE

Fig.4.59: Voltage divider bias circuit design.

The values of and should be as small as possible to keep constant. Moreover, smaller
values of and ensure better stability. But, too small and cause two problems. One
is loss of power, and the other is the lower input resistance. Hence, here we have to make
another trade-off. There are a lot of processes to calculate and , that produce
satisfactory results. We can assume,
Chapter 4: BJT Biasing Circuits 97

Using the values of and , can be calculated. Voltage across will be and its
current can also be assumed . Using these value can be calculated. The equations
required to design an emitter bias circuit are shown in Fig.4.59. To make the concept clear,
refer to the Example 4.21.

Example 4.21

Design a voltage divider bias circuit considering the supply voltage is 16 and the transistor
has .
VCC = 16 V
Solution:
Let and IC RC
R1
1.9 mA 3.6 k
62 k
VCE = 7.5 V
 = 100
IB VE = 1.86 V
R2
13 k IE RE
1k

Fig. 4.60: Voltage divider bias

circuit designed in Example 4.21

Let

Actual will be

The designed circuit is shown in Fig.4.60

Chapter 4: BJT Biasing Circuits 98

4.15: Biasing Circuit for Common Base Amplifier

We have already learnt that in common-base amplifier, the input signal is applied to the
emitter and base terminals and the output is taken from collector and base as shown in
Fig.4.61(a). That is, the base is common to both the input and output circuit. The base-emitter
junction is forward biased by and and the collector-base junction is reverse biased by
and . To protect the DC voltage the input source and the output load are connected by
two coupling capacitors. In electronics these amplifiers have some special applications,
because they have very small input impedance and very large output impedance.

-VEE +VCC

RE RC
C1 IE IC C2 C1 IE IC C2

VBE VBE
RE RC
vi RL VO vi RL VO
IB IB
VEE VCC

(a) (b)
+VCC +VCC

IC RC IC RC
C2 R1 C2

IB C3 IB
RL VO RL VO
C1 C1

R2
IE RE Vin IE RE Vin

-VEE
(c) (d)
Fig. 4.61: Biasing circuit for common–base amplifier, (a) Using two separate voltage source,
(b) and (c) Same circuit represented alternately, (d) Voltage divider bias for CB amplifier.

Moreover, they provide the highest voltage gain. The circuit of Fig.4.61(a) can easily be
redrawn as in the Fig.4.61(b) and (c). Thus, using a split voltage source a CB amplifier can be
biased as shown in Fig.4.61(c). This circuit is exactly same as emitter bias or emitter current
bias with . However, we can also bias this circuit using a single voltage source as in
Fig.4.61(d). In this circuit, the base is at a higher potential than the emitter which will be
determined by and as CE voltage divider bias circuit. But, for the AC signal the base will
be at the ground potential. In common base amplifier, the output current ( ) is related to the
input current ( ) by . The value of is almost constant ( ). Hence, the biasing circuit of CB
amplifier is completely independent.
Chapter 4: BJT Biasing Circuits 99

Now, applying KVL in the input circuit (B-E loop in Fig. 4.62(a), we get,

IE IC

IE
VBE
RE RC
Again, applying KVL in the C-E loop of Fig.4.62(b), we B-E
loop IB
get, VEE VCC

(a)

C-E loop
VCE

IE IC
Applying KVL around the transistor, i.e., C-E-B loop in RE RC
Fig.4.62(c), we get IB
VEE VCC

(b)

IE VCE IC
Again, from the output circuit [B-C loop of
Fig.4.62.(c)] we get, IC
VBE VCB
RE RC
B-C-E IB B-C
VEE loop loop VCC

(c)
In case of single power supply [Fig.4.61(d)], if we
draw the DC equivalent circuit (all the capacitors Fig. 4.62: KVL applied to different loops of
CB circuit (a) B-E loop, (b) C-E loop and,
open), then we will get the voltage divider biasing
(c) B-C and B-C-E loops.
circuit as before. So, by using the equations of
previous analysis, we can solve this circuit of CB
configuration.

To see the variation of output voltage and current, we draw the load line on the output
characteristic curve. For common-base configuration, we have seen in Chapter 2, the output
characteristics is a versus graph. Hence, the load line of CB amplifier has to be drawn
using Equ.(4.79)
Chapter 4: BJT Biasing Circuits 100

When, : this is represented as point and lies on -axis.

When, : this point is represented by and lies on -axis.

By joining these two points, the load line can be drawn.

Example 4.22

For the biasing circuit of common-base configuration in Fig.4.63, determine the load line and
operating point.

+9 V IC (mA)
RC
IC
3k C2
B Load line
3
VCB Q-point
IB
 = 100 RL
2 IE = 1.63 mA
C1

RE 1 IC  1.63 mA
IE
5.1 k Vin VCB = 4.12 V
A
0
-9 V
0 2 4 6 8 9 10 VCB (V)
Fig.4.63: CB circuit for Example 4.22. Fig.4.64: Load line and Q-point for Example 4.22.

Solution:

Though the circuit has both positive and negative voltage, load line will use the positive one.
So it will start from point on -axis, and will end at point
on -axis. It is shown in Fig. 4.63.

Using Equ.(4.76) the emitter current is,

Using Equ.(4.79), the collector-base voltage will be,

Comments: Swing of the Q-point will be limited by the value of . will only forward bias
the input circuit.
Chapter 4: BJT Biasing Circuits 101

4.16 Biasing Common Base Circuits Using PNP Transistor

The same biasing circuits can be used for PNP transistors. Only the supply voltage has to be
reversed. For PNP transistors, the emitter has to be connected to higher potential and the
collector to the lower potential. The base should be at higher potential than the collector and
lower potential than the emitter. This can be easily done by either a split voltage source as in
Fig.4.65 (a) or by using a single-ended voltage source as in Fig. 4.65(b). Fig.4.65(a) is emitter
bias and the Fig.4.65(b) is the voltage divider bias. All the equations derived for the NPN
transistor can also be used to analyze these circuits.

-VCC +VCC

IC RC IE RE
C2 R1 C1

IB C3 IB
RL VO Vin
C1 C2

R2
IE Vin IC RC RL
RE VO

VEE
(a) (b)

Fig. 4.65: Biasing of PNP transistors in CB configuration, (a) Emitter bias with a split
voltage supply, (b) Voltage divider bias with a single source.

Example 4.23 -12 V

RC
Design a common-base amplifier with emitter bias 3k IC
C2
using a PNP transistor of . Assume the
supply voltage is . IB
 = 150 RL VO
Solution: C1

RE
5.6 k IE Vin

+12 V

Fig. 4.66: Designed circuit of Example

Using Equ.(4.76) 4.23.
Chapter 4: BJT Biasing Circuits 102

From the circuit of Fig. 4.66, for the base-emitter circuit we can write

The designed circuit is shown in Fig.4.66.

Comments: The output voltage is and is divided between and .

4.17: Biasing Circuits for Common Collector Amplifier

In Chapter 2, we have seen how to bias a transistor in common-collector configuration using

two voltage sources. That biasing circuit is redrawn in Fig.4.67(a), with two resistors in series
and the input source and output load. The input signal is applied to the base through a
coupling capacitor C1 and the output is taken from the emitter through another coupling
capacitor C2. The collector is common to both the input and output circuits. Fig.4.67(b) is just
the alternate representation of the first figure.

If we carefully look at the Fig.4.67(a) and (b), we find that the base current is flowing from the
negative terminal to the base of the transistor. We know that conventional current cannot
flow from the negative terminal of a source. But, here it is possible because will be
comparative at higher potential that – . Thus, we find that the base of this circuit should be
at higher potential then the emitter. Instead of using – , if we connect the base terminal to
ground through a resistor, then we will find the same result, as ground is in higher potential
than – . Hence, we can represent the circuit of Fig.4.67(b) as in Fig. 4.67(c).
Chapter 4: BJT Biasing Circuits 103

C2 -VBB -VEE
IE
VO
C1 IB VBE IE RE
IB RB
Vi VCE RE
VBE VO
VCB
IB RB Vi VCE
VEE IB
IC VCB
VBB
IC

(a) (b)
VCC
IC IC
RB
VCB VCB
Vi VCE Vi VCE
IB VBE IB VBE
RB VO VO
IE RE IE RE
-VEE
(c) (d)
Fig. 4.67: Biasing circuit for common–collector amplifier, (a) Using two separate voltage sources,
(b) Same circuit represented alternately, (c) CC biasing circuit using negative voltage and (d) CC
biasing circuit using positive voltage.

Alternately, we can keep the base and collector at higher potential then the emitter, by
connecting the positive terminal of a voltage source
to the base and collector and the ground of the VCC
source to the emitter as shown in Fig.4.67(d). R1 IC
Finally, we can say that the circuit of Fig.4.67(c) is C1 IB
the common-collector amplifier with negative C2
biasing system and the circuit of Fig.4.67(d) is that VCE
with positive voltage system. Here, also provides Vin R2
IE RE RL V O
negative feed and better stability. These two circuits
are called emitter bias for CC configuration. As
shown in Fig.4.68, voltage divider bias can also be
used for common-collector amplifier. From all the Fig. 4.68: Voltage divider bias for CC
figures, a relation between the input and the output configuration.
voltage can be found, which is,

From this equation we see that the output voltage is slightly smaller than the input voltage. If
we neglect the voltage drop of the base-emitter junction ( ), we can say the output is equal
to the input. That is the voltage gain of this amplifier is unity. For this reason, this circuit is
called the voltage follower or emitter follower. In spite of its unity voltage gain it provides a
very large current gain. The input impedance of this amplifier is high and the output
Chapter 4: BJT Biasing Circuits 104

impedance is low. Therefore, this amplifier is used at the final stage of a system for impedance
matching or current amplification.

Analysis of Fig.4.67(a) to (c), will result in the same

equations. Applying KVL in the input circuit of Fig. 4.67(c) IC
[redrawn in Fig.4.69(a)], we get IB

VBE
IE
RB B-E
loop RE

VEE (b)

IC
IB
Value of output current will be, VCE
B-E
IE loop
RB
RE
Applying Kirchhoff’s voltage law at the output circuit, we
get [Fig.4.69(b)], (a) VEE

Fig. 4.69: Input and output loops of

common collector circuit.

For the positive voltage system, Fig.4.(d) the equations will be,

For the voltage divider biasing circuit, we have to find out the Thevenin’s equivalent circuit as
before and the equations will be,

For common-collector configuration, we have seen in Chapter 2, the output characteristic is

versus graph. Hence, the load line of CC amplifier can be drawn using Equ.(4.82)
Chapter 4: BJT Biasing Circuits 105

When, : this is represented by point and lies on -axis.

When, : this point is represented by and lies on -axis.

By joining these two points, we will find the load line.

Example 4.24

For the common-collector biasing circuit in Fig.4.70(a) determine the load line and operating
point.
IE (mA)
3.0
IC
2.5 B(0, 2.4 mA)
 =120
2.0 Q-point
Vi VCE
IB VBE 1.5 IBQ = 10.14 A
RB VO
510 k 1.0
RE IEQ=1.23 mA
IE
5k 0.5 VCEQ=5.87 V A(12 V, 0)
-12 V 0
0 2 4 6 8 10 12 14 VCE (V)
Fig. 4.70(a): CC circuit for Example 4. Fig.4.70 (b): Load line and Q-point for Example 4.24

Solution:

Load line can be drawn by joining point on -axis, and point

on -axis. It is shown in Fig. 4.70(b).

Using Equ.(4.80) the emitter current is,

Using Equ.(4.81), the output current is,

Using Equ.(4.82), the collector-emitter voltage will be,

Comments: Swing of the Q-point will be limited by the value of . will only forward bias
the input circuit.
Chapter 4: BJT Biasing Circuits 106

4.18 Common Collector Biasing Circuits Using PNP Transistor

The emitter bias and the voltage divider bias discussed for CC NPN transistors can also be used
for CC PNP transistors. For PNP transistors, the emitter has to be placed at lower potential
than the other two terminals. This can easily be done by either a positive voltage system as in
Fig.4.71(a) or by using a negative voltage system as in Fig.4.71(b) and (c). Fig. 4.71(a) and (b)
are emitter bias and Fig.4.71(c) is voltage divider bias. We can also use positive voltage system
for the voltage divider bias, connecting the ground of the source to upper terminal and the
positive terminal to the lower terminal as shown in Fig.4.72 of Example 4.25. All the equations
derived for the NPN transistor can also be used for the circuits with PNP transistors.

-VCC -VCC
IC IC R1 IC
RB
VCB VCB C1 IB
Vi VCE Vi VCE C2
IB VBE IB VBE VCE
VO VO Vin R2
RB
IE RE IE RE IE RE RL VO

VEE (c)
(a) (b)

Fig. 4.71: Biasing of PNP transistors in CC configuration, (a) Emitter bias with positive
voltage supply, (b) Emitter bias with negative voltage supply, and (c) Voltage divider bias
with a negative voltage source.

Example 4.25 VEE = 12 V

Design a common-collector amplifier with voltage R1 IE 3 k

39 k V1 RE
divider bias using a PNP transistor of .
I1 VBE
Assume the supply voltage is .
IB RL VO
Solution:
Vin R2 30 k IC

Let and .

Fig. 4.72: Common collector circuit

designed in Example 4.25

The value of base current will be

Chapter 4: BJT Biasing Circuits 107

The designed circuit is shown in Fig. 4.72.

Comments: In common collector biasing circuit, the emitter voltage should be half of the
supply voltage instead of one eighth as used for CE amplifier. Moreover, B-E junction will be
forward biased by the voltage across not .

4.19: Transistor as a Switch

So far varieties of biasing circuits for different configurations of transistors have been
discussed. The targets of these biasing circuits were to set the operating point of the transistor
in the active region, so that the circuit can be used as an amplifier. However, in some
applications a BJT may be used as a switch. Though for high power switching circuits, MOSFET
(Metal-Oxide-Semiconductor Field Effect Transistor) is most suitable, for low power switching
BJT is also used. When used as a switch, a transistor is biased is such way that it can operate
either in the cutoff region (OFF switch) or in the saturation region (ON switch). For a switch, we
want that the load will consume power but the switch will consume zero power. How the
transistor-switches consume ideally zero power (practically very small power) will be described
next with a circuit. As the common emitter configuration gives both current gain and voltage
gain, this configuration is mainly used as a switch.

VCC = VL VCC = VL VCC = VL

IL = IC RL IC = 0 RL IC = IL RL

Vi RB IB
VCE  0 Vi = LOW IB = 0 Vi = HIGH IB = IL /
VCE = VCC VCE = 0
or VCC
VBE RB VBE RB VBE
OFF switch ON switch
(a) (b) (c)

Fig. 4.73: Switching action of transistor (a) Switching circuit, (b) Transistor is
open (OFF), and (c) Transistor of closed (ON).
Chapter 4: BJT Biasing Circuits 108

The circuit diagram of a switching network is IC (mA)

given in Fig.4.73(a). This circuit is like a fixed bias Q-point
configuration, but here the base resistor is not (ON switch)
directly connected to the supply voltage ,
Load line
rather it is connected to the system that will drive
the switch ON/OFF. Here, is the load for the Q-point
(OFF
switch. The driving system may be any kind of
switch)
controlling circuit like a microcontroller based
system, an Arduino system or a digital circuit or VCE
(a)
even and analog circuit. In our home, we use IC (mA) (V)
manual switch, but the transistor is a voltage Q-point
(ON switch)
controlled switch. When the driving system, gives
high voltage (greater that 1 V), the B-E junction Load line
will be forward biased and current will flow
through the load. The circuit will be designed Q-point
(OFF switch)
such a way that it will be saturated, i.e., the value ICEO
of will be minimum ( ) and
VCE(sat) VCE
the transistor will work as an ON switch. Almost (b)
(V)
the full supply voltage will be dropped across the
Fig. 4.74: Load line of transistor switch (a)
load, and it will be powered up. But if the driving
Ideal transistor, and (b) Practical switch.
system provides low voltage (less than 0.5 V), the
B-E junction will not be forward biased, and
hence, the transistor will work in the cutoff region and only the leakage current will flow
through the load. Almost the full supply voltage will be dropped across the transistor, i.e.,
. As the current is almost zero, the load will not get power. In this way, the transistor
will operate either in saturation or cutoff region as shown in Fig.4.74.

If we neglect and , when the transistor is ON, it carries maximum current but
voltage drop across it ( ) is zero, so the power loss by the transistor will be zero. On the
other hand, when the transistor is OFF, it drops the maximum voltage ( ) but current
through it is zero. So the power loss in the transistor will be zero. However, note that for very
high power switching circuit, we have to used power transistor that has a metal body or plastic
body with metal collector (TO-218, TO-220, TO-264 as shown in Chapter 3). In this case, the
leakage current and the saturation voltage produce a substantial amount of power loss. So we
have to use heat sink with the transistor. The heat sink is connected to the metal collector of
the transistor. It absorbs heat and keeps the transistor temperature in tolerable range. Here, it
is described how a transistor can control power of a load (load ON/OFF). There is another
application of a transistor switching circuit which is called the inverter.
Chapter 4: BJT Biasing Circuits 109

VCC Vi
HIGH
IC + I L RC
IC IL LOW t
RB IB VO
Vi RL VO  0.2 V
or VCC HIGH

LOW t

(a) (b)
Fig. 4.75 (a): Inverter circuit, (b) Input and output waveform.

The inverter circuit is shown in Fig.4.75. Here, is not the load, rather the load is connected
to the collector as shown in the figure. Well, we will see its operation with a square-wave input
at the input terminal. When the input signal is high, the transistor will be ON and the output
voltage will be almost zero ( ). Again, when the input voltage is low, the transistor
will be OFF and the output voltage will high ( ). In this way, when the input is HIGH
(logic 1) the output is LOW (logic 0), and when the input is LOW (logic 0) the output is HIGH
(logic 1) as shown in Fig.4.75(b). Therefore, we find that the circuit just inverts the input signal-
hence it is called inverter.

4.20 Design of the Switch Circuit:

To design a power switch, we must know the specifications of the load, that is, its power and
voltage ratings ( and ). Dividing the rated power ( ) by the rated voltage ( ), we will get
the current consumed by the load ( ). The value of of the switching circuit will be equal to
the rated voltage ( ) of the load. Now we have to select a BJT, that has
and . To calculate the value of , has to be used. If we use the
typical value of the transistor will not be saturated, if it is replaced by a transistor with
lower .
From the load current , calculate the required base current as,

To calculate the base resistor, the HIGH voltage of the input signal has to be used,

For use the lower standard values, not the higher values, no matter which one are closest.
If we use the higher standard values the transistors will not be saturated and will cause
unnecessary power loss.
Chapter 4: BJT Biasing Circuits 110

If the of the system is fixed, but the load needs lower voltage, then we have to use a
resistor in series with the load. Its value can be calculated as,

But, remember this collector resistor will produce power loss. So this type of arrangement can
be used only in low power circuits.
If any inductive load is used in the collector, a PN junction diode has to be used across the
load. Otherwise, the induced voltage of the inductive load may destroy the transistor.

Example 4.26

A controlling circuit requires to ON/OFF a 220 V CFL light by a 12 V relay. If the output of the
controlling circuit is TTL standard, design a transistor switching circuit to drive the relay and
draw the schematic diagram of the full system.

Solution:

The controlling system will drive the transistor switch by TTL logic voltage, i.e., to in
HIGH level and to in LOW level. The transistor will drive the relay and the relay will
drive the CFL lamp.

We need a transistor that has

VCC = 12 V
NO Neutral of
Pole 220 V AC
D1 Phase of
220 V AC
NC
IC
Controlling circuit Vi RB IB
BC547
HIGH = 2.5 to 5.5 V
 = 120
LOW = 0 to 0.8V 2.7 k VBE

Fig. 4.76: Light controlling circuit of Example 4.26.

Chapter 4: BJT Biasing Circuits 111

Small signal (low power) transistor like, BC547 has

and . We can also use 2N2222.

The relay coil has to be connected to the collector

and . The CFL light has to be connected to the
normally open (NO) switch of the relay. To protect
the transistor a diode has to be connected across
the relay coil as shown in Fig. 4.76.

Comments: Relay is an electromechanical switch.

There are many types of relays available in the
market. A most common 12 V DC relay has a 12
DC solenoid (electromagnet) and three terminals
for switching purpose. The middle terminal is
called the pole, and the terminal to which the pole
is normally connected is called NC (normally
connected) terminal and the terminal to which the
pole is not connected is called NO (normally open)
terminal. When current flows through the coil, it Fig. 4.77: Photographs of relay.
magnetizes and changes the position of the pole.
That is, NO terminal becomes connected to the
pole and NC is disconnected. In place of the CFL any kind of load can be controlled using this
circuit.

The inverter is used mainly for signal conditioning, so the required output current is
comparatively low. If the load current is know, use to times of . If the load current
is not known, chose a collector current of 5 to . The value of should be equal to
HIGH logic value (e.g., for TTL it should be ). As the values of and are low, any
transistor can tolerate these values. But here, the frequency of the transistor has to be large
enough to follow the input signal. The value of , and can be calculated using Equ.(4.85)
and (4.86). The value of has to be calculated as,

For we have to use the higher standard values, not the lower values, no matter which one
are closest. If we use the lower standard values the transistors will not be saturated as before.
Chapter 4: BJT Biasing Circuits 112

Example 4.27

Design an inverter circuit to drive a load that requires TTL logic levels. Assume
.
VCC = 5 V
Solution:
RC
In TTL logic, the value of HIGH logic is 1 k
IC = 5 mA IL
to . So let, .
R B IB
Vi RL VO  0.2 V
36 k 5 k or 4.17 V

(a)

VCC = 5 V

IL RC
1 k
IC = 0 mA IL

RB IB=0 RL
Vi
5 k
36 k

The designed circuit is shown in Fig. (b)

Check for the HIGH logic level: When the Fig. 4.78 (a): Designed inverter of
transistor is OFF, according to the voltage Example 4.27, (b) Output at HIGH state.
divider rule the load voltage will be

Comments: Smaller value of results in larger value of and reduces the HIGH state output
voltage. Whereas, very larger value of produces larger power loss and reduces the switching
speed. On the other hand, larger value of will results in unsaturation of the transistor and
produces power loss, while smaller value of will produce hard saturation and lower
switching speed.

4.21 Switching Circuit using PNP Transistor

Already we have studied that it is possible to ON/OFF the power of a load using an NPN
transistor [Fig.4.73(a)]. Here the load is connected to and collector of the transistor. But
sometimes it is required that one terminal of the load must be connected to ground (grounded
load). In that case we have to design the switch using a PNP transistor instead of an NPN
transistor. Such a switching circuit is shown in Fig.4.79. Here, the load is connected to the
collector and ground terminals and the emitter is connected to supply voltage. The main
difference of this switching circuit is, for the LOW input voltage the load will be ON and for the
Chapter 4: BJT Biasing Circuits 113

HIGH input voltage the load will be OFF. Any input voltage less than can turn the switch
ON, but to turn the switch OFF the level of HIGH input should be equal to . Here, also
and . The value of will be . From B-E loop of Fig.4.79(b), the
value of the base resistor can easily be calculated as,

VEE
VEE
IE
B-E IE
VBE loop
RB IB VCE  0 VBE
Vin Vin
HIFH/ or VCC LOW VCE  0
LOW RB IB
IC RL
IC RL

(a) (b)
Fig. 4.79: PNP transistor as a switch, (a) Switching circuit, and (b) B-E loop of the circuit.

4.22 Limitation of Transistor as High Power Switch

If the current requirement of the load is very high, the of the transistor should also be
very high as the load current flows through the transistor. But a transistor with higher current
capacity has lower value of . For example TIP3055 transistor has , but its
current gain ( ) is as low as 10. So if we design
a switch using this transistor the value of VCC = 12 V
base current will be . This base 198 W
current will produce inefficiency of the IC = 15
Load
switching circuit. If the value of supply voltage Control circuit 180 W
A
( ) is , the load will consume IB = 1.5 A
TIP3055
, while the power  = 10
RB
drawn from the source will be VBE
. That is, is lost is the
switching circuit as shown in Fig. 4.80. This
loss is due to the larger value of base current.
For this reason, for high power switching Fig. 4.80: High power switch: 198 W is
drawn from source, 180 W is used by
instead of BJT, power MOSFET is used (will be load, 18 W loss in the circuit.
described later).

4.23 Transistor as a Current Source

Chapter 4: BJT Biasing Circuits 114

We all use voltage source

either constant or VEE
variable. A constant VCC
IE
voltage source provides a V
IB BE
fixed level of voltage
RL I C = IO VCE
irrespective of the output RB
current. That is, if we IB
change the load VCE RB RL IC = IO
resistance the value of VBE
load current will change
but the voltage will
remain fixed. A battery, a Fig. 4.81: Transistor used as a
current source.
power supply are the
examples of the constant voltage source. On the other hand, in solving problems of electrical
currents, we use current source or constant current source. But do we know any source that
can be used as a current source. Although, there are some current sources, like solar cell, they
are not common. However, a transistor can be used as a constant current source if properly
biased. For the common emitter configuration is the output current that flows through the
load . The variation of will not change the value of as it depends only on . Thus, we
can say that a transistor circuit can behave as a constant current source. Generally, it is
necessary to connect one terminal of the load to the current source and the other terminal to
the ground. For this reason, we have to design a current source using a PNP transistor. The
schematic diagram of a current source is shown in Fig. 4.82.

Example 4.28

For the constant current source of Fig. 4.82, calculate the

output current and output voltage. Determine the
VEE = 12 V
maximum value of that can be used with this current
source. IE
VBE
Solution: IB
 = 120
The value of base current will be,
RB
RL
260 k IO
100 

Here, the output current is the collector current and its

value will be, Fig. 4.82: Constant current
source for Example 4.28.

The output voltage will be,

Chapter 4: BJT Biasing Circuits 115

The circuit will work before being saturated. Considering ,

4.24 Trouble-Shooting of Transistor Bias Circuits

It is a very common fact in laboratory that a

biasing circuit is constructed using a transistor,
+VCC
but the circuit does not work. Then we have to
find out the fault and make the circuit IC RC
R1
functioning. In a transistor circuit the supply
voltage ( ) and the voltage levels at the IB
transistor terminals ( and ) are VC 
measured with respect to the ground terminal or IE 1/2 VCC
negative terminal of the supply source as shown R2 VB VE  1
in Fig.4.83. Generally the circuits are constructed RE
to 6 V
in bread board using connecting wires. The
connecting points of the bread board, the  VE + 0.7V
connecting wires, resistors, supply source or
even the transistor itself may cause the fault. For
Fig. 4.83: For testing a bias circuit,
a faulty circuit different situations may found.
terminal voltages should be measured
We may not find any voltage at any terminal of with respect to ground or negative supply.
the transistor. In that case there must have an
open-circuit. To find out the open-circuit, first
connect a voltage meter to the positive and negative terminals of the supply source. The
voltage meter should read the required voltage level for the transistor circuit. If not, fault is in
the power supply. Then measure the voltage at the positive point of the bread board, then to
resistor-terminals which are connected to the positive point of the bread board. Then check
whether the resistors are properly connected to the transistor terminals. In this way, measure
voltage and proceed to the terminals of the transistor. If any point does not give voltage
reading, that point is not connected to proper position. In this way, we can find out the
location of the open circuit. If the open circuit fault is cleared, we may get incorrect voltage
levels at transistor terminals. The reasons of these inaccurate voltage levels depend on the
types of biasing circuits as described below.

Base Bias

Fig. 4.84 Illustrates typical error sources in a base biased circuit. Normal voltage levels in a base
bias circuit are , and approximately half of or anywhere in the range of
to ( ). If as shown in Fig.4.84(a), it means that the transistor is open. Either
Chapter 4: BJT Biasing Circuits 116

is not supplying base current or emitter terminal is not connected to the ground, or the
transistor itself is faulty (collector and emitter are open). Alternately may be short. When
, could be of higher value than . Other possibilities are either the collector and
emitter terminals are short or is short.

VCC VCC
RC short
RB RC RC
RB short or RC open
IC Transistor RB
very small
RB open open
IB

VBE VC = VCC Transistor IB V VC  0 V

BE
short
E open

(a) (b)

Fig. 4.84: Incorrect voltage levels of base bias circuit and their probable reasons, (a) Probable
reasons for , and (b) Probable reasons for .

Emitter Bias

Some reasons for incorrect voltage levels across different terminals of a transistor in emitter
bias are shown in Fig. 4.85. If , the base resistor and emitter resistor may not
be properly connected (open). The device may be open or the collector resistor may be short
circuited. The situation is same as depicted in Fig. 4.85(a). If or , may be
short or very small. Alternately, may be open or very large or the transistor may be
internally short as shown in Fig. 4.85(b).

VCC VCC

RC short
RB RC RC RC open/
RB short or
RB Very large
IC Transistor very small
RB open open
IB
IB V
VBE Transistor BE VC  0 V
VC = VCC short VCE  0 V
RE open
RE
RE

(a) (b)
Fig. 4.85: Inaccurate voltage levels of emitter bias circuit and their probable causes, (a) Probable
causes for , and (b) Probable causes for .

Collector-base Bias
Chapter 4: BJT Biasing Circuits 117

Some reasons for incorrect voltage levels across different terminals of a transistor in collector-
to-bias are shown in Fig. 4.86 If is not connected properly, transistor will not conduct, so
. Another reasons of are emitter terminal is open and the transistor itself is
open as shown in Fig.4.86(a). If , the transistor is short or saturated. The reasons
behind this are my be short or very low, or the collector and emitter terminals of the
transistor may be short as shown in Fig.486.(b).

VCC VCC

RC short
RC RC

C open
RB IC Transistor RB short or
open RB
IB very small
RB open
IB V VC  0 V
VBE VC = VCC Transistor BE
short
E open
(a) (b)

Fig. 4.86: Incorrect voltage levels of collector-to-bias circuit and their probable reasons, (a)
Probable reasons for , and (b) Probable reasons for .

Voltage Divider Bias

Fig. 4.87 Shows some probable reasons for malfunctioning of a voltage divider bias circuit. If
, either or might be open circuited. Alternately or might be short
circuited. Even the collector and emitter terminals of the transistor may be open circuited
[Fig.4.87(a)]. If , and might be open or very larger than the required
values or collector and emitter terminals of the transistor may be short circuited [Fig.4.87(b)].

VCC VCC
RC open/
RC short Very large
R1 RC
RC R1 short R1
Transistor Transistor
R1 open open short

VC = VCC VC  0 V
R2 open
VCE  0 V
R2 short R2 RE open RE
RE R2

(a) (b)
Fig. 4.87: Inaccurate voltage levels of voltage divider bias circuit and their probable causes, (a)
Probable causes for , and (b) Probable causes for .
Chapter 4: BJT Biasing Circuits 118

4. 25 Miscellaneous Biasing Circuits

So far we have discussed four types of biasing circuits. Besides these biasing circuits, some
other variations can be used to improve some parameters of the circuits. Some of them are
discussed here.

Voltage Feedback Biasing Circuit:

As shown in Fig. 4.88, this is the combination of collector-to-base bias and emitter bias, or
collector-to-base bias with emitter feedback resistor. In this circuit, both the collector resistor
and the emitter resistor provide feedback for better stabilization. The equations to calculate its
operating point will be the combination of those of
collector-to-base bias and emitter bias, or collector-to-base
bias. By applying KVL in the input circuit and output circuit RC
the equations can easily be found. The equations are given VO
below. IB
RB I C

Vi VCE
IB
VBE
IE
RE

If the total resistance of output circuit ( ) and the

collector resistance ( ) of collector-to-base bias is same, Fig. 4.88: Voltage feedback bias.
then the two biasing circuits provide the same stability
against the variation.

Emitter Bias with compensation using Diode:

We know that with the increase in temperature, VCC

increases and hence, increases more rapidly. This R1 IC RC
problem can be overcome, up to a certain extend using a IB
diode with different biasing circuits. Fig.4.89 shows an VCE
emitter biasing circuit with diode compensation. Look the IS VBE
diode is connected in reverse bias polarity. So, normally it D1
will draw a very small leakage circuit (or reverse saturation IE RE
current) . With the increase in temperature, the leakage
current of the transistor ( ) will increase and so does
the reverse saturation current ( ) of the diode. As
Fig. 4.89: compensated
increases the voltage drop across will increase and
hence decrease which is clear from Equ.4.91 If the emitter bias.
temperature decreases, the base current adjustment will
take place in the same method.
Chapter 4: BJT Biasing Circuits 119

Using KVL in the base circuit, we can write,

Voltage Divider Bias with Compensation using Diode:

As discussed earlier, decreases with the increase in temperature ( ). Thus the

base current increases and shifts the operating point. This problem can be minimized using a
diode in voltage divider bias circuit as shown in Fig.4.90. Note that the diode is conned as
forward biased. The value of base voltage ( ) for this circuit will be as given by Equ.4.92. If the
base-emitter voltage of the transistor ( ) changes with temperature, the forward voltage
drop of the diode ( ) will also change at the same rate. Thus, if the required voltage of the
base-emitter junction decreases, according to Equ.4.92, the supply voltage will also decrease
and hence, the base current will remain constant.

VCC VCC

R1 IC RC R1 IC RC
IB IB
VCE VCE
D1 VBE D1 VBE
VB D2 VB
R2 IE RE R2 IE RE

Fig. 4.90: compensated Fig. 4.91: and compensated

voltage divider bias. voltage divider bias.

As shown in Fig. 4.91, we can adopt both and compensation using two diodes.

Voltage Divider Bias with Zener Diode:

The emitter voltage of a biasing circuit provides negative feedback to compensate any change
of the collector current . The compensation will work better if the base voltage remains
constant. In normal biasing circuit we try to do this, by flowing a very large current compared
to through the voltage divider network ( ). This can also be done by using a Zener
Chapter 4: BJT Biasing Circuits 120

diode. We have already known that a Zener can give

almost constant voltage. As shown in Fig.4.92, the VCC
base voltage of the transistor will be equal to the IC
R1 RC
Zener break down voltage, i.e., . In a Zener
IB
diode, for , the breakdown mechanism is
VCE
Zener breakdown, while for , the breakdown IZ VBE
process is avalanche breakdown. The Zener
VZ VB
breakdown has the negative temperature coefficient, IE RE
while the avalanche breakdown has positive
temperature coefficient. Hence, if ,
will decreases with increase in temperature as does
. So, the Zener diode will provide thermal Fig. 4.92: Voltage divider bias
stabilization as the circuit in Fig.4.90. using Zener diode.

4.26 Multiple BJT Circuits

So far we have discussed different circuits with only a single transistor (BJT). In electronics,
there used some circuits with more than one transistor. Some of the common circuits are
multistage amplifier, cascode amplifier, Darlington pair, feedback pair, etc. Among these,
multistage amplifier will be discussed later in another chapter and other amplifiers are
discussed here.

Cascode Amplifier

Cascode amplifier is a two-stage amplifier that consists of a common-emitter amplifier and a

common-base amplifier. As shown in Fig.4.93, the input signal is applied to the common-
emitter amplifier that drives the common-base amplifier. The output is taken from the
common-base amplifier. The main advantages of this amplifier is higher input impedance and
higher output impedance. It also provides better isolation between the input and output. As
there is no coupling between the input and output (by inter-electrode capacitance and
resistance), it eliminates Miller effect (will be discussed later). Thus the cascode amplifier
provides higher bandwidth.

Operation

The input signal is applied to the base of C-E amplifier through coupling capacitor and the
output is taken from the C-B amplifier through another capacitor . The base of the C-B
amplifier is connected to ground by . As for the AC signal all the capacitors behave like a
short circuit, the base of C-B amplifier can be considered connected to ground. Now due to the
input AC signal, the collector voltage of the C-E amplifier will change which will also be applied
to the emitter of the C-B amplifier. The common-base amplifier will again amplifies this signal
to the collector and the load will get this amplified signal.
Chapter 4: BJT Biasing Circuits 121

VCC VCC
IC2 RC IC2 RC
R1 C2 R1

C3 IB2 IB2
Q2 VCE2 RL VO Q2 VCE2
VB2
VBE2 VBE2
R2 R2
C1 IB1 IB1
Q1 VCE1 Q1 VCE1
VB1
VBE1 VBE1
Vin R3 R3
IE1 RE CE Loop 1 IE1 RE Loop 2

(a) (b)

Fig. 4.93 (a): Cascode amplifier, (b) DC equivalent circuit (with loops for KVL).

DC Analysis

The DC equivalent circuit of this amplifier can be drawn considering all the capacitors open
which is shown in Fig.4.93. To simplify the analysis we will assume that the values of of the
transistors are very high. So and will be very small and will be neglected. Alternately, if
the current flowing through the voltage divider network is quite larger than the transistors
base currents, then also and can be neglected. Using voltage divider rule, the values of
base voltages will be,

As and are neglected,

Now applying KVL to B-E loop [loop 1 in Fig. 4.93(b)] of transistor ,

From the previous assumption, we can write

Chapter 4: BJT Biasing Circuits 122

Again we can apply KVL starting from up to ground [loop 2 in Fig. 4.(b)] as,

Once is known, can be calculated as,

If a split power supply is used, i.e., instead of ground if – is connected to the emitter of ,
we have to add with as,

Darlington Pair

To drive an output load, sometimes it is required to amplify an input current to a high output
current. In that case, CC amplifiers are used with a transistor with higher current capacity, i.e.,
very high value of . But one problem is, a transistor with high current capacity has very
low current gain (as described in section 4.22). This problem can be overcome by cascading a
low power transistor ( ) with a high power transistor ( as shown in Fig. 4.94 (sometimes
identical transistors are used). The arrangement is called Darlington pair. As shown in the
figure, the collectors of two transistors are connected together, that work as the collector of
the combination ( . The emitter of is connected to the base of . The base of the first
transistor and the emitter of the second transistor are the base ( ) and the emitter ( ) of the
Darlington pair, respectively. Darlington pair can be constructed by connecting two transistors
or it is available as a single package. For example, TIP120 is a single package that contains a
Darlington pair.
Chapter 4: BJT Biasing Circuits 123

Now assuming proper biasing of the configuration, we will determine the overall current gain
of the combination. Let us consider that a certain amount of current ( ) is flowing through the
base of , i.e., through . If the current gain of the first transistor is and that of the second
transistor is , the value of and will be,

C
From the circuit it is clear that . The IC IC1 + IC2
collector current of will be
IB1 = IB IC1
B Q1 IC2
VBE1 IE1 IC2
Now the total current flowing through terminal is IC2 Q2
I
IB2 C2
. That is, VBE2
IE2 = IE
(a) IC2
E
IC2 C
IC

IB 1
Q1 2 D =12
B +1+2
Q2
VBED

IE
Now if we consider the whole combination as a
(b) E
single transistor, its three terminal currents will be
, and as shown in Fig. 4.94(b). Thus, the
current gain of the combination ( ) will be, Fig. 4.94: Darlington pair.

As , generally we write .

To calculate the emitter current of the combination ( ), we can write

Putting the value of , we get

Chapter 4: BJT Biasing Circuits 124

Generally, will be a low power transistor, but its maximum collector current capacity should
be sufficient to drive , i.e., . The drawbacks of this configuration is
the higher base-emitter voltage, that is now, . Another disadvantage is
that the saturation voltage. If a single
transistor has a saturation voltage of 0.2 V, the VCC
Darlington pair has a saturation voltage of
0.7V. I C C
RB
The AC resistance seen at the emitter terminal IB 1
of this Darlington pair will, Q1  2 D
C1 B
Q2
RS
VBED C2
where, , and E
(at room temperature). If this Vin
IE RE RL VO
resistance is seen from base of the Darlington
pair, its value will be . As is
very small, we can write . Then,
. It can be prove that the total Fig. 4.95: Common collector amplifier
emitter resistance of the Darlington pair will using Darlington pair.
be, .

Although, Darlington pair can be used for any configuration, but it is most commonly used as a
common collector amplifier as shown in Fig.4.95 for power amplification or impedance
matching. This circuit is exactly same as that of Fig. 4.67(d), except the Darligton pair. So the
equations derived for that circuit can be used here by replacing and by and . The
required expressions for DC analysis of this circuit will as follows:

Example 4.29
Chapter 4: BJT Biasing Circuits 125

Design a common-collector amplifier using a Darlington pair for and .

Assume the supply voltage is 24 V.

Solution:

As the quiescent current , maximum current may be as high as . So must be

a power transistor with . Let us use a transistor MJE105 with .
The maximum base current of this transistor will be . Thus the
maximum collector current of should be . KSC1815YTA is 150 mA
transistor with . Using these two transistors the current gain of the Darlington pair
will be

Using Equ.(4.105)

Results:

Comments: This amplifier can be used as a power amplifier, e.g., to drive an loud speaker.

Feedback Pair

Feedback pair is also known as a Sziklai pair according to George C. Sziklai who popularized the
configuration. It is also called the complementary feedback pair or complementary Darlington
pair. The arrangement is same as the Darlington pair, but here an NPN transistor and a PNP
transistor are used as shown in Fig.4.96. Interchanging the position of the PNP and the NPN
transistor, feedback pair can be constructed in two configurations as shown in Fig.4.96(a) and
Chapter 4: BJT Biasing Circuits 126

Fig.4.96(b). Here the collector of the first transistor drives the base of the second transistor.
Though Darlington pair is available in a single package, Sziklai pair is not. This arrangement has
the same advantage of high current gain. Fir the circuit of Fig.4.96(a), and for
that of Fig.4.96(b) . It has one important difference from the Darlington
pair. The value of of a feedback pair is just half of that Darlington pair. For Si transistor
Darlington pair , but for a feedback pair its value ( ) is , same as a single
transistor. The saturation voltage is also higher than a single transistor ( ) Biasing of the
circuit of Fig.4.96(a) will be same as the Darlington pair. But the input side of the feedback pair

C C
IC = IE2 IC IE1 + IC2
VBE2
VBE1 IE1
Q2  2 IC2
IC1 = IB2 B Q1  1
IB1 = IB
IC2 IB1 = IB IC2
B Q1  1 IC2 IC1= IB2
Q2  2
VBE1 IE1 IC2
IC2 VBE2
IC2 IE = IE1+ IE2 IE2 = IE
IC2 IC2
(a) (b)
E E
IC2
Fig. 4.96: Common collector amplifier using Sziklai pair.

of Fig.4.96(b) has to be biased as a PNP transistor, i.e., low input voltage to turn the pair ON. It
is shown in Fig. 4.97. The base resistor is connected to ground instead of . The analysis
procedure is same as Darlington pair, except .
Chapter 4: BJT Biasing Circuits 127

VCC
IC
C
VBES

B 1
Q1  2 S
C1 IB
Q1
RS
C2
RB E
Vin
IE RE RL VO

Fig. 4.97: Feedback pair of Sziklai pair.