On-Time Compensation Method for CRM/DCM Boost

PFC Converter
Yang-Lin Chen Yaow-Ming Chen Hong-Jyun Chen
Electric Energy Processing Laboratory (EEPro)
Department of Electrical Engineering
National Taiwan University, Taipei, Taiwan
F9992 102 [email protected]

Abstract-This paper proposes an on-time compensation method However, the ZVS/vS will cause current distortion which
for CRMIDCM Boost PFC converter, which is based on the will increase input current harmonic and reduce power factor
average current control without using multiplier. The proposed [6]-[8]. Many compensation methods were proposed to
method can compensate the input current distortion caused by compensate the input current distortion caused by ZVS/VS
zero voltage switching (ZVS), valley switching (VS) and [8]-[ 1 1].
switching frequency limitation (SFL). A low-cost sample and
hold (S/H) circuit is used to replace the multiplier in the average On the other hand, the inherent variable switching
current control loop. By SIMPLIS simulation, a 160W frequency characteristic of CRM operation will produce large
CRMIDCM boost PFC converter with ZVS/VS and SFL switching losses in high frequency region. The switching
function is used to verify the feasibility of the proposed on-time frequency limitation (SFL) function is always needed to
compensation method. Finally, heavy/light load and high/low reduce the high frequency switching losses. A boost PFC
line voltage conditions will also be presented in this paper. converter with ZVS/vS and SFL can achieve the highest
efficiency but also generate large total harmonic distortion
I. INTRODUCTION (THD) currents. Many methods had been proposed to
The need of DC power source has been increased rapidly compensate input current distortion [8]-[ 10]. Unfortunately,
because of the fast-developing cloud computing devices. they cannot be applied to the boost PFC converter with
Usually, the AC-DC rectifier converts the AC source from the ZVS/vS and SFL simultaneously.
grid line into the demanded DC form. In order to maintain In this paper, an average current control on-time
high power quality, the function of power factor correction compensation method is proposed for boost PFC converter to
(PFC) is demanded for the AC-DC rectifier. Conventionally, achieve ZVS/vS and SFL, simultaneously. It can achieve low
the AC-DC rectifier with PFC function is also named as a PFC input current THD while maintaining high efficiency.
converter. Conventionally, average current control needs a multiplier to
For the purpose to maintain high power factor, the boost generate a rectified sinusoidal reference signal for input
converter is usually adopted to implement the PFC converter current shaping. In this paper, a sample and hold (SIH) method
[ 1]-[5]. Usually, the DC output voltage should be regulated to is proposed for replacing the multiplier in order to simplify the
different levels for different applications. Therefore, two circuit and to reduce the cost.
power stages are needed for the PFC converter to maintain Finally, simulation results will be presented to verify the
high power factor and desired regulated output voltage. performance of the proposed control method. The ZVS/VS
Because of the two-stage circuit topology, how to maintain and SFL function with low input current THD can be achieved.
high converter efficiency becomes an important issue.
II. A VERAGE CURRENT CONTROL ON-TIME
Different soft switching techniques, such as zero current
COMPENSATION METHOD
switching (ZCS) or zero voltage switching (ZVS), are
commonly used to increase the converter efficiency. When Figure 1 shows a conventional constant on-time boost PFC
boost type PFC converter is operated in critical mode (CRM) boost converter with ZVS/vS and SFL functions. The impact
or discontinuous conduction mode (DCM), the ZCS is of ZVS/vS and SFL can be found in [7]. The inductor current
naturally achieved on the diode of boost converter. On the IL and parasitic capacitor voltage V Cds waveforms are shown
other hand, the high turn-off voltage across the MOSFET in Fig. 2. When 2Vin <:: Vout, the boost PFC converter is
parasitic capacitor will produce high switching losses and operated in ZVS, as shown in Fig. 2(a). When 2Vin > V out, it is
reduce the converter efficiency. Therefore, the ZVS or valley operated in VS, as shown in Fig. 2(b). On the other hand,
switching (VS) are commonly used to reduce the switching when the ZVS/vS and SFL functions are applied to the boost
losses of the MOSFET.

978- 1-4673-4355-81 13/$3 1.00 ©20 13 IEEE 3096

PFC converter, simultaneously, its inductor current waveform extended as inductor current waveform I L shown in Fig. 3.
will be distorted, as shown in Fig. 3. Eventually, the average current will be reduced suddenly.
The distorted current shown in Fig. 4 can be compensated
by adjusting the on-time of the gate signal to increase its
average current. The concept of on-time compensation method
based on the average current control [ 12]-[ 14] is shown in Fig.
+
5. It reveals that the on-time will be extended from Ton to Ton '
V in
when the average inductor current IL.avg and reference current
Iref are different. The increased average inductor current IL.av '
g
caused by the extended on-time can be equal to the reference
current lref'
The block diagram of control method is shown in Fig. 6.
The amplified output voltage error and the rectified input
voltage are sent to the multiplier to generate the reference
current lref' The waveform of reference current generated by
Fig. I. Conventional constant on-time boost PFC boost converter with
ZVSIVS and SFL functions.
multiplier during a half cycle of ac mains are shown in Fig. 7.
This reference current is compared with the feed-back average
current in each cycle to produce the extended on-time
information to compensate the current distortion.

a. 2Vin <:: Vout, ZVS

Fig. 2. Inductor current and parasitic capacitor voltage waveforms with

ZVS or VS function.

a. With ZVSIVS

OFF ...... . ...... ...... .

T.. .
�......... .....+::�............
Ton . Ton
.....� ......... ........�
:
T min 1 r IN, T min T min

Fig. 3. Inductor current waveform with ZVSIVS and SFL functions.

The filtered input current waveforms with ZVS/VS and b. With ZVSIVS and SFL
SFL are shown in Fig. 4(a) and (b) with comparison to a pure
Fig. 4. Filtered input current waveform with ZVSIVS and SFL
sinusoidal waveform. In Fig. 4(a), during the 2Vin:S YOU! functions compared to pure sinusoidal waveform.
region, the boost PFC converter is under ZVS operation as
typical waveforms shown in Fig. 2(a). Because of the partial
. .. ..To; :
negative current, the amplitude of average input current is less
. ... ..';j
than the desired one. On the other hand, during the 2Vin > yOU!
region, the boost PFC converter is under VS operation as " :\,
,
typical waveforms shown in Fig. 2(b). The negative portion is ,
,
'
less than the one in ZVS operation. Therefore, the current ---:f-+-' ' ---- lL.avg = lref
t---'t
amplitude is closer than the desired one. +-+-+---,PI: --.'="-- IL."g
.........
In Fig. 4(b), the boost PFC converter has ZVS/vS and Ton '.'

SFL function simultaneously. The amplitude of average input

Fig. 5. The concept of on-time compensation method based on the
current waveform is less than the desired one as Fig. 4(a). The
average current control.
abrupt current drop in Fig. 4(b) is caused by the SFL function.
In order to maintain ZVS/vS, the switching cycle will be

3097
 Iref . The waveform of reference current generated by the
Vref improved S/H method during a half cycle of ac mains are
shown in Fig. 1 1. This reference current is better than Fig. 8
klV;ol
MUltiplie�
�
M
and almost equal to Fig. 7.
� E/�Vo",

M+ lrefJ By comparing Fig. 7 with Fig. 11, it can be verified that

the proposed SIB method can be used to replace the multiplier
lin r---: I Con;;\l JUlJL
----- Switching
to generate the reference current.
Circuit�
Filter
V,oOl<o1 Signa I
--:--1
The block diagram of improved S/H method is shown in
h
Fig. 6. T e block diagram of on-time compensation method with
Fig. 12. In which, the reference current generated by the
multiplier. proposed method can be used to replace the multiplier in Fig.
6 to do the on-time compensation. The overall block diagram
of the proposed control method is shown in Fig. 13.
I /-
_I � Sample signal
I- --

/' (T rigger @ Ton/2 )

/1 �
/ II '\.
/ \.
/ I
�. I -- . \.
-
Fig. 8. The block diagram of proposed S/H method.

Fig. 7. Waveform of reference current produced by multiplier.

.......
IlT. THE PROPOSED CONTROL METHOD I /
! / "'"
Because of the disadvantages of multiplier such as high
I (
I
- -
cost, circuit complexity and bandwidth limitation, the sample
and hold (S/H) method is proposed in this paper to replace the
II 1\ -
1 \
multiplier. Ideally, the peak value IL peak (t) of inductor current /1 \
,
\
in boost PFC converter operated in CRM can be expressed as
( 1) while the average inductor current IL,avg (t) is shown in (2). - -J � ."---
In which, Yin sin (wt) is the utility voltage, L is the boost Fig. 9. Wavefonn of reference current produced by proposed S/H
inductance and Ton is the on-time of the gate signal. method.

IVinsin(wt)1
IL,peak (t) T on (1)
L

IIVinsin (wt)1
I L,avg (t) Ton (2)
2 L
Ideal average inductor current IL,avg (t) is proportional to
the rectified sinusoidal waveform. This equation reveals that
the middle point of inductor current is the information of ideal
input current. This information can be used as reference
current Iref. Therefore, the proposed S/H method is used to
catch the inductor current information as the reference current.
The block diagram of proposed control method is shown in
Fig. 10. The waveform of S/H trigger signal and the caught values.
Fig. 8.
However, because of the ZVS/vS function will cause the
,
negative inductor current. If the proposed method only catches
/ .......
the middle point of inductor current in every switching cycle,
/
the reference current will distort as Fig. 9. This waveform of
reference current is worse than Fig. 7. Therefore, the improved / � r-

S/H method is used to obtain a better reference current to do "-

the current compensation.
/
/ -\-

As the Fig. 10, two values, S/H I and S/H 2, of inductor \.

current with ZVS/vS function are caught. Two S/H devices
are triggered in different timing to catch these two values. The Fig. I I . Waveform of reference current produced by improved S/H
difference between these two values is the reference current method.

3098
 S/J I 2 Trigger signal Sill I Trigger signal
In Fig. 17, the THD is measured from low line voltage to
high line voltage while the output power is kept at 160W.
Because of the switching frequency limitation is 12S kHz, the
THD for 220V rms input voltage is much larger than other
conditions. In other conditions, the input current is almost not
affected by the SFL function. However, the compensated input
current has lower THD even the input current is not affected
by the SFL function in low line voltage. This figure reveals
that the compensated input current also has better performance
under different line voltage conditions.
These simulation results show that the proposed on-time
Fig. 12. The block diagram of improved S/H method. compensation method for CRM/DCM boost converter can
achieve the desired performance with desired ZVSIVS and
SFL functions.
IV . SIMULATION RESULTS
VOll!
To verify the performance of the proposed compensation
+
method, the electric circuit simulation software SIMPLIS is
used to simulate a 160W boost PFC converter with ZVSIVS �T v";
Ic� L I
and SFL functions. The specifications of the simulated
prototype circuit are listed in Table 1.
n (
Iggcr@ToN/2�
T '2
On-Tllnc
'----,
Generator TON
TABLE I. THE SPECIFICATIONS OF THE SIMULATED PROTOTYPE
CIRCUIT

Input voltage: Vin=220Vnns 60Hz Output voltage: Vout=400V

s
Input filter: Lin=3.3mH, Cin=220nF Output power: Pout=160W
� �
Parasitic capacitor: Cds+Cd=ISOpF Boost inductor: L=400flH
S/I-I I �<§.
GenCfalOr
Ir�r
Switching frequency limitation: fS,max=12SkHz -
::.l

!Y\+ I.f
The filtered input current waveforms with ZVS/VS and r�I U EtA O ��:�lC G
Il.
a"g � VCOOI�( Generator It:.TON
F ilter 1-. +
Swit
SFL function during a half cycle of ac mains are shown in Fig.
14. Figure 14(a) is the current waveform without on-time
Fig. 13. The overall block diagram of on-time compensation method
compensation while Fig. 14(b) is the one with on-time
with improved method.
compensation. The input current waveform without
compensation shown in Figure 14(a) has the abrupt current -
drop as shown in Fig. 4(b). It is caused by the ZVSIVS and
v '"
SFL functions. However, the compensated input current '"
waveform, as shown in Fig. 14(b), has no any current drop ( '\
phenomenon even though it also has the ZYSIVS and SFL
functions. These two figures can be verified that the proposed ) \
on-time compensation method based on the average current / "I
control has the ability to compensate the distorted input
current. / I""
The spectrums of these two currents are shown in Fig. IS. / ""
The current waveform with ZVSIVS and SFL functions but a. Without compensation
d
without compensation has large 3r and Sth harmonics.
However, the compensated current waveform has lower 3
rd
/' - .......
r-...
and Sth harmonics even it has the ZVSIVS and SFL functions.
/ ""
- -'\'\ --
This figure reveals that the line current can meet the standard
of lEC6 1000-3-2 when the proposed on-time compensation --t ! I-' -I-'
/
method is used.
The measured THD of input current under different loads I
I
and line voltages without and with the proposed compensation I \\
method are shown in Fig. 16 and Fig. 17. In Fig. 16, the THD
is measured from light load to heavy load while the input !
voltage is 220Vr ms' This figure reveals that the compensated b. With compensation
input current always has better performance than the Fig. 14. The filtered input current waveform with ZVSNS and SFL
uncompensated one in different load conditions. functions.

3099
 results verify the performance of the proposed on-time
.Fig.I4(.) .Fig.l4(b)
compensation method in different load and different line
16.00%
voltage conditions. With the propose on-time compensation
14.00%
method the input current THD can be reduced successfully.
12.000/0

10.00%

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6.00'10
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/--
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.00%
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operation principles of the proposed on-time compensation
method are presented. With the proposed SIH method, simple
and low cost circuit can be achieved. SIMPLlS simulation

3100