Module - 4

MEMORY SYSTEM

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Basic Concepts

 The maximum size of the memory that can be used in any computer is
determined by the addressing scheme.
 For example, a computer that generate 16-bit addresses is capable of
addressing up to 216 = 64K memory locations.
 Machines whose instructions generate 32-bit addresses can utilize a
memory that contains up to 232 = 4G (giga) locations.
 The number of locations represents the size of the address space of the
computer.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Most modern computers are byte-addressable.
 The memory is usually designed to store and retrieve data in word-length
quantities.
 Data transfer between the memory and the processor takes place through the
use of two processor registers, usually called MAR (memory address
register) and MDR (memory data register).

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 If MAR is k bits long and MDR is n bits long, then the memory unit may contain
up to 2k addressable locations.
 During a memory cycle, n bits of data are transferred between the memory and the
processor.
 This transfer takes place over the processor bus, which has k address lines and
n data lines.
 The bus also includes the control lines like Read/Write and Memory Function
Completed (MFC) for coordinating data transfers.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

The connection between the processor and the memory is shown in Figure 5.1

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Read

 The processor reads data from the memory by loading the address of the
required memory location into the MAR register
 R/W line is set to 1.
 The memory responds by placing the data from the addressed location onto the data
lines, and confirms this action by asserting the MFC signal.
 Upon receipt of the MFC signal, the processor loads the data on the data lines into the
MDR register.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Write

 The processor writes data into a memory location by loading the address of this
location into MAR and loading the data into MDR.
 R/W line is set to 0.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Measures for the speed of a memory:
 Memory access time - time that elapses between the initiation of an
operation and the completion of that operation
 Memory cycle time - minimum time delay required between the
initiation of two successive memory operations,

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 A memory unit is called random-access memory (RAM) if any location can be
accessed for a Read or Write operation in some fixed amount of time that is
independent of the location's address.

 RAM is used to store working data & machine instructions.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 The processor of a computer can usually process instructions and data
faster than they can be fetched from a reasonably priced memory unit.
 One way to reduce the memory access time is to use a cache memory.
 This is a small, fast memory that is inserted between the larger, slower main
memory and the processor.
 It holds the currently active segments of a program and their data.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 An important design issue is to provide a computer system with as
large and fast a memory as possible, within a given cost target.
 Several techniques to increase the effective size and speed of the
memory.
 Cache memory - increases the effective speed
 Virtual memory - increases the effective size

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Cache memory
 This is a small, fast memory that is inserted between the larger, slower main memory
and the processor.
 It holds the currently active segments of a program and their data.
 Reduces memory access time

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Virtual memory
 Data is stored in physical memory locations that have addresses different from those specified by the
program.
 An address generated by the processor is referred to as a virtual or logical address.
 The virtual address space is mapped onto the physical memory where data are actually stored.
 The mapping function is implemented by a special memory control circuit, often called the
memory management unit.
 Virtual memory is used to increase the apparent size of the physical memory.
 Data are addressed in a virtual address space that can be as large as the addressing capability of the
processor.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Semiconductor RAM
Memories

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Semiconductor memories are available in a wide range of speeds.

 Their cycle times range from 100 ns to less than 10 ns.

 When first introduced in the late 1960s.

 Because of rapid advances in VLSI (Very Large Scale Integration) technology, the cost
of semiconductor memories has dropped dramatically.

 As a result, they are now used almost exclusively implementing memories.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Internal Organization of Memory Chips

 Each memory cell can hold one bit of information.

 Memory cells are organized in the form of an array.
 One row is one memory word.
 All cells of a row are connected to a common line, known as the word line.
 Word line is connected to the address decoder.
 The cells in each column are connected to a Sense/Write circuit by two
bit lines.
 The Sense/Write circuits are connected to the data input/output lines of the
chip.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Figure 5.2 is an example of a very small memory circuit consisting of 16 words
of 8 bits each.
 This is referred to as a 16 × 8 organization.
 The data input and the data output of each Sense/Write circuit are connected
to a single bidirectional data line that can be connected to the data lines of
a computer.
 Two control lines, R/W and CS, are provided.
⚫ The R/W (Read/Write ) input specifies the required operation, and the CS (Chip
Select) input selects a given chip in a multichip memory system.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 The memory circuit in Figure 5.2 stores 128 bits and requires 14 external connections
for address, data, and control lines.
⚫ It also needs two lines for power supply and ground connections.

 If the circuit has 1K (1024) memory cells, this circuit can be organized as a 128 × 8
memory, requiring a total of 19 external connections.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Figure 5.3 shows such an organization of 10-bit address for 1K memory
chip
 The required 10-bit address is divided into two groups of 5 bits each to
form the row and column addresses for the cell array.
 Only one data line
 One group to form row address, other group to form column address for
the cell array

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Commercially available memory chips contain a much larger number of
memory cells than the examples shown in Figures 5.2 and 5.3

 Large chips have essentially the same organization as Figure 5.3, but
use a larger memory cell array and have more external connections.

 For example, a 1G-bit chip may have a 256M × 4 organization, in which

case a 28-bit address is needed and 4 bits are transferred to or from the
chip.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Static Memories

⚫ Memories that consist of circuits capable of retaining their state as

long as power is applied are known as static memories.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 SRAM Cell

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Figure 5.4 illustrates how a static RAM (SRAM) cell may be implemented.
 Two inverters are cross-connected to form a latch.
 The latch is connected to two bit lines by transistors T1 and T2.
 These transistors act as switches that can be opened or closed under control of the word
line.
 When the word line is at ground level, the transistors are turned off and the latch retains
its state.
 For example, if the logic value at point X is 1 and at point Y is 0, this state is maintained
as long as the signal on the word line is at ground level.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Read operation:
 In order to read the state of SRAM Cell, the word line is activated to close
switches T1 and T2.
 If the cell is in state 1, the signal on bit line is high and the signal on bit
line 𝑏 ′ is low.
 The opposite is true if the cell is in state 0.
 Thus, 𝑏 and 𝑏 ′ are always complements of each other.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Write operation:
 The Sense/Write circuit drives bit lines 𝑏 and 𝑏 ′, instead of sensing
their state.
 It places the appropriate value on bit line b and its complement on
𝑏 ′ and activates the word line.
 This forces the cell into the corresponding state, which the cell retains
when the word line is deactivated.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CMOS Cell

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CMOS Inverter

Gnd

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 CMOS Cell

 A CMOS realization of the cell in Figure 5.4 isgiven in Figure 5.5.

 Transistor pairs (T3, T5) and (T4, T6) form the inverters in the latch.
 For example, in state 1, the voltage at point X is maintained high by having
transistors T3 and T6 on, while T4 and T5 are off.
 If T1 and T2 are turned on, bit lines 𝑏 and 𝑏 ′ w i l l have high and low signals,
respectively.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 SRAMs are said to be volatile memories because their contents are lost when power is
interrupted.
 Advantage of CMOS SRAMs is their very low power consumption, because current
flows in the cell only when the cell is being accessed.
 Static RAMs can be accessed very quickly.
 Access times on the order of a few nanoseconds

SRAMs are used in applications where speed is of critical concern.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 SRAMs vs. DRAMs

 Static RAMs (SRAMs):

 Consist of circuits that are capable of retaining their state as long as the power is applied.
 Volatile memories, because their contents are lost when power is interrupted.
 Access times of static RAMs are in the range of few nanoseconds.
 However, the cost is usually high.
 Dynamic RAMs (DRAMs):
 Do not retain their state indefinitely.
 Contents must be periodically refreshed.
 Contents may be refreshed while accessing them for reading.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Asynchronous DRAMs

 Information is stored in a dynamic memory cell in the form of a charge in a capacitor

 This charge can be maintained for only tens of milliseconds.
 Since the cell is required to store information for a much longer time, its contents
must be periodically refreshed by restoring the capacitor charge to its full value.
 This occurs when the contents of the cell are read or when new information is written into it.
 An example of a dynamic memory cell that consists of a capacitor, C, and a transistor,
T, is shown in Figure 5.6.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Asynchronous DRAMs..

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Asynchronous DRAMs..

 To store information in this cell, transistor T is turned on and an appropriate

voltage is applied to the bit line.
⚫ This causes a known amount of charge to be stored in the capacitor.
 After the transistor is turned off, the capacitor begins to discharge.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Asynchronous DRAMs..

 A 16-Megabit DRAM chip, configured as 2M × 8, is shown in Figure 5.7.

 The cells are organized in the form of a 4K x 4K array.
 The 4096 cells in each row are divided into 512 groups of 8.
⚫ A row can store 512 bytes of data.
 12 address bits are needed to select a row.
 Another 9 bits are needed to specify a group of 8 bits in the selected row.
 Thus, a 21-bit address is needed to access a byte in this memory.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 1 2 3 4 5 6 7 8 ……………..........4096

2
3
4
5
6
7
8
.
.
4096

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Asynchronous DRAMs..

 The high-order 12 bits constitute the row address and the low-order 9 bits of the address
constitute column address of a byte.
 To reduce the number of pins needed for external connections, the row and column
addresses are multiplexed on 12 pins.
 During a Read or a Write operation, the row address is applied first.
 It is loaded into the row address latch in response to a signal pulse on the Row Address
Strobe (RAS) input of the chip.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Asynchronous DRAMs..

 In computer memory technology, RAS (row address strobe) is a signal sent to a dynamic
random access memory (DRAM) that tells it that an associated address is a row address.

 Column address strobe is a signal sent to a dynamic random access memory (DRAM) that tells it that
an associated address is a column address.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Read-Only Memories
(ROMs)

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Read-Only Memories - Introduction

 Both SRAM and DRAM chips are volatile:

 Lose the contents when the power is turned off.
 Many applications need memory devices to retain the stored information
if power is turned off.
 For example, computer is turned on, the operating system must be loaded from the disk into
the memory.
 This requires execution of a program that "boots" the operating system.
 Need to store these instructions so that they will not be lost after the power is turned off.
 We need to store the instructions into a nonvolatile memory.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Read-Only Memories – Introduction..

 Nonvolatile memory is used extensively in embedded systems.

 Such systems typically do not use disk storage devices.
 Their programs are stored in nonvolatile semiconductor memory devices.
 Non-volatile memory is read in the same manner as volatile memory.
 Normal operation involves only reading of data, this type of memory is called Read-
Only memory (ROM).

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Figure 5.12 shows a possible configuration for a ROM cell.
 A logic value 0 is stored in the cell if the transistor is connected to ground at point
P; otherwise, a 1 is stored.
 To read the state of the cell, the word line is activated.
 Thus, the transistor switch is closed and the voltage on the bit line drops to near zero if
there is a connection between the transistor and ground.
 If there is no connection to ground, the bit line remains at the high voltage, indicating a 1.
 A sense circuit at the end of the bit line generates the proper output value.
 Data are written into a ROM when it is manufactured.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Programmable Read-Only Memory
(PROM)

 Allows the data to be loaded by a user.

 Programmability is achieved by inserting a fuse at point P in Figure 5.12.
 Before it is programmed, the memory contains all 0s.
 The user can insert 1s at the required locations by burning out the fuses at these locations
 This process is irreversible.
 PROMs provide flexibility and convenience.
 PROMs provide a faster and less expensive approach because they can be
programmed directly by the user.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Erasable Programmable Read- Only Memory
(EPROM)

 Allows the stored data to be erased and new data to beloaded.

 It provides considerable flexibility during the development phase of
digital systems.
 They can be used in place of ROMs while software is being developed.
 Memory changes and updates can be easily made.
 An EPROM cell has a structure similar to the ROM cell in Figure 5.12.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Advantage
 Their contents can be erased and reprogrammed.
 Erasure is done by exposing the chip to ultraviolet (UV) light.
 EPROM chips are mounted in packages that have transparent windows.
 Disadvantage
 Chip must be physically removed from the circuit for reprogramming and that
its entire contents are erased by the ultraviolet light.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Electrically Erasable Programmable Read-
Only Memory (EEPROM)

 They can be both programmed and erased electrically.

 They do not have to be removed for erasure.
 It is possible to erase the cell contents selectively.
 The only disadvantage of EEPROMs is that different voltages are needed
for erasing, writing, and reading the stored data.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Flash Memory
 A flash cell is based on a single transistor controlled by trapped charge, just like an
EEPROM cell.
 In a flash device, it is possible to read the contents of a single cell, but it is only possible to
write an entire block of cells.
 Flash devices have greater density, which leads to higher capacity and a lower cost
per bit.
 They require a single power supply voltage, and
consume less power in their operation.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Flash Memory..

 Single flash chips do not provide sufficient storage capacity for the
applications.
 Larger memory modules consisting of a number of chips are needed.
 There are two popular choices for the implementation of larger memory
modules
 Flash cards
 Flash drives

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Flash chips are mounted on a small card.
 Such flash cards have a standard interface that makes them usable in a variety of
products.
 A card is simply plugged into a conveniently accessible slot.
 Flash cards come in a variety of memory sizes.
 A minute of music can be stored in about 1 Mbyte of memory, using the MP3 encoding
format.
 Hence, a 64-MB flash card can store an hour of
music.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Flash Drives

 Flash drives are designed to fully emulate the hard disks.

 The storage capacity of flash drives is significantly lower.
 Advantages
 Flash drives are solid state electronic devices.
 They have shorter seek and access times, which results in faster response.
 They have lower power consumption, which makes them attractive for battery driven
applications, and they are also insensitive to vibration.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Flash Drives..

 Disadvantages
 Smaller capacity and higher cost per bit, compared to hard disk drives.
 Flash memory will deteriorate after it bas been written a number of times (Typically
one million times).

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Memory Hierarchy

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Cache Memories

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Cache Memories

 Processor is much faster than the main memory.

 As a result, the processor has to spend much of its time waiting while instructions
and data are being fetched from the main memory.
 Major obstacle towards achieving good performance.
 Speed of the main memory cannot be increased beyond a certain point.
 Cache memory is an architectural arrangement which makes the main memory
appear faster to the processor than it really is.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Locality of Reference
 Analysis of programs shows that most of their execution time is spent on
routines in which many instructions are executed repeatedly.
 These instructions may constitute a simple loop, nested loops, or a few procedures
that repeatedly call each other.
 This is called “locality of reference”.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Locality of Reference..
 Temporal locality of reference
 Recently executed instruction is likely to be executed again very soon.
 Spatial locality of reference
 Instructions with addresses close to a recently executed instruction are
likely to be executed soon.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Operation of Cache Memories

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Operation of Cache Memories..
 Processor issues a Read request, a block of words is transferred from the main
memory to the cache, one word at a time.

 At any given time, only some blocks in the main memory are held in the cache.

 When the cache is full, and a block of words needs to be transferred from the main
memory, some block of words in the cache must be replaced.
 This is determined by a “replacement algorithm”.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Cache Hit

 The processor does not need to know explicitly about the existence of the cache.
 It simply issues Read and Write requests using addresses that refer to
locations in the memory.
 The cache control circuitry determines whether the requested word currently exists in the
cache.
 If it does, the Read or Write operation is performed on the appropriate cache location.
 In this case, a read hit or write hit is said to have occurred.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Cache Miss
 When the addressed word in a Read operation is not in the cache, a read miss
occurs.
 The block of words that contains the requested word is copied from the main
memory into the cache.
 After the entire block is loaded into the cache, the particular word requested is
forwarded to the processor.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Virtual Memories

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Virtual Memories

 Recall that an important challenge in the design of acomputer system is to provide a

large, fast memory system at an affordable cost.
 Architectural solutions to increase the effective speed and size of the memory
system.
 Cache memories were developed to increase the effective speed of the memory
system.
 Virtual memory is an architectural solution to increase the effective size of the
memory system.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Virtual Memories..

 In most modern computer systems, the physical main memory is not as large as the
address space spanned by an address issued by the processor.
⚫ For example, a processor that issues 32-bit addresses has an addressable space of 4G bytes.
 The size of the main memory in a typical computer ranges from a few hundred
megabytes to G bytes.
 When a program does not completely fit into the main memory, the parts of it not
currently being executed are stored on secondary storage devices, such as magnetic
disks.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Virtual Memories..
 All parts of a program that are eventually executed are first brought into the main
memory.

 In modern computers, the operating system moves programs and data automatically
between the main memory and secondary storage.

 Thus, the application programmer does not need to be aware of limitations imposed by
the available main memory.

 Techniques that automatically move program and data blocks into the physical main
memory when they are required for execution are called virtual-memory techniques.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Virtual Memories..

 The binary addresses that the processor issues for either instructions or data
are called virtual or logical addresses.
 These addresses are translated into physical addresses by a combination of
hardware and software components.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Virtual Memories..

 If the referenced address is not in the main memory, its contents must be
brought into a suitable location in the memory before they can be used.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Virtual Memories..
 Figure 5.26 shows a typical organization that implements virtual memory.
 A special hardware unit, called the Memory Management Unit (MMU),
translates virtual addresses into physical addresses.
 When the desired data (or instructions) are in the main memory, these data are
fetched.
 If the data are not in the main memory, the MMU causes the operating system to
bring the data into the memory from the disk.
 Transfer of data between the disk and the main memory is performed using the
DMA scheme.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Secondary Storage

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Secondary Storage

 Semiconductor memories cannot be used to provide all of the storage

capability needed in computers.
⚫ Their main limitation is the cost per bit of stored information.
 Large storage requirements of most computer systems are
economically realized in the form of magnetic disks, optical disks,
and magnetic tapes, which are usually referred to as secondary
storage devices.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Magnetic Hard Disks

 The storage medium in a magnetic-disk system consists of one or more

disks mounted on a common spindle.
 A thin magnetic film is deposited on each disk, usually on both sides.
 The disks are placed in a rotary drive so that the magnetized surfaces move
in close proximity to read/write heads, as shown in Figure 5.29a.
 The disks rotate at a uniform speed.
 Each head consists of a magnetic yoke and a magnetizing coil, as
indicated in Figure 5.29b.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
 Magnetic Hard Disks..

 Digital information can be stored on the magnetic film by applying current

pulses of suitable polarity to the magnetizing coil.
 This causes the magnetization of the film in the area immediately underneath
the head to switch to a direction parallel to the applied field.
 The same head can be used for reading the stored information.
 The polarity of this voltage is monitored by the control circuitry to determine
the state of magnetization of the film.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Magnetic Hard Disks..
 Read/write heads must be maintained at a very small distance from the moving
disk surfaces in order to achieve high bit densities and reliable read/write
operations.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Magnetic Hard Disks..

 The disk system consists of three key parts.

 Disk Platters – usually referred to as the disk.
 Disk Drive – comprises the electromechanical mechanism that spins the disk and
moves the read/write heads.
 Disk Controller – the electronic circuitry that controls the operation of the system.
 The disk controller may be implemented as a separate module, or it may be incorporated into the
enclosure that contains the entire disk system.
 The term disk is often used to refer to the combined package of the disk drive
and the disk it contains.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Organization and Accessing of Data on a Disk

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 The organization of data on a disk is illustrated in Figure 5.30.
 Each surface is divided into concentric tracks, and each track is divided into sectors.
 The set of corresponding tracks on all surfaces of a stack of disks forms a logical
cylinder.
 The data on all tracks of a cylinder can be accessed without moving the
read/write heads.
 The data are accessed by specifying the surface number, the track number,
and the sector number.
 The Read and Write operations start at sector boundaries.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Data bits are stored serially on each track.
 Each sector usually contains 512 bytes of data, but other sizes may be used.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Figure 5.30 indicates that each track has the same number of sectors.
 So all tracks have the same storage capacity.
 Thus, the stored information is packed more densely on inner tracks than on
outer tracks.
 This arrangement is used in many disks because it simplifies the electronic circuits
needed to access the data.
 But, it is possible to increase the storage density by placing more sectors on
outer tracks, which have longer circumference.
 Requires more complicated access circuitry.
 This scheme is used in large disks.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Access Time
 Seek time – time required to move the read/write head to the proper track.
 Depends on the initial position of the head relative to the track specified in the address.
 Average values are in the 5 to 8 ms range.
 Rotational delay (Latency time) - amount of time that elapses after the head is
positioned over the correct track until the starting position of the addressed
sector passes under the read/write head.
 On average, this is the time for half a rotation of the disk.
 The sum of these two delays is called the disk access time.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Disk Controller

 Operation of a disk drive is controlled by a disk controller circuit

⚫ Also provides an interface between the disk drive and the rest of the computer
system.
 One disk controller may be used to control more than one drive.
 Figure 5.31 shows a disk controller which controls two disk drives.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Disk Controller..

Processor Main memory

System
bus
Disk controller

Disk drive Disk drive

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Disk Controller..

 A disk controller that communicates directly with the processor contains a

number of registers that can be read and written by the operating system.
 Thus, communication between the OS and the disk controller is achieved in
the same manner as with any I/O interface.
 The disk controller uses the DMA scheme to transfer data between the
disk and the main memory.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Floppy Disks

 Floppy disks are smaller, simpler, and cheaper disk units that consist of a
flexible, removable, plastic diskette coated with magnetic material.
 The diskette is enclosed in a plastic jacket, which has an opening where
the read/write head can be positioned.
 A hole in the center of the diskette allows a spindle mechanism in the
disk drive to position and rotate the diskette.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

 Floppy Disks..

 The main feature of floppy disks is their low cost and shipping convenience.
 However, they have much smaller storage capacities, longer access
times, and higher failure rates than hard disks.
 In recent years, they have largely been replaced by CDs, DVDs, and flash
cards as portable storage media.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING