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Encrypted Alu Code

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ECE N.V.Satyanarayana Murthy
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13 views

Encrypted Alu Code

Uploaded by

ECE N.V.Satyanarayana Murthy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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//encrypted alu

module Encrypted_ALU( A,B,Cin,K0,K1,Sel,ALU_out);

//port declaration

input [3:0] A,B ;

input Cin,K0,K1 ;

input [3:0]Sel ;

output reg [7:0]ALU_out ;

wire [4:0] add ;

wire [3:0] diff ;

wire [7:0] product ;

wire altb,aeqb,agtb ;

wire [3:0]la,lr,ln,lxr,lxn,lnd,lnr;

adder ins1(.a(A),.b(B),.cin(Cin) , .k0(K0),.k1(K1),.sum(add[3:0]),.carry(add[4])) ;

subtractor ins2(.a(A),.b(B),.k0(K0),.k1(K1),.diff( diff )) ;

multiplier ins3(.a(A) ,.b(B) ,.k0(K0),.k1(K1),.product(product));

comparator ins4(.a(A),.b(B),.k0(K0),.k1(K1),.altb(altb),.aeqb(aeqb),.agtb(agtb));

assign la = (K0==0 && K1==1)? A & B : 4'bxxxx;

assign lr = (K0==0 && K1==1)? A | B : 4'bxxxx;

assign ln = (K0==0 && K1==1)? ~ A : 4'bxxxx ;

assign lxr = (K0==0 && K1==1)? A ^ B: 4'bxxxx ;

assign lxn = (K0==0 && K1==1)? ~(A ^ B ):4'bxxxx;

assign lnd = (K0==0 && K1==1)? ~(A & B ):4'bxxxx;

assign lnr = (K0==0 && K1==1)? ~(A | B) :4'bxxxx;

always @*
begin

case(Sel)

4'd1 : ALU_out = add ;

4'd2 : ALU_out = diff ;

4'd3 : ALU_out = product ;

4'd4 : ALU_out = {altb,aeqb ,agtb} ;//{4,2,1}

4'd5 : ALU_out = la ;

4'd6 : ALU_out = lr ;

4'd7 : ALU_out = ln ;

4'd8 : ALU_out = lxr ;

4'd9 : ALU_out = lxn ;

4'd10 : ALU_out = lnd ;

4'd11 : ALU_out = lnr ;

default ALU_out = 8'dx ;

endcase

end

endmodule

//half adder

module half_adder(a,b,sum,carry) ;

//port declaration

input a,b;

output sum,carry ;

//functional declaration

assign sum = a ^ b ;

assign carry = a && b ;

endmodule
//full adder

module full_adder(a,b,cin , k0,k1,sum,carry) ;

//port declaration

input a,b ,cin , k0,k1;

output sum,carry ;

wire c1,c2,s1,w1,w2 ;

//functional declaration

//instanciation

half_adder ha1(.a(a),.b(b),.sum(s1),.carry(c1)) ;

//kg0

assign w1 = c1 ^ k0 ;//xor

//kg1

assign w2 = ! ( s1 ^ k1 ) ;//xnor

half_adder ha2(.a(w2),.b(cin),.sum(sum),.carry(c2)) ;

assign carry = w1 || c2 ;//or gate

endmodule

//adder

module adder(a,b,cin , k0,k1,sum,carry) ;

//port declaration

input [3:0]a,b ;

input cin , k0,k1;

output [3:0] sum ;

output carry ;
wire c1,c2,c3 ;

//functional declaration

//instanciation

full_adder fa1(.a(a[0]),.b(b[0]),.cin(cin) , .k0(k0),.k1(k1),.sum(sum[0]),.carry(c1)) ;

full_adder fa2(.a(a[1]),.b(b[1]),.cin(c1) , .k0(k0),.k1(k1),.sum(sum[1]),.carry(c2)) ;

full_adder fa3(.a(a[2]),.b(b[2]),.cin(c2) , .k0(k0),.k1(k1),.sum(sum[2]),.carry(c3)) ;

full_adder fa4(.a(a[3]),.b(b[3]),.cin(c3) , .k0(k0),.k1(k1),.sum(sum[3]),.carry(carry)) ;

endmodule

//subtractor

module subtractor(a,b,k0,k1,diff) ;

//port declaration

input [3:0]a,b ;

input k0,k1;

output [3:0] diff ;

//output carry ;

wire c1,c2,c3,c4 ;

wire [3:0]b1 ;

//functional declaration

//2's complement of b ;

assign b1 = ~b + 1 ;

//instanciation

full_adder fa1(.a(a[0]),.b(b1[0]),.cin(1'b0) , .k0(k0),.k1(k1),.sum(diff[0]),.carry(c1)) ;

full_adder fa2(.a(a[1]),.b(b1[1]),.cin(c1) , .k0(k0),.k1(k1),.sum(diff[1]),.carry(c2)) ;


full_adder fa3(.a(a[2]),.b(b1[2]),.cin(c2) , .k0(k0),.k1(k1),.sum(diff[2]),.carry(c3)) ;

full_adder fa4(.a(a[3]),.b(b1[3]),.cin(c3) , .k0(k0),.k1(k1),.sum(diff[3]),.carry(c4)) ;

endmodule

//2 bit multiplier

module mul2bit(a ,b ,p);

input [1:0]a ,b ;

output [3:0]p ;

assign p[0] = a[0] && b[0] ;

half_adder ha1(.a(a[1]&&b[0]),.b(a[0]&&b[1]),.sum(p[1]),.carry(hc1)) ;

half_adder ha2(.a(a[1]&&b[1]),.b(hc1),.sum(p[2]),.carry(p[3])) ;

endmodule

//multiplier

module multiplier(a ,b ,k0,k1,product);

input [3:0]a ,b ;

input k0,k1 ;

output [7:0]product ;

wire [1:0]w1,s2 ;

wire [3:0] w2,w3,w4,s1 ;

wire ca1,ca2,gc ;

mul2bit m1(.a(a[1:0]) ,.b(b[1:0]) ,.p({w1,product[1:0]}));


mul2bit m2(.a(a[3:2]) ,.b(b[1:0]) ,.p(w2));

mul2bit m3(.a(a[1:0]) ,.b(b[3:2]) ,.p(w3));

mul2bit m4(.a(a[3:2]) ,.b(b[3:2]) ,.p(w4));

adder add1(.a(w3),.b(w2),.cin(1'b0) , .k0(k0),.k1(k1),.sum(s1),.carry(ca1)) ;

adder add2(.a(s1),.b({2'b00,w1}),.cin(1'b0) , .k0(k0),.k1(k1),.sum({s2,product[3:2]}),.carry(ca2)) ;

adder add3(.a(w4),.b({ca1,ca2,s2}),.cin(1'b0) , .k0(k0),.k1(k1),.sum(product[7:4]),.carry(gc)) ;

endmodule

//comparator

module comparator (a,b,k0,k1,altb,aeqb,agtb);

input [3:0]a,b ;

input k0,k1 ;

output reg altb,aeqb,agtb ;

always @ *

begin

if(k0==0 && k1 ==1)

begin

altb = a < b ;

aeqb = a == b ;

agtb = a > b ;

end

else

begin

altb = 1'bx ;

aeqb = 1'bx ;

agtb = 1'bx ;

end
end

endmodule

//test bench

module en_alu_tb ;

//port declaration

reg [3:0] A,B ;

reg Cin,K0,K1 ;

reg [3:0]Sel ;

wire [7:0]ALU_out ;

integer i ;

Encrypted_ALU uut( .A(A),.B(B),.Cin(Cin),.K0(K0),.K1(K1),.Sel(Sel),.ALU_out(ALU_out));

initial

begin

A = 15 ;

B = 10 ;

Cin = 0 ;

K0 = 0 ;//

K1 = 1 ;

for( i=0 ; i< 12; i=i+1 )

begin

Sel = i ;

#3 ;

end

end
endmodule

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