PCB LAB

ELECTRICAL ENGINEERING DEPARTMENT

INDIAN INSTITUTE OF TECHNOLOGY - BOMBAY

MINIMUM DESIGN REQUIREMENT MANUAL

 PCB LAB
ELECTRICAL ENGINEERING DEPARTMENT, IIT-BOMBAY

MINIMUM DESIGN REQUIREMENT MANUAL

( By Mr. Yadnik Sonalkar )

❖ Minimum design requirements for PCB with Solder Mask and Silkscreen /
Legend Print ( Submission of Photo-Film print is mandatory )
• PCB Specifications :

Features Capability Notes Patterns

Layer Count 1,2 The number of copper layers. -

For more details, please refer

Material FR4
FR4 datasheets.

Max. Dimension 210mm x The maximum dimension

(Xmm x Ymm) 160mm requirement.

Min. Dimension 4mm x The minimum dimension

(Xmm x Ymm) 4mm requirement.

Dimension
± 2mm Manual cutting, CNC Routing -
Tolerance
For more details, please refer
FR4 datasheets.
FR4 Copper e.g. For the 1.6mm board
Clad Thickness ≈ 1.6mm thickness, the finished board
(T) thickness ranges from
1.44mm(T-1.6×10%) to
1.76mm(T+1.6×10%)

Thickness of the copper on the

Finished Outer
1oz (35μm) respective layers after fabrication
Copper Layer
of the PCB board.

Finished Outer
Varies according to the PCB
Copper Layer ± 2μm -
fabrication setup.
Tolerance

Note : FR4 datasheets are available on the PCB Labs website.

PCB LAB INDIAN INSTITUTE OF TECHNOLOGY-BOMBAY

• Drill / Hole Size :

Features Capability Notes Patterns

Drill Hole 0.70mm (Min.) – Minimum and Maximum drill

Size 3.00mm (Max.) hole size requirement.

Drill Hole e.g. for the 0.80mm hole size,

-0.08mm /
Size the finished hole size could be -
+0.15mm
Tolerance between 0.72mm and 0.95mm.

Minimum For Single or Double Layer

Via hole 0.70mm PCBs, the minimum via hole
size size requirement is 0.70mm.

Minimum
For Single or Double Layer
Copper Via
0.85mm PCBs, the minimum Copper
diameter
diameter is 0.85mm.
(d)
The PTH hole size will be
enlarged to 0.15mm in the
PTH hole fabrication. Please generate and
0.70mm – 2.80mm -
Size submit separate file for PTH
holes.
e.g. PTH_drills.drl etc.
The minimum size of annular
ring around plated through hole
pads is 0.40mm. If the
Pad Size Minimum 1.50mm
recommended sizes are not
respected then the pad will not
be produced properly.
Please generate and submit
NPTH 0.70mm (Min.) –
separate file for NPTH holes. -
Hole Size 3.00mm (Max.)
e.g. NPTH_drill.drl etc.

Plated
Not Supported -
Slots

Non-Plated
Not Supported -
Slots

Castellated
Not Supported Half Hole Cut.
Holes

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PCB LAB INDIAN INSTITUTE OF TECHNOLOGY-BOMBAY

• Minimum Clearance :

Features Capability Patterns

Hole to hole clearance

1.2mm
( different nets )

Via to Via clearance

0.50mm
( Same nets )

Pad to Pad clearance

( Pad without hole 0.35mm
different nets )
Pad to Pad clearance
( Pad with hole different 1mm
nets )

Via to track 0.75mm

PTH hole to track 0.75mm

NPTH hole to track 0.75mm

Pad to track 0.35mm

Minimum Trace width 0.35mm

Minimum Trace to Trace

0.35mm
Clearance

Minimum Annular Ring 0.40mm

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PCB LAB INDIAN INSTITUTE OF TECHNOLOGY-BOMBAY

• Solder mask :

Features Capability Notes Patterns

The solder mask should

Solder mask have a minimum of a 0.2
opening / 0.2mm mm opening around the
Expansion pad to avoid any mis-
registration.

To have solder mask

bridge, the spacing
Solder Bridge (d) 0.3mm
between copper pads edge
must be 0.3mm.

Liquid photo-imageable
Solder mask color Green -
solder mask
Solder mask The thickness for solder
10-15μm -
thickness masks on finished PCB.

• Silkscreen / Legend Print :

Features Capability Notes Patterns

Characters width less than

Minimum line
0.25mm 0.25mm will be
width
unidentifiable.

Characters height less than

Minimum Text
1mm 1.0mm (40mil) will be
height
unidentifiable.

Silkscreen /
Liquid photo-imageable
Legend Print White -
solder mask
color

The Minimum Distance

Pad to
0.3mm Between Pad and
Silkscreen
Silkscreen is 0.3mm.

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PCB LAB INDIAN INSTITUTE OF TECHNOLOGY-BOMBAY

• PCB Board Outlines :

Features Capability Notes Patterns

Square,
PCB board dimensional
Rectangular Support
cut-out.
board shape

Other than
Square, PCB board dimensional
Not Supported
Rectangular cut-out.
board shape

• PCB Surface Finishing :

Features Capability Notes Patterns

Organic Solderability
Surface Finishing
Preservative (OSP) - -
Process
Process

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PCB LAB INDIAN INSTITUTE OF TECHNOLOGY-BOMBAY

❖ Contact :
For any query contact us.
Email : [email protected]
Ph No : +91-22-2159-3599
Website : https://www.ee.iitb.ac.in/~pcblab/
Address : PCB LAB ( 1st Floor, Room No : 116-A ), Electrical Annex Building,
Electrical Engineering Department, IIT-Bombay.