Experiment 5

Introduction to DSP kit DSK C6713

Objectives:
1. Familiarization with DSP kit DSK 6713

Introduction:
DSP processors have to perform tasks in real-time, so how do we define real-time?

The definition of real-time depends on the application. The concept of real-time processing is so
subjective that it is almost impossible to apply an absolute definition to it. For example, a real-
time temperature monitoring system might require an update rate of only 5 times/sec to control
the climate of an environment, whereas a real-time digital audio system might require the ability
to process data at up to 48 kHz, or 48,000 times/sec. Thus, a system that operates in real time for
temperature monitoring would be inadequate for a digital audio application. Likewise, a system
that operates in real time for a digital audio application might be inadequate for radio- or
microwave-frequency experiments.

What is a good definition of real time? A good definition for this subjective concept is itself
subjective–real-time processing depends upon the situation at hand. If an application to be
controlled or analyzed requires that time-critical functions be completed within a given time
interval, then a system can be called a real-time system if it will completely execute the
necessary functions within the given time interval for all cases. More specifically, real time
implies real time within the constraints of the system of interest.

Need for Digital Signal Processors:

One may justifiably ask why not use a General Purpose Processor (GPP) such as a Pentium can
be used instead of a DSP processor. The reasons are

1. Power consumption of a GPP is high as compared to a DSP processor?

2. Cost of a GPP is high as compared to a DSP processor?
3. Use a DSP processor when the following are required:
4. Cost saving.
5. Smaller size Low power consumption. Processing of many “high” frequency signals in
real-time.
Department of Electrical Engineering 62
 6. Use a GPP processor when the following are required:
7. Large memory.
8. Advanced operating systems.
9. DSPs are unique processors because of the application where they are used. Some typical
DSP algorithms are

Algorithm Equation
M
Finite Impulse Response Filter a
y(n) 
k 0
k x(n  k )

M N
Infinite Impulse Response Filter y(n)a x(n  k)b y(n  k)
k 0
k
k 1
k

N
Convolution x(k)h(n  k)
y(n) 
k 0

N 1
Discrete Fourier Transform X (k)  x(n) exp[ j(2 / N)nk]
n0

N 1
 
Discrete Cosine Transform Fu  c(u). f (x).cos 2N u2x 1
x0

The Sum of Products (SOP) is the key element in most DSP algorithms. Efficient SOP
calculation requires hardware multiplier and adder. As a whole, SOP computations in DSPs are
called MAC (Multiply and Accumulate) operation.

Multiply-Accumulate (MAC) in Natural C Code

For (I = 0; I < count; I++)
{
Sum += m [I] * n [I];
}

This is the area where DSPs excel, that is, DSPs have hardware multiplier but conventional

microprocessors do not have it.

Department of Electrical Engineering 63

Digital Signal Processors Types:
There are two types of DSP processors.
Fixed point and floating point processors.
A floating point processor is used when following performance factors are required:

1. High precision.
2. Wide dynamic range.
3. High signal-to-noise ratio.
4. Ease of use.
5. A fixed point processor is required when these are not required. Though these factors are
advantages as compared to fixed point processors but they result in some drawbacks for
the floating point processor.
6. Higher power consumption.
7. Can be higher cost.
8. Can be slower than fixed-point counterparts and larger in size.
9. It is the application that dictates which device and platform to use in order to achieve
optimum performance at a low cost.
10. For educational purposes, use the floating-point device (C6713) as it can support both
fixed and floating point operations.

TI’s DSP:
Texas Instruments is one of the largest manufacturers of the Digital Signal Processor in the
world. Different families and sub-families exist to support different markets. A brief comparison
of TI’s DSP products is as under:

In lab we will be using TMS320C6713 DSP from C6000 sub family. C6000 is the best processor
as far as performance and ease of use are concerned.

There are numerous applications of DSP processors. Some major areas are listed below

Department of Electrical Engineering 64

The CPU consists of eight functional units divided into tw0 data paths A and B.

Each path has a floating /fixed point multiplier unit (.M), two floating / fixed point ALUs (.L)
and one fixed point ALUs (.S). Each functional unit can read directly from or write to the
register file within its own path. Each path includes a set of 16 32-bit registers A0 to A15 and B0
to B15. The CPU is interfaced to the internal memory via internal buses and to the external
memory and the peripherals via external buses.

Department of Electrical Engineering 65

 Brief Description of DSP Kit 6713

Department of Electrical Engineering 66

 C6713 DSK Block Diagram
Diagram&6713
6713 DSK
The C6713 DSK is a low-costcost standalone development platform that enables users to evaluate
and develop applications for the TI C67xx DSP family. The DSK also serves as a hardware
reference design for the TMS320C6713 DSP. Schematics, logic equations and application notes
are available to ease hardware development and reduce time to market.

Block Diagram C6713 DSK

The DSK comes with a full compliment of onon-board
board devices that suit a wide variety of
application environments. Key features include:

1. ATexasInstrumentsTMS320C6 20C6713DSPoperatingat225MHz.
2. An AIC23stereocodec
3. 16MbytesofsynchronousDRAMDRAM
4. 512Kbytesofnon-volatile Flas
Flash memory (256 K bytes usable in default
configuration)
5. 4 user accessible LEDs and DDIP switches
6. Software board configurationn through registers implemented in CPLD
7. Configurable boot options
8. Standard expansion connectoors for daughter card use
9. JTAG emulation through on-bboard JTAG emulator with USB host
interface or external emulator
or

Department of Electrical Engineering 67

10. Single voltage power supply (+5V)

Functional Overview of the TMS320C6713 DSK:

The DSP on the 6713 DSK interfaces to on-board peripherals through a 32-bit wide EMIF
(External Memory InterFace). The SDRAM, Flash and CPLD are all connected to the bus.
EMIF signals are also connected daughter card expansion connectors which are used for third
party add-in boards.

The DSP interfaces to analog audio signals through an on-board AIC23 codec and four

3.5 mm audio jacks (microphone input, line input, line output, and headphone output). The codec
can select the microphone or the line input as the active input. The analog output is driven to
both the line out (fixed gain) and headphone (adjustable gain) connectors. McBSP0 is used to
send commands to the codec control interface while McBSP1 is used for digital audio data.
McBSP0 and McBSP1 can be re-routed to the expansion connectors in software.

A programmable logic device called a CPLD is used to implement glue logic that ties the board
components together. The CPLD has a register based user interface that lets the user configure
the board by reading and writing to its registers.

The DSK includes 4 LEDs and a 4 position DIP switch as a simple way to provide the user with
interactive feedback. Both are accessed by reading and writing to the CPLD registers.

An included 5V external power supply is used to power the board. On-board switching voltage
regulators provide the +1.26V DSP core voltage and +3.3V I/O supplies. The board is held in
reset until these supplies are within operating specifications.

Code Composer communicates with the DSK through an embedded JTAG emulator with a USB
host interface. The DSK can also be used with an external emulator through the external JTAG
connector.

Basic Operation:
The DSK is designed to work with TI’s Code Composer Studio development environment and
ships with a version specifically tailored to work with the board. Code Composer communicates
with the board through the on-board JTAG emulator. To start, follow the instructions in the
Quick Start Guide to install Code Composer. This process will install all of the necessary
development tools, documentation and drivers.

After the install is complete, follow these steps to run Code Composer. The DSK must be fully
connected to launch the DSK version of Code Composer.

Department of Electrical Engineering 68

1) Connect the included power supply to the DSK.

2) Connect the DSK to your PC with a standard USB cable (also included).

3) Launch Code Composer from its icon on your desktop.

Detailed information about the DSK including a tutorial, examples and reference material is
available in the DSK’s help file. You can access the help file through Code Composer’s help
menu. It can also be launched directly by double-clicking on the file c6713dsk.hlp in Code
Composer’s docs\hlp subdirectory.

Memory Map:
The C67xx family of DSPs has a large byte addressable address space. Program code and data
can be placed anywhere in the unified address space. Addresses are always32-bits wide.

The memory map shows the address space of a generic 6713 processor on the left with specific
details of how each region is used on the right. By default, the internal memory sits at the
beginning of the address space. Portions of the internal memory can be reconfigured in software
as L2 cache rather than fixed RAM.

The EMIF has 4 separate addressable regions called chip enable spaces (CE0-CE3). The
SDRAM occupies CE0 while the Flash and CPLD share CE1. CE2 and CE3 are generally
reserved for daughter cards.

Department of Electrical Engineering 69

Configuration Switch Settings:
The DSK has 4 configuration switches that allows users to control the operational state of the
DSP when it is released from reset. The configuration switch block is labeled SW3 on the DSK
board, next to the reset switch.

Configuration switch 1 controls the endianness of the DSP while switches 2 and 3 configure the
boot mode that will be used when the DSP starts executing. Configuration switch 4 controls the
on-chip multiplexing of HPI and McASP signals brought out to the HPI expansion connector. By
default, all switches are off which corresponds to EMIF boot (out of 8-bit Flash) in little endian
mode and HPI signals on the HPI expansion connector.

Configuration Switch Settings

Switch1 Switch2 Switch3 Switch4 Configuration Description

Off Little endian (default)

On Big endian
Off Off EMIF boot from8-bitFlash(default)
Off On HPI/Emulation boot
On Off 32-bitEMIFboot
On On 16-bitEMIFboot
Off HPI enabled on HPI pins(default)
On McASP1enabledonHPIpins

CPLD (Programmable Logic):

The C6713 DSK uses an Altera EPM3128TC100-10 Complex Programmable Logic

Device (CPLD) device to implement:

1. 4 Memory-mapped control/status registers that allow software control of various board

features.
2. Control of the daughter card interface and signals.
3. Assorted "glue" logic that ties the board components together.

Department of Electrical Engineering 70

AIC23 Codec:
The DSK uses a Texas Instruments AIC23 stereo codec for input and output of audio signals.
The codec samples analog signals on the microphone or line inputs and converts them into
digital data so it can be processed by the DSP.

When the DSP is finished with the data it uses the codec to convert the samples back into analog
signals on the line and headphone outputs so the user can hear the output.

The codec communicates using two serial channels, one to control the codec’s internal
configuration registers and one to send and receive digital audio samples. McBSP0 is used as the
unidirectional control channel. It should be programmed to send a 16-bit control word to the
AIC23 in SPI format. The top 7 bits of the control word should specify the register to be
modified and the lower 9 should contain the register value. The control channel is only used
when configuring the codec, it is generally idle when audio data is being transmitted,

McBSP1 is used as the bi-directional data channel. All audio data flows through the data
channel. Many data formats are supported based on the three variables of

sample width, clock signal source and serial data format. The DSK examples generally use a 16-
bit sample width with the codec in master mode so it generates the frame sync and bit clocks at
the correct sample rate without effort on the DSP side. The preferred serial format is DSP mode
which is designed specifically to operate with the McBSP ports on TI DSPs.

The codec has a 12MHz system clock. The 12MHz system clock corresponds to USB sample
rate mode, named because many USB systems use a 12MHz clock and can use the same clock
for both the codec and USB controller. The internal sample rate generate subdivides the 12MHz
clock to generate common frequencies such as48KHz, 44.1KHz and 8KHz. The sample rate is
set by the codec’s SAMPLERATE register. The figure below shows the codec interface on the
C6713 DSK.

Synchronous DRAM:
The DSK uses a 128-megabit synchronous DRAM (SDRAM) on the 32-bit EMIF. The SDRAM
is mapped at the beginning of CE0 (address 0x80000000). Total available memory is 16
megabytes. The integrated SDRAM controller is part of the EMIF and must be configured in
software for proper operation. The EMIF clock is derived from the PLL settings and should be
configured in software at 90MHz. This number is based on an internal PLL clock of 450MHz
required to achieve 225 MHz operation with a divisor of 2 and a 90MHz EMIF clock with a
divisor of 5.

Department of Electrical Engineering 71

When using SDRAM, the controller must be set up to refresh one row of the memory array every
15.6 microseconds to maintain data integrity. With a 90MHz EMIF clock, this period is 1400 bus
cycles.

Flash Memory:
Flash is a type of memory which does not lose its contents when the power is turned off. When
read it looks like a simple asynchronous read-only memory (ROM). Flash can be erased in large
blocks commonly referred to as sectors or pages. Once a block has been erased each word can be
programmed once through a special command sequence. After than the entire block must be
erased again to change the contents.

The DSK uses a 512Kbyte external Flash as a boot option. It is visible at the beginning of CE1
(address 0x90000000). The Flash is wired as a 256K by 16-bit device to support the DSK's 16-
bit boot option. However, the software that ships with the DSK treats the Flash as an 8-bit device
(ignoring the top 8 bits) to match the 6713's default 8-bit boot mode. In this configuration, only
256Kbytes are readily usable without software changes.

LEDs and DIP Switches:

The DSK includes 4 software accessible LEDs (D7-D10) and DIP switches (SW1) that provide
the user a simple form of input/output. Both are accessed through the CPLD USER_REG
register.

Daughter Card Interface:

The DSK provides three expansion connectors that can be used to accept plug-in daughter cards.
The daughter card allows users to build on their DSK platform to extend its capabilities and
provide customer and application specific I/O. The expansion connectors are for memory,
peripherals, and the Host Port Interface (HPI)

The memory connector provides access to the DSP’s asynchronous EMIF signals to interface
with memories and memory mapped devices. It supports byte addressing on
32 bit boundaries. The peripheral connector brings out the DSP’s peripheral signals like
McBSPs, timers, and clocks. Both connectors provide power and ground to the daughter card

The HPI is a high speed interface that can be used to allow multiple DSPs to communicate and
cooperate on a given task. The HPI connector brings out the HPI specific control signals.

Most of the expansion connector signals are buffered so that the daughter card cannot directly
influence the operation of the DSK board. The use of TI low voltage, 5V tolerant buffers, and
CBT interface devices allows the use of either +5V or +3.3V devices to be used on the daughter
card.

Department of Electrical Engineering 72

Other than the buffering, most daughter card signals are not modified on the board. However, a
few daughter card specific control signals like DC_RESET and DC_DET exist and are
accessible through the CPLD DC_REG register. The DSK also multiplexes the McBSP0 and
McBSP1 of on-board or external use. This function is controlled through the CPLD MISC
register.

Audio Connectors:

The C6713 DSK has 4 audio connectors. They are described in the following sections.

J301, Microphone Connector:

The input is a 3.5 mm. stereo jack. Both inputs are connected to the microphone so it is
monaural. The signals on the plug are shown in the figure below.

Ground
Microphone In
Microphone Bias

Microphone Stereo Jack

J303, Audio Line In Connector:

The audio line in is a stereo input. The input connector is a 3.5 mm stereo jack. The signals on
the mating plug are shown in the figure below.

Ground
Right Line In
Left Line In
Audio Line In Stereo Jack

J304, Audio Line Out Connector:

The audio line out is a stereo output. The output connector is a 3.5 mm stereo jack. The signals
on the mating plug are shown in the figure below.

Department of Electrical Engineering 73

 Ground
Right Line Out
Left Line Out

Audio Line Out Stereo Jack

J303, Headphone Connector:

Connector J4 is a headphone/speaker jack. It can drive standard headphones or a high impedance
speaker directly. The standard 3.5 mm jack is shown in the figure below.

Ground
Right Headphone
Left Headphone

Headphone Jack

J6, Optional Power Connector:

Connector J6 is an optional power connector. It will operate with the standard personal computer
power supply. To populate this connector, use a Molex #15-24-4041. The table below shows the
voltages on the respective pins.

J6, Optional Power Connector

Pin# Voltage Level

1 +12Volts

2 -12 Volts

3 Ground

4 +5Volts

Department of Electrical Engineering 74

Connector J201 provides a Universal Serial Bus (USB) Interface to the embedded JTAG
emulation logic on the DSK. This allows for code development and debug without the use of an
external emulator. The signals on this connector are shown in the below.
J201, USB Connector

Pin# USB Signal Name

1 USB Vdd
2 D+
3 D-
4 USB Vss
5 Shield
6 Shield

System LEDs:
TheTMS320C6713 DSK has four system light emitting diodes (LEDs). These LEDs indicate
various conditions on the DSK. These function of each LED is shown in the table below.
System LEDs
Reference On Signal

Designator Color Function State

D4 Green USB Emulation in use. When External JTAG 1
Emulator is used this LED is off.

D3 Green +5Voltpresent 1

D6 Orange RESET Active 1

DS201 Green USB Active, Blinks during USB data transfer 1

Reset Switch:

There are three resets on the TMS320C6713 DSK. The first reset is the power on reset. This
circuit waits until power is within the specified range before releasing the power on reset pin to
the TMS320C6713.
External sources which control the reset are push button SW2, and the on board embedded USB
JTAG emulator.

Department of Electrical Engineering 75

 Lab Exercise and Summary
Summary should cover Introduction, Procedure, Data Analysis and Evaluation.

Department of Electrical Engineering 76

Department of Electrical Engineering 77
Student’s Signature: ________________ Date: ________________

Department of Electrical Engineering 78

 LABORATORY SKILLS ASSESMENT (Psychomotor)

Total Marks: 100

Criteria Level 1 Level 2 Level 3 Level 4 Score

(Max Marks) 0% ≤ S < 50% 50% ≤ S< 70% 70% ≤ S< 90% 90%≤ S ≤100% (S)
Procedural Selects Selects and Selects and applies Selects and
Awareness inappropriate applies the appropriate applies
(20) skills and/or appropriate skills strategies and/or appropriate
strategies and/or strategies skills specific to strategies and/or
required by the required by the the task without skills specific to
task task with some significant errors the task without
errors any error
Practical Makes several Makes few Makes some non- Applies the
Implementation critical errors in critical errors in critical errors in procedural
(30) applying applying applying knowledge in
procedural procedural procedural perfect ways
knowledge knowledge knowledge
Safety Requires Requires some Follows safety Routinely follows
(10) constant reminders to procedures with safety procedures
reminders to follow safety only minimal
follow safety procedures reminders
procedures
Use of Uses tools, Uses tools, Uses tools, Uses tools,
Tool/Equipment equipment and equipment and equipment and equipment and
(20) materials with materials with materials with materials with a
limited some competence considerable high degree of
competence competence competence
Participation Shows little Demonstrates Demonstrates Actively helps to
to Achieve commitment to commitment to commitment to identify group
Group Goals group goals and group goals, but group goals and goals and works
(10) fails to perform has difficulty carries out effectively to
assigned roles performing assigned roles meet them in all
assigned roles effectively roles assumed
Interpersonal Rarely interacts Interacts with Interacts with all Interacts
Skills in positively other group group members positively with all
Group Work within a group, members if spontaneously group members
(10) even with prompted and encourages
prompting such interaction in
others

Marks Obtained

Instructor’s Signature: ________________ Date: ________________

Department of Electrical Engineering 79

 LABORATORY SKILLS ASSESMENT (Affective)
Total Marks: 40
Criteria Level 1 Level 2 Level 3 Level 4 Score
(Max. Marks) 0% ≤ S < 50% 50% ≤ S < 70% 70% ≤ S < 90% 90% ≤ S ≤ 100% (S)

Introduction Very little Introduction is Introduction is Introduction complete

(5) background brief with some nearly complete, and well-written;
information minor mistakes missing some minor provides all necessary
provided or points background principles
information is for the experiment
incorrect
Procedure Many stages of Many stages of The procedure could The procedure is well
(5) the procedure are the procedure be more efficiently designed and all stages
not entered on are entered on designed but most of the procedure are
the lab report. the lab report. stages of the entered on the lab
procedure are report.
entered on the lab
report.
Data Record Data is brief and Data provides Data is almost Data is complete and
(10) missing some significant complete but has relevant. Tables with
significant pieces information and some minor units are provided.
of information. has few critical mistakes. Graphs are labeled. All
mistakes. questions are answered
correctly.
Data Analysis Data is presented Data is Data is presented in Data are presented in
(10) in very unclear presented in ways (charts, tables, ways (charts, tables,
manner. Error ways (charts, graphs) that can be graphs) that best
analysis is not tables, graphs) understood and facilitate understanding
included. that are not clear interpreted. Error and interpretation.
enough. Error analysis is included. Error analysis is
analysis is included.
included.
Report Report contains Report is Report is well Report is well
Quality many errors. somewhat organized and organized and cohesive
(10) organized with cohesive but and contains no
some spelling or contains some grammatical errors.
grammatical grammatical errors. Presentation seems
errors. polished.

Marks Obtained

LABORATORY SKILLS ASSESSMENT (Cognitive)

Total Marks: 10
(If any)

Marks Obtained

Instructor’s Signature: ________________ Date: ________________

Department of Electrical Engineering 80

Experiment 6

Introduction to Code Composer Studio and Sine Wave Generation on C6713

Objectives:
1. Familiarization with Code Composer Studio (CCS)
2. Learning Basic Signal processing in DSP Kit C6713

DSK POST (Power On Self-Test):

1. Power up DSK and watch LEDs

2. Power On Self-Test (POST) program stored in FLASH memory automatically executes
3. POST takes 10-15 seconds to complete
4. All DSK subsystems are automatically tested
5. During POST, a 1kHz sinusoid is output from the AIC23 codec for 1 second
6. Listen with headphones or watch on oscilloscope
7. If POST is successful, all four LEDs blink 3 times and then remain on

PROCEDURE TO WORK ON CODE COMPOSER STUDIO

C6713DSK in CCSv5 - Creating new project:

Activity:

Procedure:
1. Click File → New → CCS Project
2. Type project name and select remaining settings as follows

Department of Electrical Engineering 81