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Lab 5 Digital Systems

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Nour Turky
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3 views

Lab 5 Digital Systems

Uploaded by

Nour Turky
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Lab 5: Counter, Adder and Subtractor

ECE443: Advanced Digital Systems Design

Nour turky
31/10/2024

Introduction: In this lab, we will learn how to combine arithmetic circuits with sequential
elements. We will create a counter that adds one each time the clock ticks using an adder and a
register file. We will also design adders and subtractors to prepare for building an Arithmetic
Logic Unit (ALU) later.
Step 1: Design an 8-bit Counter
Created a new lab named ‘lab5’

Specificied the project settings:


Defined the inputs and the output:
Implementation of the 8bit counter:

Created a new Verilog test Fixture named counter_tb

Implementation of the test bench with the default code:


The simulation with the default code:

The simulation after changing the code:

In the first simulation (default code) we can not see anything because we intialized the clk and
rst to 0. but in the second simulation we kept changing the state of the clock every 5ns. At first
we set the rst to 1 for 15ns so nothing changed as you can see in the simulation. After we
released the rst to observe the counter behaviour for a period of 200ns and by doing so we can
observe the counter started counting up from 0
Step 3: Design an 8-bit Adder
Created a new verilog module named ‘adder’

Defined the input and the


outputs
Implementation of the adder

This Verilog code implements an 8-bit adder that takes two 8-bit inputs (A and B) and a carry-in
(Cin) to produce an 8-bit sum (Sum) and a carry-out (Cout). It uses a generate block to calculate the
sum and carry for each bit position, employing XOR operations for the sum and AND/OR
operations to determine the carry-out for the next bit. The internal carry bits are stored in a wire
array, allowing for the cascading of multiple adders to handle larger binary additions.
Implementation of the subtractor

This Verilog code implements an 8-bit subtractor that calculates the difference between two 8-bit
inputs, A and B, with a borrow-in (Bin). It produces an 8-bit difference (Diff) and a borrow-out
(Bout). The code uses a loop to calculate the difference for each bit using XOR operations and
determines any borrow-out using AND and OR operations. The internal borrow values are stored
in a wire array, allowing for cascading multiple subtractors.

Conclusion: This lab helped us understand how to mix arithmetic circuits with sequential
elements. We practiced using Verilog to create a counter and design adders and subtractors,
which will be useful for future ALU projects.

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