Performance Analysis of A Color CMOS Photogate
Performance Analysis of A Color CMOS Photogate
1, JANUARY 2000 55
Abstract—The performance of a color CMOS photogate image these performance limitations is essential to guide the develop-
sensor is reported. It is shown that by using two levels of correlated- ment of the next generation of CMOS APS sensors. In this paper
double sampling it is possible to effectively cancel all fixed-pattern the performance of a color CMOS photogate active pixel sensor
noise due to read-out circuit mismatch. Instead the fixed-pattern
noise performance of the sensor is limited by dark current nonuni- is experimentally evaluated and compared with that of CMOS
formity at low signal levels, and conversion gain nonuniformity at photodiode APS imagers and CCD sensors. CMOS APS im-
high signal levels. It is further shown that the imaging performance ager performance limitations are identified and directions for
of the sensor is comparable to low-end CCD sensors but inferior to research needed to address these issues are presented.
that reported for high-end CCD sensors due to low quantum effi-
ciency, high dark current, and pixel cross-talk. As such the perfor-
mance of CMOS sensors is limited at the device level rather than II. SENSOR ARCHITECTURE AND OPERATION
at the architectural level. If the imaging performance issues can be
addressed at the fabrication process level without increasing cost A. Sensor and Column Circuit
or degrading transistor performance, CMOS has the potential to
seriously challenge CCD as the solid-state imaging technology of A 352 × 288 photogate sensor was fabricated in a Lucent
choice due to low power dissipation and compatibility with camera Technologies nonsilicided 0.8 m CMOS process with pixel di-
system integration. mensions of 16.0 m × 16.0 m [7]. The architecture of the
Index Terms—Active pixel sensor, CMOS image sensor, color. sensor is shown in Fig. 1 and its operation can be explained as
follows. During photocurrent integration the polysilicon photo-
gate is held at and photo-generated carriers are col-
I. INTRODUCTION lected beneath the gate oxide. The transfer device is bi-
Fig. 5. Mean dark signal, pixel fixed-pattern noise (FPN), and dark current Fig. 6. Optical sensitivity of the monochrome sensor and color sensor with
shot noise as a function of exposure time at 25 C. microlenses as a function of faceplate illuminance for 30 ms exposure. Data
for the monochrome sensor is represented by diamonds while the red, green,
and blue pixels of the color sensor with microlenses are represented by circles,
is fully compatible with camera system integration providing squares, and triangles, respectively.
power and miniaturization advantages [3], [4].
factor of two times larger than values reported for CCD sen- undersized ( and ). To drive the off-chip fixed-pat-
sors without the use of charge pumping or surface pinning, tern noise correction circuits at 30 frames/s it is necessary to
and more than an order of magnitude larger than values re- supply large bias currents resulting in a loss in gain. The con-
ported for CCD sensors using such advanced dark current version gain referred to the pixel floating diffusion node
management techniques [11]–[13]. is 70 V/electron corresponding to a capacitance for the pixel
The dark current nonuniformity of the photogate sensor floating diffusion node of fF. is composed of
was determined by measuring the pixel FPN as a function the parasitic capacitances of the shared drain/source region of
of integration time as shown in Fig. 5. The pixel FPN devices and , together with the gate-drain overlap ca-
can be assumed to consist of independent components due pacitance of . As the bandwidth of the pixel need only satisfy
to dark current nonuniformity , and residual device the read-out line rate all of these devices can be of minimum size
mismatch not suppressed by CDS such as pixel to achieve a large value of conversion gain and to maximize the
gain mismatch according to: pixel fill-factor. In comparison, the bandwidth of a CCD output
stage must accommodate the full pixel rate and so the corre-
(1) sponding source follower device(s) cannot be of minimum size
and the value of conversion gain achievable in a CCD output
remains constant and linearly increases as stage is limited unless feedback is employed [21]. It is also dif-
a function of integration time. At zero integration time it can ficult to achieve high conversion gain in a CMOS photodiode
be assumed that is negligible and extrapolation of the imager but for a completely different reason. In a CMOS photo-
measured data on a linear scale gave V diode sensor the photodiode used for collecting photon gener-
RMS. This is small compared to for practical values ated carriers is also the charge-to-voltage conversion node. As
of integration time. For example, at 30 ms exposure is the area of the photodiode is maximized for photo-carrier col-
found to be 650 µV RMS and rearrangement of (1) gives lection the value of is much larger than that of the corre-
V RMS at 25 C. This demonstrates that CDS sponding photogate sensor yielding a smaller value of conver-
effectively suppresses pixel FPN caused by device mismatch sion gain. As CMOS technology scales for a photodiode
to an insignificant level relative to that due to dark current sensor will increase for a given pixel size due to higher doping
nonuniformity. However, at 30 ms exposure corresponds levels and an increase in pixel fill-factor. In contrast for a
to 23 electrons RMS, about an order of magnitude greater photogate sensor will become smaller as the feature dimensions
than values reported for CCD sensors that employ surface shrink giving a corresponding increase in conversion gain .
pinning [13]. Furthermore, recently published results demon-
strate that with each successive generation of CMOS tech- C. Optical Sensitivity
nology, the dark current performance of the corresponding To determine the optical sensitivity of the photogate sensor a
photogate or photodiode CMOS imager is substantially de- 3200 K tungsten-halogen lamp was used to provide a uniform
graded [14]–[16]. This suggests that to achieve FPN perfor- source of illumination and sensor exposure was controlled by
mance that is competitive with CCD sensors both now and in the use of neutral density filters. A color compensating filter
the future will require intervention at the fabrication process was employed to suppress infrared. The optical sensitivity of
level to improve cleanliness and/or realize pixel designs that the monochrome and color photogate sensors as a function of
support surface pinning [17], [18]. faceplate illuminance for 30 ms exposure are graphed in Fig. 6.
Straight lines have been fitted to the data points in a least squares
B. Conversion Gain sense over the linear portion of the response. The optical sen-
Exploiting the square root relationship between dark current sitivities of the monochrome and color photogate sensors are
shot noise and the mean dark signal (see Fig. 5) the conversion computed by dividing the slope of the mean signal curves by
gain of the sensor was found to be nominally 28 V/electron the exposure time and were found to be 4.25 V/lux s for the
at the chip output. This is significantly higher than values re- monochrome sensor, and 1.30 V/lux s, 1.12 V/lux s, and 0.66
ported for CMOS photodiode1 sensors and CCD output stages V/lux s for the red, green, and blue pixels of the color sensor,
which are typically of the order of 10 V/electron [12], [13]. respectively. The addition of microlenses increased the optical
High conversion gain is advantageous from a signal-to-noise sensitivity of the red, green, and blue pixels by 33, 27, and 15%,
ratio (SNR) perspective as it minimizes the contributions to the respectively.
sensor SNR from the thermal noise of the read-out circuits and To enable a fair comparison between the optical sensitivity
subsequent stages of signal processing (CDS, A/D conversion of the photogate sensor to values reported for other CMOS and
etc.) [20]. Circuit simulations give the combined gain of the CCD image sensors it is necessary to normalize results with
sensor pixel and column source followers to be 0.4 under respect to pixel area and sensor conversion gain. To this end an
the same bias conditions used to obtain the experimental data. optical sensitivity figure of merit was defined:
This relatively low value of gain is a consequence of the column
source follower current sources in the prototype sensor being (2)
1We refer here to the simple three-transistor photodiode pixel [19]. While
four-transistor photodiode pixels yield higher conversion gain, they suffer from where
significant image lag [15]. mean optical sensitivity in V/lux s;
BLANKSBY AND LOINAZ: COLOR CMOS PHOTOGATE IMAGE SENSOR 59
conversion gain in V/electron; The charge capacity is determined by , the doping pro-
pixel area in square microns. files, and the physical dimensions of the CCD stage, and is typ-
ically 60–70K electrons. Techniques such as surface pinning or
Using (2) for the monochrome photogate sensor is 590
charge pumping can be used to reduce such that its con-
electrons/lux s/µm2 while a value of 2400 electrons/lux s/µm2
tribution to (4) is negligible. Under these conditions the noise
can be computed from data reported for a frame-interline
floor is set by the read noise whose contribution to the
transfer (FIT) CCD under similar illumination conditions,
dynamic range is determined by . Hence maximizing the con-
and a value of 3400 electrons/lux s/µm2 can be calculated
version gain increases the sensor dynamic range until the
from data reported for a CMOS photodiode sensor under
output stage saturates.
unknown illumination conditions [12], [22]. The substantially
Unlike a CCD sensor the saturation level of a CMOS photo-
lower optical sensitivity of the photogate sensor results in
gate or photodiode sensor is determined by read-out circuit con-
poor SNR performance when compared to the photodiode and
siderations. The available signal swing at the pixel floating dif-
CCD sensors. As the temporal noise of a solid-state sensor
fusion node is limited by the threshold voltage drops across
is typically dominated by photon shot noise (see Fig. 6),
the reset device and the source follower device . The dy-
the SNR is proportional to the square root of the number of
namic range of a photogate sensor is approximately given by
electrons collected by each pixel [20]. Therefore the factor of
four difference in optical sensitivity between the photogate
sensor and that of the FIT-CCD sensor translates into a factor
of two (or 6 dB) difference in SNR performance. The optical V
(5)
sensitivity of the photogate sensor is fundamentally limited by
low quantum efficiency as will be discussed shortly.
served. This component referred to here as charge transfer noise reported value of gain mismatch of 1% for a CMOS photogate
was found to dominate the temporal noise per- APS imager [11]. The cause of pixel gain mismatch may be at-
formance of the sensor at low signal levels with a magnitude tributed to photoresponse nonuniformity and/or conversion gain
of 1–2 mV RMS [23]. However, it was found that the value nonuniformity due to tolerances in the manufacturing process.
of was substantially reduced by increasing the However, as the dimensions of the pixel floating diffusion node
period of time that the pixel photogate node is held are much smaller than that of the photogate it is reasonable to
low during sensor read-out, and for ns the in- conclude that the dominant cause of pixel gain mismatch is con-
clusion of in (3) could be neglected. It is pro- version gain nonuniformity. An RMS variation of 0.36% in con-
posed that associated with image lag, a transfer loss noise sim- version gain corresponds to an RMS variation of fF in
ilar to that found in CCD shift registers is present [24]. The the pixel floating diffusion node capacitance .
structure of the single-poly photogate pixel is such that it is With the application of both CDS and CB the column FPN
subject to lag or incomplete charge transfer. This means that it and pixel FPN cannot be separated by measurement and are
takes a number of read-out cycles before the number of signal measured at the same level as the pixel FPN with one level of
electrons transferred to is equal to the number of CDS. This demonstrates that CB does not alter the pixel FPN
photon generated electrons collected by the level while effectively suppressing column FPN to the same
photogate each cycle. As a consequence the number of elec- level as the pixel FPN, i.e. 0.65 mV RMS (0.29% )
trons held under the photogate is actually greater than at low to moderate signal levels, and increasing linearly at 3.63
in the steady state. These “extra” electrons mV RMS/V for moderate to high signal levels.
that are not transferred introduce shot noise to . How- The results of this FPN investigation are significant because
ever, increasing allows a greater proportion of carriers col- they demonstrate that by applying two levels of CDS it is pos-
lected under the pixel photogate to diffuse to yielding a re- sible to suppress all FPN due to transistor threshold voltage mis-
duction in image lag and charge transfer noise. In CCD sensors match in the pixel and column circuits. Under these conditions
lag is greatly reduced at the device level using surface pinning the FPN performance becomes limited by dark current nonuni-
techniques [17]. formity at low signal levels, and conversion gain nonuniformity
at high signal levels. As it is possible to employ two levels of
F. Fixed-Pattern Noise CDS with a CMOS photodiode APS imager using the read-out
The fixed-pattern noise (FPN) performance of the photogate architecture of Fig. 1, the FPN performance of photodiode APS
sensor was determined by computing the RMS pixel fixed-pat- imagers is also limited by dark current nonuniformity at low
tern noise and RMS column fixed-pattern noise as a signal levels, and conversion gain nonuniformity at high signal
function of illuminance during the optical sensitivity measure- levels.
ment. The effectiveness of correlated-double sampling (CDS)
as a technique for managing FPN was assessed by measuring G. Quantum Efficiency
the pixel and column FPN without CDS, then using one level The absolute quantum efficiencies of the monochrome and
of CDS, and finally two levels of CDS, also known as crowbar color photogate sensors were measured using a monochromator
(CB) [5]. The combined FPN data for 30 ms exposure at 25 C and are shown in Fig. 8. A color compensating filter was used
is shown in Fig. 7 plotted as a function of mean signal level. when determining the quantum efficiency of the color sensor.
Without the use of CDS the sensor FPN is dominated by pixel The quantum efficiency of the monochrome sensor is similar
offset mismatch due to threshold voltage variations in the pixel to that reported for other CMOS photogate sensors [11], but
reset device , and source follower devices . Under these about a factor of three or four lower than that found for CMOS
conditions the pixel and column FPN is 15.4 mV RMS or 6.7% photodiode sensors and interline-transfer CCD sensors [19].
. When compared to a frame-transfer CCD the peak quantum
With the application of the first level of CDS, pixel offset efficiency of the photogate sensor is approximately 70% lower,
mismatch due to threshold voltage variations is cancelled. In- and the quantum efficiency at short wavelengths is almost five
stead column FPN due to offset mismatch between the column times lower [13]. The low quantum efficiency of the photogate
source followers formed by devices – becomes the sensor, particularly at short wavelengths, is largely due to
dominant source of FPN at 4.1 mV RMS or 1.8% . absorption in the polysilicon photogate and the lower fill-factor
At low to moderate signal levels the pixel FPN is suppressed to achieved by the photogate pixel. By way of comparison the
the noise floor imposed by dark current nonuniformity at 0.65 polysilicon of a standard submicron CMOS process is 3–10
mV RMS or 0.29% . As stated in Section A, while times thicker than that used in a frame-transfer CCD. The
this result is similar to values reported for CMOS APS sensors quantum efficiency of the photogate architecture will improve
in comparable technology, it is more than an order of magni- as the feature dimensions of CMOS technology continue to
tude larger than values reported for CCD sensors using surface shrink and a corresponding increase in pixel fill-factor can
pinning [13]. At moderate to high signal levels with one level be realized. However, to substantially enhance the quantum
of CDS the pixel FPN increases as function of the mean signal efficiency of the photogate sensor would require decreasing
due to gain mismatch between pixels. If these data points are the thickness of the polysilicon photogate as a modification
replotted on a linear scale they form a straight line with a slope to the CMOS fabrication process. Furthermore, it is common
of 3.63 mV RMS/V corresponding to an RMS pixel gain mis- practice in sub-micron CMOS technology to form silicide on
match of 0.36% [23]. This compares favorably with a previously the polysilicon gate and/or source/drain regions of devices.
BLANKSBY AND LOINAZ: COLOR CMOS PHOTOGATE IMAGE SENSOR 61
(a) (b)
Fig. 9. (a) The ideal NTSC color analysis functions for a D6500K white point and (b) the color analysis functions of the color photogate sensor after color
correction.
TABLE I sonable cost, then CMOS imaging technology will replace CCD
SUMMARY OF PHOTOGATE SENSOR CHARACTERISTICS for a wide range of applications due to its low power dissipation
and compatibility with camera system integration.
ACKNOWLEDGMENT
The authors would like to thank S. Mendis for the sensor de-
sign, D. Inglis for managing the color filter array deposition, D.
Gibbon and R. Kollarits for sharing their knowledge of color, I.
Fujimori for the quantum efficiency data, and B. Ackland and
A. Bouzerdoum for encouraging this work.
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