Printed Pages: 02 Sub Code: KEC-302

Paper Id: 233383 Roll No.

B. TECH
(SEM-III) THEORY EXAMINATION 2022-23
DIGITAL SYSTEM DESIGN
Time: 3 Hours Total Marks: 100
Note: Attempt all Sections. If require any missing data; then choose suitably.

SECTION A

1. Attempt all questions in brief. 2 x 10 = 20

(a) Explain Minterm and Maxterm with example.

(b) Design and draw State Diagram for a 2 bit up/down counter
(c) Convert 454.52310 to an Hexadecimal number
(d) Draw a full adder using two half adders
(e) What do you mean by race around condition in JK Flip Flop?
(f) Describe figure of merit & noise immunity of TTL & CMOS ICs
(g) What is the basic concept of switched capacitors.
(h) Explain FAN-IN and FAN-OUT.

2
90
(i) What are the advantages and disadvantages of flash type ADC

13
(j) What is the difference between Multiplexer and Encoder
_2

2.
P2

24
SECTION B

5.
3D

2. Attempt any three of the following: 10x3=30

.5
P2

17
Q

(a) What is magnitude comparator? Design a Single-bit comparator circuit using logic
|1
gates.
9

(b) Give the general procedure for converting a multilevel AND-OR diagram into an all
:1

NAND diagram. Implement the following Boolean function with NAND gates only.
30

F ( x, y, z )   1,2,3,4,5,7 
:
13

(c) With neat diagram explain the operation of R-2R DAC

(d) Design a universal shift register that performs HOLD, SHIFT RIGHT, SHIFT LEFT,
3
02

& LOAD operations.

(e) Draw and Explain a NAND gate in Totem Pole TTL Configuration.
-2
03

SECTION C
7-
|2

3. Attempt any one part of the following: 10x1=10

(a) Simplify the logic function using K-map

Y = ∑m (0, 2, 3, 4, 6, 7, 9, 11,16,18,19,20,22,23,25,27)
(b) Implement the function F = ∑m(0,1,3,4,7,8,9,11,14,15) using 8:1 mux.

QP23DP2_290 | 27-03-2023 13:30:19 | 117.55.242.132

4. Attempt any one part of the following: 10x1=10

(a) Design a 3 bit up/down ripple counter

(b) Draw and explain the dual slope analog to digital convertor.

5. Attempt any one part of the following: 10x1=10

(a) Minimize y = ∑m(0,1,2,3,5,6,7,8,14,15) + d(4,11,13) using tabular method.

(b) Explain a Weighted Resistor digital to analog convertor.

6. Attempt any one part of the following: 10x1=10

(a) Explain Decoder with neat diagram. Implement the logic expression Y= Σm(2, 4, 6, 7)
using decoder as ROM.
(b) Design a sequential circuit with two Flip Flops, A & B and one input x. When x=0,
the State of the circuit remains the same when x=1 the circuit passes through the state
transitions from 00 to 01 to 11 to 10 back to 00 & repeat.

2
90

13
7. Attempt any one part of the following: 10x1=10
_2

2.
P2

24
(a) Draw CMOS inverter circuit and explain its working.

5.
3D

(b) Define PLD’s. Implement the following function using PLA

.5
P2

F1 = ∑m(0,3,4,7)
F2 = ∑m(1,2,5,7) 17
Q

|1
9
:1
: 30
13
3
02
-2
03
7-
|2

QP23DP2_290 | 27-03-2023 13:30:19 | 117.55.242.132