April 2015 Volume 25 Number 1

I N T H I S I S S U E

patent-pending boost-buck
Industry’s First 0.8µVRMS Noise
LDO Has 79dB Power Supply
LED driver topology 8

Rejection Ratio at 1MHz

I2C programmable
supervisors with EEPROM
12
Amit Patel

18V buck-boost converter

with intelligent PowerPath When it comes to powering noise-sensitive analog/RF applications,
control delivers >2A 16
low dropout (LDO) linear regulators are generally preferred over their
switching counterparts. Low noise LDOs power a wide range of
advantages of 75W boost analog/RF designs, including frequency synthesizers (PLLs/VCOs),
mode LED driver 22
RF mixers and modulators, high speed and high resolution data
converters (ADCs and DACs) and precision sensors. Nevertheless,
how to design an isolated,
these applications have reached capabilities and sensitivities
high frequency, push-pull
DC/DC converter 25
that are testing the limits of conventional low noise LDOs.
For instance, in many high end VCOs, power supply noise
directly affects the VCO output phase noise (jitter). Moreover,
to meet overall system efficiency requirements, the LDO
usually post-regulates the output of a relatively noisy
switching converter, so the high frequency power supply
rejection ratio (PSRR) performance of the LDO becomes
paramount. With its ultralow output noise and ultrahigh
PSRR performance, the LT®3042 can directly power some
of most noise-sensitive applications while post-regulating
the output of a switching converter, without requir-
ing bulky filtering. Table 1 compares the LT3042’s noise
performance with conventional low noise regulators.

PERFORMANCE, ROBUSTNESS & SIMPLICITY

The LT3042 is a high performance low dropout linear

regulator featuring Linear Technology’s ultralow noise and
ultrahigh PSRR architecture for powering noise-sensitive
The LT3042 brings noise-free power to high performance electronics. (continued on page 4)

w w w. li n ea r.com
The LT3042 is a high performance low dropout regulator featuring Linear’s ultralow
noise and ultrahigh PSRR architecture for powering noise-sensitive applications.
Even with its high performance, the LT3042 maintains simplicity and robustness.

(LT3042, continued from page 1) Table 1. The LT3042 vs traditional low noise LDOs

applications. Even with its high per-

PARAMETER LT1763 LT3062 LT3082 LT3042
formance, the LT3042 maintains sim-
plicity and robustness. Figure 1 is a RMS Noise (10Hz to 100kHz) 20µV RMS 30µV RMS 33µV RMS 0.8µV RMS
typical application and Figure 2 shows Spot Noise (10kHz) 35nV/√Hz 80nV/√Hz 100nV/√Hz 2nV/√Hz
a complete demonstration circuit. The
PSRR at 1MHz 22dB 55dB 45dB 79dB
LT3042’s tiny 3mm × 3mm DFN pack-
age and minimal component require- Minimum PSRR (DC to 1MHz) 22dB 30dB 40dB 77dB
ments keep overall solution size small. Directly Parallelable L L

Designed as a precision current refer- Programmable Current Limit L

ence followed by a high performance Programmable Power Good L
voltage buffer, the LT3042 is easily paral-
Fast Start-up Capability L
leled to increase output current, spread
heat on the PCB and further reduce Rail-to-Rail Output Range L

noise—output noise decreases by the Quiescent Current 30µA 45µA 300µA 2mA
square-root of the number of devices
in parallel. Its current-reference based
architecture offers wide output volt- systems, such as programmable cur- is connected in series with the input. In
age range (0V to 15V) while maintaining rent limit, programmable power good battery backup systems where the output
unity-gain operation, thereby providing threshold and fast start-up capability. can be held higher than the input, the
virtually constant output noise, PSRR, Furthermore, the LT3042 incorporates LT3042’s reverse output-to-input protec-
bandwidth and load regulation, indepen- protection features for battery-powered tion circuitry prevents reverse current
dent of the programmed output voltage. systems. Its reverse input protection flow to the input supply. The LT3042
circuitry tolerates negative voltages at includes internal foldback current limit,
In addition to offering ultralow noise and the input without damaging the IC or as well as thermal limit with hysteresis
ultrahigh PSRR performance, the LT3042 developing negative voltages at the out- for safe-operating-area protection.
includes features desired in modern put—essentially acting as if an ideal diode

Figure 1. Typical LT3042 Figure 2. LT3042

application demonstration
VIN IN LT3042
circuit
5V ±5%
4.7µF 100µA
EN/UV –
200k + VOUT
OUT 3.3V
PG IOUT(MAX)
OUTS 200mA
SET GND ILIM PGFB 4.7µF
450k

499Ω
4.7µF 33.2k 50k

4 | April 2015 : LT Journal of Analog Innovation

 design features

Designed as a precision current reference followed by a high performance

voltage buffer, the LT3042 is easily paralleled to increase output current,
spread heat on the PCB and further reduce noise—output noise
decreases by the square-root of the number of devices in parallel.

1000 9
CSET = 0.047µF VIN = 5V
CSET = 0.47µF 8 RSET = 33.2kΩ
CSET = 1µF COUT = 4.7µF

RMS OUTPUT NOISE (µVRMS)

CSET = 4.7µF 7 IL = 200mA
OUTPUT NOISE (nV/√Hz) 100
CSET = 22µF
6
50µV/DIV
5
10
4

3
LT1763
LT3042 1 VIN = 5V 2
RSET = 33.2kΩ
10ms/DIV COUT = 4.7µF 1
IL = 200mA
Figure 3. Output noise: 10Hz to 100kHz 0.1 0
10 100 1k 10k 100k 1M 10M 0.01 0.1 1 10 100
FREQUENCY (Hz) SET PIN CAPACITANCE (µF)
ULTRALOW OUTPUT NOISE Figure 4. Noise spectral density Figure 5. Integrated RMS output noise (10Hz to
100kHz)
With its 0.8µVRMS output noise* in 10Hz
to 100kHz bandwidth, the LT3042 is the
industry’s first sub-1µVRMS noise regulator. reduces noise below 10Hz. Doing so Increasing SET pin bypass capacitance
Figure 3 compares the LT3042’s integrated essentially eliminates the reference cur- for lower output noise generally leads
output noise from 10Hz to 100kHz to rent noise at lower frequencies, leaving to increased start-up time. But the
that of the LT1763, Linear’s lowest noise only the extremely low error amplifier LT3042’s fast start-up circuitry allevi-
regulator for over a decade. The LT3042’s noise. This ability to drive the SET pin is ates this trade-off. The fast start-up
ultralow noise performance opens up another advantage of the current-reference circuitry is easily configured using two
applications that were previously not architecture. The integrated RMS noise resistors; Figure 6 shows the signifi-
possible, or otherwise required expen- also improves as the SET pin capacitance cant improvement in start-up time.
sive and bulky filtering components. increases, dropping below 1µVRMS with
ULTRAHIGH PSRR PERFORMANCE
just 2.2µ F CSET, as shown in Figure 5.
The SET pin capacitor (CSET) bypasses the LT3042’s high PSRR* is important when
reference current noise, the base cur- powering noise-sensitive applications.
rent noise (of the error amplifier’s input Figure 7 shows the LT3042’s incredible
stage) and the SET pin resistor’s (RSET) low and high frequency PSRR perfor-
Figure 6. Fast start-up capability
inherent thermal noise. As shown in mance—approaching almost 120dB at
Figure 4, low frequency noise performance 120Hz , 79d B at 1MHz , and better than
OUTPUT
is significantly improved with increasing WITH FAST 70dB all the way to 3MHz. PSRR per-
START-UP OUTPUT WITHOUT
CSET. With a 22µF CSET, the output noise (SET AT 95%) FAST START-UP formance is even better with decreasing
500mV/DIV
is under 20nV/√Hz at 10Hz. Note that 500mV/DIV load currents, as shown in Figure 8.
capacitors can also produce 1/f noise,
Unlike conventional LDOs whose PSRR
particularly electrolytic capacitors. To
PULSE EN/UV performance deteriorates into the 10s
minimize 1/f noise, use ceramic, tanta- 2V/DIV
of dB as you approach dropout, the
lum or film capacitors on the SET pin.
VIN = 5V CSET = 4.7µF LT3042 maintains high PSRR at even low
RSET = 33k RL = 16.5Ω
Actively driving the SET pin with either a COUT = 4.7µF input-to-output differentials. As Figure 9
battery or a lower noise voltage reference 100ms/DIV illustrates, LT3042 maintains 70dB PSRR

April 2015 : LT Journal of Analog Innovation | 5

For perspective, trying to achieve 80dB rejection at 500kHz without using the ultrahigh
PSRR LT3042 LDO is a tall order. Alternatives don’t measure up. For instance,
an LC filter would require nearly 40µH of inductance and 40µF of capacitance to
achieve 80dB rejection at 500kHz, adding large, expensive components.

120 120 100

110 110 90
100 100 80
90 90 70
80 80 60 IL = 200mA
PSRR (dB)

PSRR (dB)
PSRR (dB)

RSET = 33.2kΩ
70 70 50 COUT = 4.7µF
60 60 40 CSET = 0.47µF

50 VIN = 5V 50 30
RSET = 33.2kΩ VIN = 5V IL = 200mA 100kHz
40 CSET = 4.7µF 40 RSET = 33.2kΩ IL = 100mA 20 500kHz
30 COUT = 4.7µF 30 COUT = 4.7µF IL = 50mA 10 1MHz
IL = 200mA CSET = 0.47µF IL = 1mA 2MHz
20 20 0
10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M 0 1 2 3 4 5
FREQUENCY (Hz) FREQUENCY (Hz) INPUT-TO-OUTPUT DIFFERENTIAL (V)

Figure 7. PSRR performance Figure 8. PSRR for various load currents Figure 9. PSRR vs input-to-output differential

up to 2MHz with only 1V input-to-output ultralow noise devices like the LT3042 This is peculiarly counter-intuitive—add-
differential and almost 60dB PSRR up to and its load. While the LT3042’s orienta- ing input capacitance generally reduces
2MHz at a mere 600mV input-to-output tion with respect to the “warm-loop” output ripple—but at 80dB rejection,
differential. This capability allows the can be optimized for minimum magnetic the magnetic coupling, which is usually
LT3042 to post-regulate switching con- coupling, it can be challenging in practice insignificant, resulting from moderately
verters at low input-to-output differ- to achieve 80dB of rejection simply with high frequency (500kHz) switching cur-
entials—for high efficiency—while its optimized orientation—multiple itera- rents flowing though this 4.7µ F capaci-
PSRR performance satisfies the require- tions of the PC board may be required. tor, significantly degrades output ripple.
ments of noise-sensitive applications. While changing the orientation of the
Consider Figure 10, where the LT3042 is
4.7µ F input capacitor and the traces
POST-REGULATING A SWITCHER post-regulating the LT8614 Silent Switcher®
connecting the switcher’s output to
In applications where the LT3042 is regulator running at 500kHz with an EMI
this capacitor help minimize magnetic
post-regulating the output of a switch- filter at switching regulator input. With the
coupling, it remains rather difficult to
ing converter to achieve ultrahigh PSRR LT3042 located just one to two inches from
achieve nearly 80dB of rejection at these
at high frequencies, care must be taken the switching converter and its external
frequencies, not to mention the multiple
with the electromagnetic coupling from components, almost 80dB rejection at
PC board iterations it may require.
the switching converter to the output of 500kHz is achieved without any shielding.
the LT3042. In particular, while the “hot- The relatively high input impedance of
To achieve this performance, however,
loop” of the switching converter should the LT3042 prevents high frequency AC
as Figure 11a highlights, no additional
be as small as possible, the “warm-loop” currents from flowing to its input ter-
capacitor—other than the 22µ F at switch-
(with AC currents flowing at the switch- minal. Given that the LT3042 is stable
er’s output—is placed at the input of the
ing frequency) formed by the switcher without an input capacitor if located
LT3042. However, as shown in Figure 11b,
IC, output inductor, and output capaci- within three inches of the pre-regulating
even placing a small 4.7µ F capacitor
tor (for a buck converter) should also be switching power supply’s output capaci-
directly at the input of the LT3042 results
minimized, and it should either be shielded tor, to achieve best PSRR performance,
in over 10× degradation in PSRR.
or placed a couple of inches away from

6 | April 2015 : LT Journal of Analog Innovation

 design features

FERRITE BEAD
VIN
12V 6.8µH IN LT3042
4.7µF//0.1µF NO CAPACITOR
EN/UV
NEEDED AT THE
10µF 22µF//10µF VIN1 VIN2 100µA
INPUT OF THE LT3042
1µF LT8614 1µF IF LOCATED LESS THAN
GND1 GND2 THREE INCHES FROM EN/UV
THE LT8614’s COUT

PGFB VOUT
INTVCC BIAS OUT
EMI FILTER 3.3V
1µF
PG 200mA
MODE BST OUTS
4.7µF
0.1µF
5V SET GND ILIM
PG SW
3.3µH
COUT(LT8614)
1M 4.7pF
TR/SS FB 22µF

1nF Rt GND
0.47µF 33.2k
243k
88.7k

Figure 10. The LT3042 post-regulating LT8614 Silent Switcher regulator

we recommend not placing a capacitor ultrahigh PSRR LT3042 LDO is a tall Additionally, to achieve 80dB rejection,
at the LT3042’s input, or minimizing it. order. Alternatives don’t measure up. these alternatives also require attention to
For instance, an LC filter would require magnetic field couplings. In particular, high
A couple of inches of trace inductance
nearly 40µ H of inductance and 40µ F frequency AC currents must be minimized.
connecting the LT8614 to the LT3042
of capacitance to achieve 80dB rejec-
input significantly attenuates the very Owing to its ultrahigh PSRR over a wide
tion at 500kHz , adding large, expensive
high frequency power switch transi- frequency range, the LT3042 allows lower
components. Costs and board real estate
tion spikes. Some spikes still propagate frequency operation of the upstream
aside, the LC can resonate if not properly
to the output due to magnetic cou- switching converter—for improved
damped, adding complexity. Using an
pling from the LT8614’s “hot-loop.” efficiency and EMI—without requiring
RC filter is untenable, requiring imprac-
Optimizing the LT3042 board orienta- any increase in filter component size for
tical resistance to achieve 80dB rejec-
tion reduces the remaining spikes. Due powering noise-sensitive applications.
tion. Similarly, using conventional LDOs
to instrumentation bandwidth limitation,
require cascading at least two of them to CONCLUSION
these very high frequency spikes are not
achieve 80dB rejection at 500kHz , which
shown in Figure 11’s output ripple. The LT3042’s breakthrough noise and
requires additional components and
PSRR performance, coupled with its
For perspective, trying to achieve 80dB cost, and degrades the dropout voltage.
robustness and ease-of-use, make it ideal
rejection at 500kHz without using the for powering noise-sensitive applica-
tions. With its current-reference based
Figure 11. The LT3042 post-regulating the LT8614 Silent Switcher (a) without any capacitor at the LT3042 input, architecture, noise and PSRR perfor-
(b) with a 4.7µF capacitor at LT3042 input mance remain independent of the output
(a) (b) voltage. Additionally, multiple LT3042s
can be directly paralleled to further
Input Ripple Input Ripple reduce output noise, increase output
10mV/DIV 10mV/DIV current and spread heat on the PCB. n
NOTES
* Proper measurement of noise and PSRR at these levels
requires extreme care and special instrumentation.
These measurement processes will be comprehensively
10µV/DIV 50µV/DIV treated in a forthcoming Linear Application Note.
Output Ripple
Output Ripple

1µs/DIV 1µs/DIV

April 2015 : LT Journal of Analog Innovation | 7