VLSI Design

A report submitted in partial fulfillment of the

requirement for the award of the degree of

Bachelor of Technology
in
Electrical and Electronics Engineering

by
N.Ganesh (Y21EE054)

Department of Electrical & Electronics Engineering

R.V.R. & J.C. COLLEGE OF ENGINEERING
(Autonomous)
Approved by AICTE :: Affiliated to Acharya Nagarjuna University
Chowdavaram, Guntur - 522019, Andhra Pradesh, India
2024
 Department of
Electrical and Electronics Engineering

CERTIFICATE

This is to certify that the report of EE353 Summer Internship entitled

“VLSIDesign” that is being submitted by “N.Ganesh (Y21EE054), ” in

partialful- fillment of the requirement of the Degree of Bachelor of Technology in

Electrical and Electronics Engineering to the R.V.R. & J.C. College of

Engineering isa record of bonafide work carried out by him/her under my supervision.

Date:

Signature of Coordinator Signature of HOD

Dr N. C. Kotaiah M.Tech., Ph.D Dr.K.Chandra Sekhar M.Tech., Ph.D
Professor in EEE Professor & HOD in EEE
BTech (Electrical and Electronics Engineering) Report

Abstract
The VLSI design project encompasses the creation of integrated circuits at the very
large scale iintegration level.It involves the development of custom digital and analog
circuits,layout design,and optimization techniques.
VLSI technology has revolutionized the electronics industry, enabling the develop-
ment of powerful, compact, and energy-efficient electronic devices, from microproces-
sors and memory chips to application-specific integrated circuits (ASICs).

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 Table of contents
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

1 Introduction to VLSI 1
1.1 An overview of VLSI . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1.1 Evolution: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1.2 VLSI design flow: . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1.3 Evolution of microprocessors : . . . . . . . . . . . . . . . . . . 3
1.1.4 scope in VLSI: . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.5 Introduction to verilog: . . . . . . . . . . . . . . . . . . . . . . 4

2 HDL concepts 6
2.1 Structure of verilog: . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.1 coding styles in verilog: . . . . . . . . . . . . . . . . . . . . . . 7
2.1.2 dataflow modelling: . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1.3 gate level modelling: . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.4 behavioural modelling: . . . . . . . . . . . . . . . . . . . . . . 9
2.1.5 Data types in verilog: . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.6 Operators in verilog: . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 Testbench: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.1 Writing a test bench: . . . . . . . . . . . . . . . . . . . . . . . 12

3 Combinational circuits 14
3.1 combinational circuit design: . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.1 Design procedure: . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1.2 Half adder: . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4 Sequential circuits 17
4.1 Flipflops: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1.1 D flipflop: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1.2 SR flipflop: . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1.3 JK flipflop: . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Counters: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.2.2 Asynchronous counters: . . . . . . . . . . . . . . . . . . . . . 20

4.3 System design using FPGA . . . . . . . . . . . . . . . . . . . . . . . . 21

ii
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4.3.1 What is FPGA ................................................................................... 21

4.3.2 Basic FPGA Architecture: ................................................................ 21
4.3.3 FPGA Applications: ......................................................................... 22

5 Conclusion 23
5.1 References: .................................................................................................... 24

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Introduction to VLSI
BTech (Electrical and Electronics Engineering) Report

1.1 An overview of VLSI

VLSI is an acronym that stands for Very-Large Scale Integration.This term refers to the
many fields of electrical and computer engineering that deal with the analysis and design
of very dense electronic integrated circuits. VLSI contains more than a millions and even
billions of devices on a piEEE of silicon(a chip) which is typically about 1 centimeter on

a scale.

1.1.1 Evolution:

• SSI-Small Scale Integration-less than 100 components on a single chip.

• MSI-Medium Scale Integration-less than 500 components on a single chip.

• LSI-Large Scale Integration-components between 500 and 300000.

• VLSI-Very Large Scale Integration-more than 300000 components per chip.

1.1.2 VLSI design flow:

The VLSI design flow provides a structured framework that helps designers navigate
through different stages of the design process, from concept to production as follows:

• Design Idea

• Behavioral Design

• Datapath Design

• Logic Design

• Physical Design

• Manufacturing

• Chip/Board

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BTech (Electrical and Electronics Engineering) Report

1.1.3 Evolution of microprocessors :

• First generation : 4-bit,MP4004,in 1971

• Second generation : 8-bit,8008,in 1974

• Third generation : 16-bit,8086,in 1978

• Fourth generation : 32-bit,80286 and pentium,in 1986 and 1993

• Fifth generation : 64-bit,i3,i5,and i7 in 2010

1.1.4 scope in VLSI:

The field of Very Large-Scale Integration (VLSI) offers a wide range of career oppor-
tunities and has a promising future due to its critical role in the advancement of electronics
and technology. Here’s an overview of the scope in VLSI:

• Design and Verification:Digital VLSI Design: VLSI design engineers work on cre-
ating complex digital circuits, including microprocessors, memory chips, and custom
digital logic.

• Analog VLSI Design: Analog design engineers focus on the design of analog and
mixed-signal circuits, such as amplifiers, data converters, and sensor interfaces.

• Verification Engineers: These professionals ensure that VLSI designs are function-
ally correct by developing and running simulations, formal verification, and hardware
testing.

• Physical Design:Physical Design Engineers: These experts are responsible for the
layout, place-and-route, and physical implementation of VLSI designs to ensure man-
ufacturability and performance.

• FPGA Design: Field-Programmable Gate Arrays (FPGAs) are widely used for rapid
prototyping and digital design. FPGA design engineers create and optimize FP-
GAbased solutions.

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BTech (Electrical and Electronics Engineering) Report

• ASIC Design:Application-Specific Integrated Circuits (ASICs) are custom integrated

circuits designed for specific applications. ASIC designers work on creating highly
specialized, high-performance chips.

• Embedded Systems:VLSI professionals often work on embedded systems, which

combine VLSI designs with microcontrollers or microprocessors to create intelligent,
embedded devices.

• Verification and Validation:Quality assurance and testing engineers focus on veri-

fying the functionality, reliability, and compliance of VLSI designs.

• Research and Development: Researchers explore cutting-edge technologies, mate-

rials, and design techniques to push the boundaries of VLSI capabilities.

• Manufacturing and Semiconductor Industry:VLSI professionals work in semi-

conductor fabrication facilities (fabs) to ensure the manufacturing process meets
quality and yield requirements.

1.1.5 Introduction to verilog:

Verilog is a Hardware Description Language (HDL). It is a language used for describing

a digital system such as a network switch, a microprocessor, a memory, or a flip-flop. We
can describe any digital hardware by using HDL at any level. Designs described in HDL
are independent of technology, very easy for designing and debugging, and are normally
more useful than schematics, particularly for large circuits.

Verilog was developed to simplify the process and make the HDL more robust and
flexible. Today, Verilog is the most popular HDL used and practiced throughout the semi-
conductor industry.
HDL was developed to enhance the design process by allowing engineers to describe
the desired hardware’s functionality and let automation tools convert that behavior into

actual hardware elements like combinational gates and sequential logic. Verilog is like any
other hardware description language. It permits the designers to design the designs in either
Bottom-up or Top-down methodology.

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BTech (Electrical and Electronics Engineering) Report

Bottom-Up Design: The traditional method of electronic design is bottom-up. Each

design is performed at the gate-level using the standards gates. This design gives a way
to design new structural, hierarchical design methods. Top-Down Design: It allows early
testing, easy change of different technologies, and structured system design and offers many
other benefits.

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HDL concepts
BTech (Electrical and Electronics Engineering) Report

2.1 Structure of verilog:

2.1.1 coding styles in verilog:

Coding style in Verilog refers to a set of conventions, guidelines, and best practices that
dictate how Verilog code should be structured and written. A consistent and well-defined
coding style is essential in Verilog design to ensure code readability, maintainability, and
reliability. It also helps to facilitate collaboration among multiple designers and makes it
easier to spot errors and design flaws. Here’s an introduction to coding styles in Verilog
There are three types of coding styles:

1. Dataflow modelling

2. Gate level modelling

3. Behavioural modelling

2.1.2 dataflow modelling:

Data flow modeling in Verilog involves describing digital circuits using a data flow ap-
proach, where you specify how data flows through the circuit and the operations performed
on that data. In Verilog, data flow modeling primarily uses continuous assignments and
combinational logic to represent the flow of data within a design.

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2.1.3 gate level modelling:

• Gate-level modeling represents the digital system using primitive logic gates (AND,
OR, NOT, etc.) and their interconnections. It provides a very detailed, low-level
description of the hardware implementation.

• Gate-level modeling is commonly used for specific components or for representing

how a design is implemented in terms of actual logic gates.

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2.1.4 behavioural modelling:

Behavioral modeling in digital design and hardware description languages like Verilog
or VHDL focuses on describing the functionality and behavior of a digital system or com-
ponent without specifying the low-level implementation details. It provides an abstract and
high-level representation of how a digital system should function. Behavioral models de-
scribe the relationship between inputs and outputs and can be used for system-level design
and high-level simulation.

Here is the simple example:

2.1.5 Data types in verilog:

Verilog supports various data types to represent and manipulate different kinds of digital
information. These data types are used to describe signals, variables, and constants within
Verilog designs.

The common data types in Verilog include:

Scalar Data Types:Scalar data types represent single values (e.g., 0 or 1).
Examples include: bit: Represents a single binary value (0 or 1). logic: Represents a
single binary value (0, 1, X, Z, or unknown).
vector data types:Vector data types represent multiple bits as a single entity.

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Examples include: reg: Represents a vector of bits typically used for register storage.
wire: Represents a vector of bits used for signal interconnections. integer: Represents
signed integer values. real: Represents real numbers.

2.1.6 Operators in verilog:

Verilog provides a variety of operators to perform different types of operations on sig-
nals, variables, and constants. These operators are categorized into different groups based

on their functionality. Here are some of the most commonly used operators in Verilog:

Arithmetic Operators:

• + (Addition): Adds two operands.

• - (Subtraction): Subtracts the right operand from the left operand.

• * (Multiplication): Multiplies two operands.

• / (Division): Divides the left operand by the right operand.

• ** (Exponentiation): Calculates the power of a number (SystemVerilog).

Relational Operators:

• == (Equal): Checks if two operands are equal.

• != (Not Equal): Checks if two operands are not equal.

• (Greater Than): Checks if the left operand is greater than the right operand.

• (Less Than): Checks if the left operand is less than the right operand.

• (Greater Than or Equal): Checks if the left operand is greater than or equal to the
right operand.

• (Less Than or Equal): Checks if the left operand is less than or equal to the right
operand.

Logical Operators:

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• (Logical AND): Performs a logical AND operation on two operands.

• (Logical OR): Performs a logical OR operation on two operands.

• ! (Logical NOT): Negates the value of an operand.

Bitwise Operators:

• (Bitwise AND): Performs a bitwise AND operation on each bit of two operands.

• (Bitwise OR): Performs a bitwise OR operation on each bit of two operands.

• (BitwiseXOR): Performs a bit wise XOR(exclusiveOR) operation on each bit of two

operands.

• (BitwiseNOT): Inverts each bit of the operand.

• (Shift Left): Shifts the bits of the left operand to the left by the number of positions
specified by the right operand.

• (Shift Right): Shifts the bits of the left operand to the right by the number of positions
specified by the right operand.

Concatenation Operator:

• (Concatenation): Combines two or more operands to create a larger vector.

Conditional Operator:

• ?: (Conditional Operator): Provides a conditional (ternary) expression to select one

of two values based on a condition.

• (AND Reduction): Performs a bitwise AND operation on all bits in a vector.

• — (OR Reduction): Performs a bitwise OR operation on all bits in a vector.

• (XOR Reduction) : Performs a bit wise XOR operation on all bits in a vector.

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Arithmetic Shift Operators(System Verilog) :

• ¿¿¿ (Arithmetic Right Shift): Shifts the bits of the left operand to the right, filling
with the sign bit.

• ¡¡¡ (Logical Left Shift): Shifts the bits of the left operand to the left, filling with zeros.

• These are some of the most commonly used operators in Verilog and System Verilog.
They are essential for performing various operations in digital design and hardware
description.

2.2 Testbench:

2.2.1 Writing a test bench:

Writing a testbench in Verilog is an essential part of the digital design process. A

testbench is used to verify the functionality of your design by simulating it under
various test scenarios. Here’s a basic structure for writing a testbench in Verilog:

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• here the below example shows the waveform for halfadder:

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Combinational circuits
BTech (Electrical and Electronics Engineering) Report

3.1 combinational circuit design:

A combinational circuit consists of interconnected logic gates, where the output at

any instant of time is defined from the present combination of inputs only.

This affirms that in combinational circuits the output at any moment depends only on
the present input. This implies that the combinational circuit does not employ any
memory, which further states that the previous state of input does not have any effect
on the present state of the circuit. A combinational circuit can hold an “n” number
of inputs and “m” number of outputs. Through this article on Adders, learn about the
full adder, half adder, Binary Parallel Adders, Carry Look Ahead Adder, BCD Adder,

Serial Adder with circuit diagrams and truth tables.

Simply, a circuit in which different types of logic gates are combined is recognized
as a combinational logic circuit. There are different types of combinational logic
circuits, such as Adder, Subtractor, Decoder, Encoder, Multiplexer, De-multiplexer,
and more. In this article we will cover adders, starting with half adders

3.1.1 Design procedure:

The design of combinational circuits involves the creation of logic circuits that pro-

duce outputs solely based on the current inputs, without any consideration of previous
inputs or internal memory elements. Here is a general procedure for designing com-
binational circuits:

– Problem Statement: Clearly define the problem that the combinational circuit is
intended to solve. Identify the inputs and outputs of the circuit and understand
the desired logic or functionality.

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– Truth Table:Create a truth table that lists all possible input combinations and
the corresponding desired outputs. The truth table serves as a blueprint for the
circuit’s behavior.

– Karnaugh Maps (K-Maps): If the circuit has a moderate number of inputs and
outputs, simplify the logic using Karnaugh Maps. K-Maps help minimize the
number of gates required and simplify the design.

– Boolean Algebra:If the circuit is complex and K-Maps become unwieldy, apply
Boolean algebra rules to simplify the logic equations. This step is especially
useful for large combinational circuits.

– Gate Selection:Choose the appropriate logic gates (AND, OR, NOT, XOR, etc.)
to implement the simplified expressions. Select the gate types that will result in

an efficient and cost-effective circuit.

– Gate-Level Diagram:Create a gate-level diagram to represent the circuit’s logic,

showing how the gates are connected to implement the Boolean expressions.

3.1.2 Half adder:

A Half-adder is an arithmetic circuit that needs two binary inputs and two binary
outputs to perform the addition of two single bits.

The input variable determines the augend and addend bits whereas the output variable
generates the sum and carry. The Half-Adder is a basic building block for adding two
numbers(two inputs) and produce out(two outputs). We can understand more about
the function of a half-adder with the block diagram, Logical circuit, and truth table
of a halfadder as shown below:

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Sequential circuits
BTech (Electrical and Electronics Engineering) Report

4.1 Flipflops:

A flip-flop is a fundamental building block in digital circuits and sequential logic. It

is a bistable multivibrator, which means it has two stable states and can be used to
store one bit of information. Flip-flops are essential for creating registers, memory
elements, and sequential circuits in digital design. There are several types of flip-
flops, including the most commonly used D flip-flop, JK flip-flop, SR flip-flop, and T
flip-flop.

flip-flops are the basic building blocks for creating sequential circuits, registers, coun-
ters, and memory elements in digital design. The choice of which flip-flop to use
depends on the specific requirements of the circuit and the design goals, such as edge
triggering, synchronous or asynchronous operation, and the type of control inputs
needed. Flip-flops are essential components in the development of digital systems
and play a crucial role in storing and processing information in digital circuits.

4.1.1 D flipflop:

The D flip-flop, or data flip-flop, has two inputs: a data input (D) and a clock input
(CLK). It also has one output (Q) and an optional inverted output (or Q’/’Q).

– The D flip-flop stores the value of the data input (D) at the rising or falling edge
of the clock signal, depending on whether it’s a positive-edge (rising-edge) or
negative-edge (falling-edge) triggered D flip-flop.

– D flip-flops are widely used for data storage and synchronization in sequential
circuits.

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4.1.2 SR flipflop:

– The SR flip-flop has two inputs: S (set) and R (reset), along with a clock input
(CLK) and the Q and outputs.

– The SR flip-flop can be used to set (Q = 1) or reset (Q = 0) its output. However,

it is not suitable for syus designs due to the potential for race conditions when
both S and R inputs are active simultaneousl

4.1.3 JK flipflop:

– • The T flip-flop has one input, T (toggle), along with a clock input (CLK) and
the Q and outputs.

– The T flip-flop toggles its output state (changes from 0 to 1 or from 1 to 0) when
the clock input transitions (rising or falling edge) while T is high (1).

These flip-flops are the basic building blocks for creating sequential circuits,

registers, counters, and memory elements in digital design. The choice of which
flip-flop to use depends on the specific requirements of the circuit and the design
goals, such as edge triggering, synchronous or asynchronous operation, and
the type of control inputs needed. Flipflops are essential components in the
development of digital systems and play a crucial role in storing and processing
information in digital circuits.

4.2 Counters:

Synchronous and asynchronous counters are two common types of digital counters
used in digital electronics and digital design. They differ in terms of how they are
clocked and how they operate.

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4.2.1 Synchronous counter:

A synchronous counter is a counter where all flip-flops are clocked at the same time.
The flip-flops are triggered by the same clock signal. This means that all the flip-flops
in the counter change state simultaneously in response to each clock pulse. Syn-
chronous counters are often designed using D flip-flops or JK flip-flops. Advantages
of synchronous counters:

Synchronization: All flip-flops change state simultaneously, making it easier to pre-

dict the behavior and avoid glitches. Simplicity: The design is often simpler com-
pared to asynchronous counters for a similar number of bits

4.2.2 Asynchronous counters:

An asynchronous counter, on the other hand, does not have all flip-flops triggered
by the same clock signal. Each flip-flop in the counter is clocked individually, and
the clock signals for each flip-flop are often derived from the output of the

prEEEdingflip-flop. Asynchronous counters are also known as ripple counters.

Advantages of asynchronous counters:

– Simplicity: Asynchronous counters can be simpler in terms of the number of

logic gates required.

– Lower power consumption: They consume less power compared to synchronous

counters.

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4.3 System design using FPGA

4.3.1 What is FPGA

An FPGA, or Field-Programmable Gate Array, is a type of integrated circuit (IC)

that can be programmed or configured after manufacturing to perform various digital
logic functions or tasks. FPGAs are widely used in the field of digital design and
electronics for their flexibility and reconfigurability.

4.3.2 Basic FPGA Architecture:

FPGA (Field-Programmable Gate Array) consists of several key components that

enable it to be programmed to implement various digital logic circuits. While FPGA

architectures can vary among different manufacturers and families, the fundamental
elements of FPGA architecture typically include:

Configurable Logic Blocks (CLBs):CLBs are the building blocks of an FPGA and
make up the majority of its real estate. They consist of look-up tables (LUTs), mul-

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BTech (Electrical and Electronics Engineering) Report

tiplexers, and flip-flops. The LUTs are used to implement combinatorial logic func-
tions. Flip-flops are used for sequential logic, allowing the storage of intermediate
and final results.

4.3.3 FPGA Applications:

– Home security systems

– FPGA based GPS systems

– FPGA based FFT systems

– FPGA based surveillance systems

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 Conclusion
VLSI design plays a pivotal role in modern electronics, enabling the creation of

highly complex and compact integrated circuits that power a wide range of electronic
devices, from smartphones to supercomputers. This field has evolved significantly
over the years, with the continuous miniaturization of transistors and the integration

of more functionality onto a single chip. VLSI design is at the forefront of techno-
logical innovation, driving the development of smaller, more powerful, and energy-
efficient electronic devices. As the field continues to evolve, designers will face both
exciting opportunities and substantial challenges in pushing the boundaries of what is
possible in the world of integrated circuits. The ever-growing demand for faster and
more capable electronic systems ensures that VLSI design will remain a dynamic and
essential field in the world of technology.