Computer Organization UNIT - 2 II B.

SC [SEM-3]

UNIT-2
CPU and Micro Programmed Control: Central Processing unit: Introduction, instruction
formats, addressing modes. Control memory, address sequencing, design of control unit -
hard wired control, micro programmed control.

Q) What is Central Processing Unit (Introduction about CPU) ?

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2) Explain about Instruction Formats.

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3) Explain about Addressing Modes.

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Part-II: MICROPROGRAMMED CONTROL

Contents
 Control memory
 Address Sequencing
 Micro program Example
 Design of Control Unit
Introduction:
 The function of the control unit in a digital computer is to initiate sequence of
microoperations.

 Control unit can be implemented in two ways

o Hardwired control
o Microprogrammed

Control Hardwired Control:

 When the control signals are generated by hardware using conventional logic design
techniques, the control unit is said to be hardwired.
 The key characteristics are
o High speed of operation
o Expensive
o Relatively complex
o No flexibility of adding new instructions
 Examples of CPU with hardwired control unit are Intel 8085, Motorola 6802, Zilog 80, and

any RISC CPUs.

Microprogrammed Control:

 Control information is stored in control memory.

 Control memory is programmed to initiate the required sequence of micro-

operations.

 The key characteristics are

o Speed of operation is low when compared with hardwired

o Less complex
o Less expensive
o Flexibility to add new instructions

 Examples of CPU with micro programmed control unit are Intel 8080, Motorola

68000 and any CISC CPUs.

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1. Control Memory:

 The control function that specifies a microoperation is called as control variable.

 When control variable is in one binary state, the corresponding microoperation is
executed. For the other binary state the state of registers does not change.
 The active state of a control variable may be either 1 state or the 0 state, depending on
the application.
 For bus-organized systems the control signals that specify microoperations are
groups of bits that select the paths in multiplexers, decoders, and arithmetic logic
units.
 Control Word: The control variables at any given time can be represented by a
string of 1’s and 0's called a control word.
 All control words can be programmed to perform various operations on the components
of the system.
 Microprogram control unit: A control unit whose binary control variables are
stored in memory is called a microprogram control unit.
 The control word in control memory contains within it a microinstruction.
 The microinstruction specifies one or more micro-operations for the system.
 A sequence of microinstructions constitutes a microprogram.
 The control unit consists of control memory used to store the microprogram.
 Control memory is a permanent i.e., read only memory (ROM).
 The general configuration of a micro-programmed control unit organization is shown as
block diagram below.

 The control memory is ROM so all control information is permanently stored.

 The control memory address register (CAR) specifies the address of the
microinstruction and the control data register (CDR) holds the microinstruction read
from memory.
 The next address generator is sometimes called a microprogram sequencer. It is used to
generate the next micro instruction address.
 The location of the next microinstruction may be the one next in sequence or it may be
located somewhere else in the control memory.
 So it is necessary to use some bits of the present microinstruction to control the
generation of the address of the microinstruction.
 Sometimes the next address may also be a function of external input conditions.
 The control data register holds the present microinstruction while next address is
computed and read from memory. The data register is times called a pipeline register.
 A computer with a microprogrammed control unit will have two separate memories: a
main memory and a control memory
 The microprogram consists of microinstructions that specify various internal control
signals for execution of register microoperations
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 These microinstructions generate the microoperations to:

 fetch the instruction from main memory

 evaluate the effective address
 execute the operation
 return control to the fetch phase for the next instruction

2. Address Sequencing:

 Microinstructions are stored in control memory in groups, with each group specifying a
routine.
 Each computer instruction has its own microprogram routine to generate the
microoperations.
 The hardware that controls the address sequencing of the control memory must be
capable of sequencing the microinstructions within a routine and be able to branch from
one routine to another
 Steps the control must undergo during the execution of a single computer instruction:
o Load an initial address into the CAR when power is turned on in the computer.
This address is usually the address of the first microinstruction that activates
the instruction fetch routine – IR holds instruction
o The control memory then goes through the routine to determine the effective
address of the operand– AR holds operand address
o The next step is to generate the microoperations that execute the
instruction by considering the opcode and applying a mapping process.
 The transformation of the instruction code bits to an address in
control memory where the routine of instruction located is referred to
as mapping process.

o After execution, control must return to the fetch routine by executing an

unconditional branch
 In brief the address sequencing capabilities required in a control memory are:
o Incrementing of the control address register.
o Unconditional branch or conditional branch, depending on status bit conditions.
o A mapping process from the bits of the instruction to an address for control
memory.
o A facility for subroutine call and return.
 The below figure shows a block diagram of a control memory and the associated
hardware needed for selecting the next microinstruction address.

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 The microinstruction in control memory contains a set of bits to initiate microoperations

in computer registers and other bits to specify the method by which the next address is
obtained.
 In the figure four different paths form which the control address register (CAR)
receives the address.
o The incrementer increments the content of the control register address
register by one, to select the next microinstruction in sequence.
o Branching is achieved by specifying the branch address in one of the fields of the
microinstruction.
o Conditional branching is obtained by using part of the microinstruction to select
a specific status bit in order to determine its condition.
o An external address is transferred into control memory via a mapping logic circuit.
o The return address for a subroutine is stored in a special register, that
value is used when the micoprogram wishes to return from the subroutine.

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Conditional Branching:

 Conditional branching is obtained by using part of the microinstruction to select a

specific status bit in order to determine its condition.
 The status conditions are special bits in the system that provide parameter
information such as the carry-out of an adder, the sign bit of a number, the mode bits
of an instruction, and i/o status conditions.
 The status bits, together with the field in the microinstruction that specifies a
branch address, control the branch logic.
 The branch logic tests the condition, if met then branches, otherwise, increments
the CAR.
 If there are 8 status bit conditions, then 3 bits in the microinstruction are used to
specify the condition and provide the selection variables for the multiplexer.
 For unconditional branching, fix the value of one status bit to be one load the
branch address from control memory into the CAR.

Mapping of Instruction:
 A special type of branch exists when a microinstruction specifies a branch to the
first word in control memory where a microprogram routine is located.
 The status bits for this type of branch are the bits in the opcode.
 Assume an opcode of four bits and a control memory of 128 locations. The mapping
process converts the 4-bit opcode to a 7-bit address for control memory shown in
below figure.

 Mapping consists of placing a 0 in the most significant bit of the address,

transferring the four operation code bits, and clearing the two least significant
bits of the control address register.
 This provides for each computer instruction a microprogram routine with a capacity
of four microinstructions.

Subroutines:

 Subroutines are programs that are used by other routines to accomplish a

particular task and can be called from any point within the main body of the
microprogram.
 Frequently many microprograms contain identical section of code.
 Microinstructions can be saved by employing subroutines that use common sections
of microcode.

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 Microprograms that use subroutines must have a provision for storing the return
address during a subroutine call and restoring the address during a subroutine
return.
 A subroutine register is used as the source and destination for the addresses

3. Microprogram Example:
 The process of code generation for the control memory is called microprogramming.
 The block diagram of the computer configuration is shown in below figure.
 Two memory units:
 Main memory – stores instructions and data
 Control memory – stores microprogram
 Four processor registers
 Program counter – PC
 Address register – AR
 Data register – DR
 Accumulator register - AC
 Two control unit registers
 Control address register – CAR
 Subroutine register – SBR
 Transfer of information among registers in the processor is through MUXs rather
than a bus.

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 The computer instruction format is shown in below figure.

 Three fields for an instruction:

 1-bit field for indirect addressing
 4-bit opcode
 11-bit address field

 The example will only consider the following 4 of the possible 16 memory instructions

 The microinstruction format for the control memory is shown in below figure.

 The microinstruction format is composed of 20 bits with four parts to it

 Three fields F1, F2, and F3 specify microoperations for the computer [3 bits
each]
 The CD field selects status bit conditions [2 bits]
 The BR field specifies the type of branch to be used [2 bits]
 The AD field contains a branch address [7 bits]
 Each of the three microoperation fields can specify one of seven possibilities.
 No more than three microoperations can be chosen for a microinstruction.
 If fewer than three are needed, the code 000 = NOP.
 The three bits in each field are encoded to specify seven distinct microoperations listed
in below table.

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 Five letters to specify a transfer-type microoperation

 First two designate the source register
 Third is a ‘T’
 Last two designate the destination
register AC ← DR F1 = 100 =
DRTAC
 The condition field (CD) is two bits to specify four status bit conditions shown below

 The branch field (BR) consists of two bits and is used with the address field to choose
the address of the next microinstruction.

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 Each line of an assembly language microprogram defines a symbolic microinstruction and

is divided into five parts
1. The label field may be empty or it may specify a symbolic address. Terminate with
a colon (: ).
2. The microoperations field consists of 1-3 symbols, separated by commas. Only
one symbol from each field. If NOP, then translated to 9 zeros
3. The condition field specifies one of the four conditions
4. The branch field has one of the four branch symbols
5. The address field has three formats
a. A symbolic address – must also be a label
b. The symbol NEXT to designate the next address in sequence
c. Empty if the branch field is RET or MAP and is converted to 7 zeros
 The symbol ORG defines the first address of a microprogram routine.
 ORG 64 – places first microinstruction at control memory 1000000.

Fetch Routine:

 The control memory has 128 locations, each one is 20 bits.

 The first 64 locations are occupied by the routines for the 16 instructions, addresses 0-
63.
 Can start the fetch routine at address 64.
 The fetch routine requires the following three microinstructions (locations 64-66).
 The microinstructions needed for fetch routine are:

 It’s Symbolic microprogram:

 It’s Binary microprogram:

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Q) Explain about design of control unit ?

Ans: - A control unit drives the corresponding processing hardware by generating a set of signals
that are in sync with the master clock. The two major operations performed by the control unit are
instruction interpretation and instruction sequencing.

The main function of a control unit is to fetch the data from the main memory, determine the devices
and the operations involved with it, and produce control signals to execute the operations.

Types of Control Unit: -There are two types of control organization that are as follows −

1) Hardwired Control: -
In the hardwired organization, the control logic is executed with gates, flip-flops, decoders, and
other digital circuits. It can be optimized to make a quick mode of operation. In the micro-
programmed organization, the control data is saved in the control memory.

The control memory is programmed to start the needed sequence of micro-operations. A hardwired
control requires changes in the wiring among the various elements if the design has to be modified
or changed.

The block diagram of the control unit is displayed in the figure. It includes two decoders, a sequence
counter, and several control logic gates.

Some instruction that is read from the memory is placed in the Instruction Register (IR). Therefore,
the IR is divided into three elements such as I bit, opcode, and bits from 0 through 11. The opcodes
are decoded with a 3 * 8 decoder whose outputs are indicated by symbols D0 through D7.
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The binary value of the respective opcode is the subscripted number in the symbol. The symbol I
which is the 15th bit of the instruction is transferred to a flip flop. The control logic gates have the
bits that are used from 0 through 11.

The sequence counter is 4-bit counts in binary from 0 through 15. It can be incremented or cleared
synchronously. The timing signals from T0 through T15 are the decoded outputs of the decoder.

2) Microprogrammed Control: -
The microprogrammed control stores its control data in the control memory. It can start the
important set of micro-operations; the control memory is programmed. The changes and
modifications in a micro-programmed control can be completed by upgrading the microprogram in
the control memory.

The figure displays the general configuration of a microprogrammed control organization.

The control is pretended to be a Read-Only Memory (ROM), where all the control data is saved
permanently. ROM supports the address of the microinstruction. The other register is the control
data register that stores the microinstruction that is read from the memory. It includes a control
word that holds one or more microoperations for the data processor.

The next address should be evaluated during this operation is done. It is evaluated in the next
address generator. Therefore, it is transferred to the control address register to be read. The next
address generator is referred to as the microprogram sequencer. It depends on the inputs to a
sequencer; it decides the address of the next microinstruction. The microinstructions can be
determined in different approaches.

END OF THE UNIT- 2

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