UNITED INTERNATIONAL UNIVERSITY (UIU)

Dept. of Electrical & Electronic Engineering (EEE)

Exam: Final, Trimester: Fall, Year: 2023
Course: EEE 2101, Title: Electronics I
Full Marks: 80, Time: 2 Hours

Instructions (Please read carefully)

 There are 2 (two) sections. Answer any 1 (one) question from section A. Answer
all 3 (three) questions from section B.
 Answer all sub-parts of a question successively in one place.
 Figures in the right-hand margin indicate the respective course outcome (CO) and
full marks.
 All symbols have their usual meanings.
 Any examinee found adopting unfair means will be expelled from the trimester /
program as per UIU disciplinary rules.
Good Luck!

Section A
(Answer any one)

1.
VDD = 5.2 V

Figure 1

a) The NMOS transistors in the circuit of Fig. 1 have 𝑉𝑡 = 0.8 V, 𝜇n𝐶ox = 120 𝜇A/V2 ,
𝜆 = 0, and 𝐿1 = 𝐿2= 𝐿3 = 250 𝑛m. Find the required values of gate width for each of
𝑄1, 𝑄2, and 𝑄3 to obtain the voltage and current values indicated. [C03=10]

b) Neatly draw the current flow in an npn bipolar junction transistor (BJT) biased to
operate in active mode. Using this picture explain why the doping of the emitter is
made much higher than the doping of the base. [C01=10]
 2.
a) For a particular IC-fabrication process, the transconductance parameter is
𝑘n′ = 48 𝜇A/V2, and 𝑉t= 0.8 V. In application in which 𝑣GS = 𝑣DS = 𝑉supply = 5 V, a
drain current of 0.8 mA is required for a device of minimum width of 2 𝜇m. What
value of channel length must the design use? [C01=10]

b) Neatly draw the current flow in an npn bipolar junction transistor (BJT) biased to
operate in the active mode. Using this picture explain why the base is made very
thin compared to other regions (emitter and collector). [C03=10]

Section B (Answer all the questions)

3. Rowan Atkinson, the actor who plays Mr. Bean, is also an electrical engineer. He writes a
plan for a Mr. Bean episode- “Bean pushes a switch ON, and the light turns OFF. He pushes
the switch OFF, and light turns ON. Audience laughs.”
[C01]

a) In logic terminology, write the name of the circuit that Rowan requires for the plan. Draw
the circuit using transistor, voltage source and resistor. (No need to draw lights, just show
output voltage terminal by V0, input voltage by Vin=5V, and any other required source by
appropriate value. No need to mention resistance values). [2+6]

b) Sketch the transfer characteristics (v0 against vi) for Rowan’s circuit, showing coordinates
where the curve cuts horizontal and vertical axes. (Threshold voltage Vt = 0.7 V). [4]

c) Shade the regions of the transfer characteristics you drew in Q3(b) to indicate which
regions Rowan should use for his plan. Name the regions. [4]

d) The sound system in the studio gets destroyed in an accident, and Rowan needs an
amplifier for his voice signal. Explain which region of transfer characteristic Rowan should
use for the purpose and why only that region is suitable. Also, what is the precaution needed
for proper amplification? [4]

4. Nabil Ahmed’s teacher gives him a circuit (Figure 4) and tells him to do dc analysis.
Trouble is, he has never seen such an arrangement before, and he is in panic seeing multiple
capacitors.

a) State what is done to capacitors in dc analysis and why? Taking into account what you
stated, draw a simplified version of the circuit in figure 4 for Nabil. [C01=5]
b) “My teacher says that in active mode, the emitter-base junction is forward biased and
collector-base junction is reverse biased. In reverse bias, current is zero. Why would we need
dc analysis?” Nabil wonders. Explain to him how current still flows through reverse bias
region in an n-p-n BJT. [C01=3]

b) Determine Vc , VB , IC and IB (where these are collector voltage, base voltage, current into
collector and current into base respectively). Assume threshold voltage of 0.7 V for Base-
Emitter junction. [C02= 12]

Figure 4

5.

Figure 5
Dr. Ilham has been provided a common-source configuration arrangement of NMOS. She
also has the following biasing data: 𝑉DD = 12 V, 𝑅G1 = 200 kΩ, 𝑅G2 = 100 kΩ, 𝑅D = 7.5 kΩ,
𝑅S = 3 kΩ. NMOS parameters are: 𝑉𝑡 = 1.5 V and 𝑘𝑛’ = 0.5 mA/V2 , W= 10 nm, L= 5 nm.
Consider 𝑅sig = 10 kΩ and 𝑅L = 5 kΩ. [C02]

a) Find 𝑉G, 𝑉S , 𝑉GS, 𝑉D, 𝑉DS. Is the NMOS operating in saturation mode? Calculate 𝑔𝑚.
[10]

b) Find 𝑅in, 𝐴vo, 𝐴v, and 𝑅0 without channel length modulation taken into account.
[6]
 c) Find the overall small-signal voltage gain 𝐺v without channel length modulation taken
into account. [2]

d) Dr. Ilham’s assistant, Fahim, asks “Madam, if I put 5V dc as vsig then I should get an
amplified dc output, right?” Comment on Fahim’s query. [2]

Table 1: Description of CO’s

COs Description Corresponding POs

CO1 Explain the behavior and functionality of basic electronic PO1

devices as well as circuits containing these devices.

CO2 Apply the concepts of basic electronic devices (diodes & PO2
transistors) for analyzing electronic circuits.

CO3 Apply the concepts of basic electronic devices (diodes & PO3
transistors) for designing / constructing various electronic
circuits to meet specific requirements.