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Midterm COA Oct 2023 - SET A

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32 views10 pages

Midterm COA Oct 2023 - SET A

Uploaded by

inourall00
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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KING FAISAL UNIVERSITY

College of Computer Sciences and


Information Technology (CCSIT)
Department of Computer Engineering

Mid Exam
CE 313: Computer Organization and Architecture
First Semester, 2023-2024
th
(Exam date: 10 of October, 2023)
Total Marks: 20 Total Time: 60 minutes

Student ID Name Section


Student Specialization (please select your ● ● ● ●
● CE
specialization) CS CIS CN General

(Please do not write in the table below)

Question 1 2 3 4 Total Final


Max Marks 5 15 4 6 30 30/1.5=20
Marks Obtained
Set A
Instructor Course Coordinator
Dr. Tassadaq Nawaz Dr. Tassadaq Nawaz

Instructions to Students

- Understanding the question is part of the examination.


- This paper consists of Page 9 pages including the cover page.
- During an exam, you must not have in your possession, mobile phone, smartwatch, book, notes, paper,
calculator, pencil case, or other electronic devices/item which has not been authorized for the exam or
specifically permitted. Any material or item on your desk, chair or person will be deemed to be in your
possession. You are reminded that possession of unauthorized materials in an exam is a discipline offence
that will be reported to the university's disciplinary committee to decide the appropriate punishment.
*I confirm the compliance with all the rules and regulations of the examination.

Signature of the student:_________________ Date: 10 /10/2023

Question 1: Circle ONE choice only for each of the following Multiple-Choice Questions.
(5 Marks)

1. Output register is a/an _____ bit register.


a. 8
b. 10
c. 16
d. 32

2. R3←R1+R2’+1 is equivalent to:


a. R3←R1+R2
b. R3←R1-R2
c. R3←R1’
d. Both a & b

3. What is computer organization?


a. structure and behaviour of a computer system as observed by the user
b. structure of a computer system as observed by the developer
c. structure and behaviour of a computer system as observed by the developer
d. All of the mentioned

4. If R1 contents in binary is 01011001, then the content of R1 after executing the following
micro-operation is:
R1← CIL R1
a. 10110010
b. 01100111
c. 11011001
d. 10110011

5. This computer instruction (1110110001101110) refers to:


a. Direct memory reference instruction
b. Indirect memory reference instruction
c. Register reference instruction
d. I/O instruction

6. Let us consider R1=10101010, and ASHL (R1) is performed three times then the R1 has the
contents of _____.
a. 01010000
b. 10101010
c. 00000000
d. 10101000

7. The control signals are generated in the control unit and provide control inputs for the
a. multiplexers in the common bus
b. control inputs in processor registers
c. micro operations for the accumulator
d. All of the above

8. _____ perform bit manipulation operations on non-numeric data stored in registers.


a. Register Transfer Microoperations
b. Arithmetic Microoperations
c. Logic Microoperations
d. Shift Microoperations
9. Considering the general formula for arithmetic unit D = A + Y + Cin , the value of Y and Cin
respectively if we want to perform Subtract operation would be Y=____,and Cin=____

a. B, 1
b. B, 0
’,
c. B 1
’,
d. B 0

10. The transfer of new information to be stored in memory is called a ___________________


operation.
a. Memory transfer
b. Write
c. Read
d. None of above

Question 2: Answer/Solve the following questions briefly.


(15 Marks)

1. Draw and briefly explain the three Basic computer instruction code formats.
[3 Mark]
******************************
2. Which arithmetic shift operation results in an overflow? What can be used to predict this
overflow? Support your answer with a diagram.

[3 Marks]
3. Draw the control unit of the basic computer and label as well as explain each component
with their corresponding signals clearly.
[4 Marks]

4. A digital computer has a common bus system for 16 registers of 32 bit each. The bus is
constructed with multiplexers.

a. How many selection inputs are there in each multiplexer?


b. What size of multiplexers are needed?
c. How many multiplexers are there in bus?

[3 Marks]

******************************
5. Explain the direct and indirect addressing with an example. What is an effective address?
[2
Marks]

Question 3: Draw a timing diagram assuming SC is cleared to 0 at


time T3 if control signal C7 is active. (4
Marks)

C7T3: SCß0
Question 4: Having a digital System that has 4 Registers (A, B, C,
and D) each of 4-bit size. Implement the Bus Circuit using three-
state buffer gate that Selects any ONE of them to be provided as an
input to any other circuit.
(6 marks)
Exam Attachments

Page 8 of 9

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