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DSD (Imp!)

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0% found this document useful (0 votes)
38 views25 pages

DSD (Imp!)

Uploaded by

pp63933001
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Unit

rt.
w . Eplain charatteniste odigiht
Atr Spa Operahie
RPower diuibatie
figuwe mevit

Fan osf
Fan in

Cnent
and veltna parameter.

Neise Immut
operatir Temperatwhe vange

Aigital tkt
Operatien speed o a

Speed o dela
delay.
Ppopagatiem
n tems, o time
expreed
defined al the
the ime
deind al
delay
The
popagatiem
gate to tharge afte
charge
d owtput o
the
token o,we ma allo 4ay t
kavd chang
he inpub t r the
he
arae ranuion delay Hime wht
wheh h e
tha
from tlr
t P
Mgnal t propaaate
change value.
Hgna
veltage Jeve 4P
Iti mealwued bjo so
Delay

Jouc

PLH PHL

PLH propagatien delay hime


r o gi logical o)
H t H ( i state)
oAtah) to Logical

Preagatiem Delay Hme


n qairg Irm
PHL
wig wgic to An o r

Poen Diaipatiom
t powe cosumd he

VeexT{
Prwen D'ssipatiom milths

0 e toke the o bt curnensb/e


averne
dupatim depedu,
m th duky cele
duy yele
the power
eyele
yele
avd generally Apecified. f a duty

Vee x Jee (a3


fcowy)
ou qates, the the pove
POUen
an Te kal
r poted
wilt be iown fime the pouea di
dimipated
by a gate
Figune oMeut ItJA effneoa he produuf

A p e a ound poden
eet Apeu fid nin
Apeufiad
termu
terma oo
Apeed o Avget
The
A #t the qwe omei
prop qatien delay milli wats.
Apeiid in Pouwe
Popagatien
delaX
delay X Powe
mehit =
gure o

fan ou
maaimum number oimian logic
Fan out the
can dive witati a
gate
gatek a t
a

in voltaae evels
degradin need for
neeod
aduantageous bfeihe
High fanout iA Mess
o dive mnt gate-
duveu
additonal

wben'
gate i he
fan in- fau
Fan .oa degradate
without a.
tenheted
oa pate
voltoge evel copabilitie
unutf e n t copakilHe
deemines
he funutfoa
paameter
Th

o aae
tu P NAND 4at,
Ayooehresents
For exa iu
fan- in 790
henefeve

:
farameter
Curren ad veltage

paramete7 ae vy imforta
Culrent and veltage
a digital ten
n
in deignirg
To

VoH
Hg
ToL

O
VoL
Law

cwvu vetage in two lotic tate

NoiAe mmunty (0 Naise Mangín

Naise iuntoantea ignal veltage aum al


eniutE, a glitthes
veltage at theiP a
ThiThi may CouuAe the
V4 iae above
elouo
ogic ckt to duw
produute tundeuired operation
VL aolmay
s he maximum Naise veltoge
Noise Tmmunity
hat mo afpea_at the i a logi gak
tate oik
without thanqin he Jogical

Noise mangin i he quanthity meaue

noibe immumtyy
dogt 1
Logit 1
Vi
VH

Logi D Volma) Loie

FIae ofp els fr nait)

Satat 1 nese mag VoH -IH


LState o ride mein - Voi

Operati Temperatut-

deuice
ae emiconduutr
ALl Ict
I gate
Aumitie
Amitie n a hahUe
tu
aHeempesatwn

The opeatíng
They ragei e a n
I
enpxratue,
The ' C o + 7 0 C o m u m ê r

ya *
aplicatfonk
.

industrial
and
-95 ° to t12
ycigo re
Temperatwe
militarey applicato
TTL totem pale opew
As . Descube

catletr

TTL totem Pele op-


Bame
Bame aa
the
the
wth totem-poe, ofpi
TTL gate except fa
he traistr
trnutt
4

collet gate
he open

Ty anol the diode D


shosem in ig. 3.1 t kal
totem pole oP i
The to ui
A it
t the alutpuk to
tranaskor
Aeparate he
he LDw
Lbw 3tate (Ti).
34ate (T
TY) ad
atate
HIAH
the
ane
Auitrhe4 t h e phae phale
transisters
Thele ON att
ON ata a
enswnes ne othem i
Aplttten
Apttten
a d I oL hever low
the wwmut Ion
time
m ultaneouty
ad D
clet censhíva Ty
The pott o h e
en
external aa
heplatel he
and the 130 nesistord
dntted ine
hasn 3.19 b
pele odtput o
utput over
the otem
advantoger ctae
fhe
Th e an that i t
cah'

colletor 0utput i
the ope Tokm pole
a t e falkr arange metir

16k 130
Toni
i.1
A Stand ard TTL
VgE NAND

ToL 9ate
B
TTL Oben Colletvr Ouput Gute

olke ctor
eollectr output o TTL o/p hen the
open
roa out
otheLOw
Aate oP tanuist
directy t the P pin.
HTH ate
HTGH op. rciruihy.
*ate ojr. ui
no built -in
There
There
colledtor
m open
which allaas yo
convert4uthou possible olamoge
poslble olamage:
op & to be
djede mate up the ckt o
tranistor T
The heu n ig
9ate al
the TTL NANd
abot - 03 V,
- than abot -03 ,

1the 1P goes m ejtecHvely


aht
dicde uill codut
he voltage idr*t
idrof
the P ground plul voltage
uruiti
atrss a diode.

wuu operate
wthout the
Collectr TTL
The ope Cohheutd
ohhettd oJo he
the
wheh JE
n e ttor het
althmough Haiu
ecterral

her
TTL gate
o because o he
Row nhe immurty

o the
etommeded

he ofp the
heofp
extvral nesiston
an
uithout
tet when t, öef
oil bi an epen
gaf illtaue
ra

it colletor
T mdutts,
ip he
ip ohe
when supplied
the
Cuwneak path
Path
9a
9ietator

Joadin ate
fwiough Vic the
eotlector T
to the
temnered
Vce5V

Eterral
Resistor
4

A L T
T3

ckit..
H.Tvo Ip TTL open a l e t r op

Qu EL (Emitter Coupled Lagi ekt


A -(1) A tur -ip EL op| NDR galt is zhour

whith. ane Complemu


t ha tuv olp
othe. Trani'stors. 2
ard &1 fom
oea
o
dierential ampeiier, Tani'st A ard
g
a
1e inpanallel..
emtter tlousers
emttertollowsert
Ay ad Qr
ane
8Transistort het
the ame a
ane
wwose emiter veltage emtter
bae to
(N Pan b.8 V
bale veltagel
dop).
*ransistors ad a2 ad
apli
aprlid
ane o
oith lostant-1-3V
tramiste 6, upplied
L
Vc2

+3
-

VEE
A A+B

NEE
TranstrA
oPA
1 A+B
A
OFF OFFON ON OFF
OFF ON FF| OFF.ON
ON
FF OFF
ON ON
oN

osNAND QudNoRt

dvantagel o F
famil
Thiu ii utut Lugi
u) Leuoet propagatiem
delay (i msec)
div uig 4an out
dwuna aathina
trunis
No
0No umut spikes
Disadvantagek o f E -

tiSD mNJ.
d This as oro note mangin
powedissipatiem.-(y0 mul)»
i) High
-e AuTpby veltage avd Lage' devels roke it
ECL to TTL CMOS
auwkwd o intrfate

CMos AANP a Nop gated?

A CMOS NAND Crate

ACMos NGN9ate with two, ilPA alsv e i


the argement o the complemevtay pai^
- channe! MOJ PET) zleie ini'.
N- ehannel ad
a
operaiei othe CMOS NANP gate,dA
The
The
folloss
a1e
Ca 1: when both Low avd ,
i|P3, a
ON aro aa ard a4 aye 0FFThe or ipulles
H on esistance o G1. and d2
n
in l.
HI thhough
Cae
Cae- when i|P A LON aid k B aHrA
ON, a A ad &3.
n
ale of
ad y ae

pulled HTuH hous the


the or
ecestanee
LoN, & a
ilP
when A HTCH 9nd ir B
Cale 3- The of
ane oN
&y oe
OFF a a As =
e Heistante o
ib pulud HICH huougl. he
ame HrGH E a2 ane
Cey- when both i|9 the
ONin hia cale olr
OFF ar , ¬ y ane

LON ho ugt the en 1eutance o A ad


pulled
Godud
in Aurnes
y
N-
NN MoS

PMDS
PMOS Y A-B
VpP

A3
A
NHOS -o

NMS
Bo- B

J P P chamel
MOFETs oPY
PMDS N MOS
A
|Lw ol L o oN ON OFF FF

L H"'g | ON OFh off ON

OFP ON
Hi Lo
OFf ON
ON
NOR ate
MOS
wA wo iPA ahouon in fia_he
CMOS NoR
NOR 9ate
gate iA as folo ts
:
a CMos NoR
operatiom o
ane Dh,A, d 2 dne ON, AQ,
when bath PA
Cale HrH thougt
The op i pulle
and ay ane off,
neséstante o ard 2 in eies
on

B HraH, A,4 A,
Cae2- When beth; A i Low ard iP
ane oN a i82 4 ane or., The o/r is
LON tHuougl.jan esistane y
pulled
Cae3- Ohen ilp A H ÍGH avd i/p B LOW &1 4 2

pull
ane La, and.a ane ON.The ofp
OFF ,

LON throug an jeistane o


Cakey- When both ips ajte HItH, A, a G2
e ON In his coe the o/P i pulled
ad ay inin
LO oug the n neistante o
paallel to goud.
Ves VD

A
A
,PMos

f A+T

8,CNMOS)
H
L tNHos)

P off-
Nma
MOSFEIS
PMOS NMOS P

N
ON OFF ON 6FF

OFF ON oFf ON

OFF0N 0N
f

Quus fLAPL POA


Prd: PLA (Programable ogi Amay)-
with povgsQmable
It iivel ehiteetwte Jogi deulce
AND gate ad programable O gate
Step to Poogsam PLA
u teble
4rpm
Stp) An boakean fun cfom

|AB C

-map
A 00

ACtB

-mapfor 9
A

oCD.
buftont
rno. of ilp
Sep
Step2-Jdentify,

we ned
input vaniable! So,
we h a three
No. o input bu}les :3

Step3Impimentatío obooBean tunchíom in PLA

1
-2

PAL (Pograäble Aray Legi )-


PLA
It most ommonly wed
t a pogrammable ND gates ad Hxed OP 9ate

Fixe oR gat

It puide linpe a l issuesgardia


ucwe
mibiuy
X
X
m (2, , 6,1)
2,5) n
Y: Em (o,,
2:2m ( , 6 ,1)

- map erv

'.

7 AB4 AEC
:B

A
B

B -
huh indue

.
Cnate Array
PGA Hel froqrammablee

opacity PLD Proqrammaklee Joe


Joait
FPGHA iz FPA had h e ab.1
device). The gate
array o abliky
a untfon y
funton the
he
progvamme,4r
o be euce
manufatwie
odeute.
instead the
conaita t h t e conizurable Praraablk
FPuR bloces
Logie
(LMA): wntígunable Aogi
module
Logie blok and witdira
matix fr
CcLB), IP ard olP
intertonn euien
Consts sa combínatioval ogke ana,
3The (LB ad 4up--tlops The cmbinatieal
data multiplexen MUX)
funtiom i pnfomes b ook- up tabte (LUT)
awo

Structune oFfnA:

Proqra mmable Joie utun


fopgrammable uouli rutune
)
ci ProgsammaajeP P
iv Conigurable logi bloce H9-ograwmable u
eld prvgrammalelt
Logi* module
VerHcal
ADg.anma (FPnA)
Chan nel

Pogremmah
Hovi zontal
rol chan ne
Lltome'gunble lote BloceCL
Saultc bo

Hoizouh
Cannetion
verhcal chrel.onnatw,
PLA (Vs PAL

PAL PLA
A A exPemie a r PAL a
is moderately expenslve |OPROM alhd
It Compucated to wwe-
a r moderately tomplicated
aid OR
AND In' ,
bcth, AND
the paog rdmmab/e
I n his, enly of
array àrt

A programmaub,
ara
array i ixed. complidteto pga
AND and oR
Po gram be taune o he
I t i s eajer
he ANP gakeK ge
gatel ae progra vabte
because onby
Har
mot Hlex ble
pooyrammabte.
to t is
due
It esA lezibMe PAL
ised oP gahe

P Ror PLA

PROM PLP
of oays
a B t h AND ad
AD a Hixed ae progrdmmalole.

14 progrmmable
OR array a Hha
eompBex a jn
Cosu'est
ad tomplex
unple to we |
Chenper avd PAL Od PROM

mntum wr ávray Can be


) A A Nprvrammed
D get deurd
deuoded
An nutt
booltan funtHeM dn Sop
ny funute
tadard soP 4orm can A y Btclean
i m p l e m e n t d

Can be
de ptemented Uy fosm

PROM
PPL
ANP am 4 programrmable
OR ayrdy ,Ped a
Cheaper ard umplee

a be r gam me 9et
AND aray ta
ANp
esu'red minterm

n Sof frm, tan be


Brolean, unthons
Any
inplimankd usíy PLA

Unit.5

op -emp
au )-wite deon daraitnite jdeal
"equatir Intigator

diagodm o d cal o-am


The eqtvalent ttr

V Ay

Amatanttarackensti es oQn jdl P-a


The
an a folowa
-
he t A

onl y th

h enl I a n e metye
nu itan
l
a n denl Am il
1he i/r stan

r
istane P,0)
ev or
Hane
he
YYstane o opanp
he r
viewed dea Amp
mp ee
-
van a n dea
/r
h
ee oflset vultage. uhei
o/r whe
wh'th pouluied ah,the
The reltage
e alled oli1ut
voltaget (,: V, o) a
ellh i
ve tage
J n t i n d t e Faduidih
1he ragefrauener
amblidiY d
Bandudtk oah sequent'ok arle
arne amplifiet
avplified
stauentiek
i
wki al he igw
wY
WY

al s t 0qually
deal op avp

he tavduidt a
Intinit CMRR

ahiity oop-Amp
to
the
The CMRR the
uceBbfby
eut eom mom mode g a

CMR Av
C
CMPR
MRR 0
ldeal op-Amp
r an
a

Az0

rahe Cs z )
nite Ste
the mexi num Aate
Sewate deined a
Pveltage. with time e
o range

a
deal oP - nmp
S

at PSRR -o)
u p p rejesH om
Z
Zee powe he
wht Apeui
Apeuis
Parameter wh
mp ror
a
PSR op- Amp
the p-
the
odepenhdence o
degre Appdy veltoge
in power
the hanges D
PSRR
ddeal op- an
do
go et
that the P viltaye
viltage
Th'Ameans
t utuatt on in supply
change due
vutage
Qu P-2 lasder D/ P cemventer.

er Ja1ew'ste nw
-2RAaod vlue ad
w wo neus
Cortais omly
22
a a 3Catli t
t a OP A
wlth
i/P
uiglt an L S
towardu
MSB P
Jet the ckt

t u l t diagram

2
2

D A
MSB
(LsB)

du'gtad ilr 1 A3 CD= IOo0


Suppone

w
M

2 24 2
C A
b
-MA
Vin
2R
2

+ V

3 Vol*r du'lo de
V 22

Vin:

A BCD : Dl o
SuppoAe digultal P
ww
w

2 22 22
+v
B
1

2P 2 2
V
voltaa divla

Vw V x 2

2
P
Vi Y E
S lary

ABCO. oo| D, the Vi :


Vin
whe
whe PBCO 0 o o | , he Vin= V

The r o D A Cwmnrter Ce be caltulattad

ui 3um ampiter eqaíon.

Sinu, V: , :v :

Vo -

22 23

062

Advantagei
to build acturately a my two pe e
Eaier
nereauired
metal ilm ne4shr mone

Caa exaded addige m


by addig.
Numbes o itf
Aeutiens. oAame e /2f vaue emayu
vultagas
I n n a y t e d p| 2R Ladder
DALhde
p biary wmd
towtaut aih hangiy
Thi aveso an Avdeu ef#euta by Atra Capautanc
Ruutenin
AD 4
Qu Dual lope 2
A?p Le
appoximat) p

Dual stope Ape

auurate ApD
mo
Th AD S Ap
wh a
m a n poblem
he
B

Abl
4Dual stope
Suuture

Vin ad
Vi ad Vr i
eveltae
Palarity in
Dtal
Dual Hope
eath aHher,
t
oppoite
OPpoite

AD
nhegrar t t
omneuted t o R mnetd to
Swittu nteraty J
ofpt oparahr
omparahr

a - or
o/r
mporatt
Cnnaetl qADN 4alte.

wuner
u n t e r

#w ANP 9at dake by


The dat
Dugihal data oP
a i t 9i'ves
thnnered to- ttl
Counder

Avele
Corparat
i
Hww*

Clec
Digtal da

0P
Advantagel-

smatl
Hme i
Cemnerten
Cener
o u t t J n BCD f*mat.

olktane

AP
Suttesit
Appz ximotm

Tre tlei' Tape


Couter Type ard
Cemtrsio
Tme o ad
ad Pat e
Pate ef
Jf

deptnduvgin
ilp Aalog
AP4
tonverdon
Aralog veltaye
ConvenHen

d
d uu
es
ADC
APC
ApPoimah eM yp dlats
hat dependl e

SutrAgive Hme
cenveri
ad t
m analo veltoge.
ppineHan A pt-
APt
appindm

Sueldn

Stuhurt
4

Cempaat
Analo
pigal
pata
Uoa Clok

DAC

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