GOVERNMENT COLLEGE OF ENGINEERING AND TEXTILE TECHNOLOGY ,SERAMPORE

Continuous assignment 2 (CA2): Mini Thesis Writing

Topic : COMBINATIONAL CIRCUITS

 NAME :- BISWAJIT MANDI

 STREAM :- INFORMATION TECHNOLOGY

 SUBJECT :- ANALOG & DIGITAL ELECTRONICS

 SUBJECT CODE :- BS-M201

 UNIVERSITY ROLL NO :-11000223012

 COMBINATIONAL CIRCUITS

INTRODUCTION OF COMBINATIONAL LOGIC :

 Logic circuits for digital system may be combinational or sequential .
 A combinational circuit consists of input variables, logic gates, and output variables .

For n input variable, there are 2n possible combinations of binary variables For each possible
input combination , there is one and only one possible output combinational . A combinational
circuit can be described by m Boolean functions one for each output variables . Usually the
input’s comes from flip-flops and outputs goto flip-flips .

DESIGN PROCEDURE :
1. The problem is stated
2. The number of available input variables and required output variables is determined .
3. The input and output variables are assigned letter symbols.
4. The truth table that defines the required relationship between inputs and outputs is
derived .
5. The simplified Boolean function for each output is obtained .
 APPLICATIONS OF COMBINATIONAL CIRCUIT ARE
 ADDER :
In electronics, an adder or summer is a digital circuit that performs addition of numbers. In
modern computers adders reside in the arithmetic logic unit (ALU) where other operations are
performed. Although adders can be constructed for many numerical representations, such as
Binary-coded decimal or excess-3, the most common adders operate on binary numbers. In cases
where twos complement or one’s complement is being used to represent negative numbers; it is
trivial to modify an adder into an adder-subtractor. Other signed number representations require
a more complex adder.
Digital computers perform variety of information processing tasks, the one is arithmetic
operations. And the most basic arithmetic operation is the addition of two binary digits. i.e, 4
basic possible operations are :
0 + 0 = 0, 0 + 1 = 1, 1 + 0 = 1, 1 + 1 =10
The first three operations produce a sum whose length is one digit, but when augends and addend
bits are equal to 1, the binary sum consists of two digits. The higher significant bit of this result
is called a carry. A combinational circuit that performs the addition of two bits is called a half-
adder. One that performs the addition of 3 bits (two significant bits & previous carry) is called a
full adder & two half adder can employ as a full-adder.

1. HALF ADDER :
A Half Adder is a combinational circuit with two binary inputs (augends and addend bits and two
binary outputs (sum and carry bits.) It adds two inputs (A and B) and produces the sum (S) and
the carry (C) bits. It is an arithmetic operation of addition of two single bit words.

(Logic diagram & Truth table of Half Adder)

  FULL ADDER:
A Full-adder is a combinational circuit that adds two bits and a carry and outputs a sum bit and a
carry bit. To add two binary numbers, each having two or more bits, the LSBs can be added by
using a half-adder. The carry resulted from the addition of the LSBs is carried over to the next
significant column and added to the two bits in that column. So, in the second and higher
columns, the two data bits of that column and the carry bit generated from the addition in the
previous column need to be added.
The full-adder adds the bits A and B and the carry from the previous column called the carry-in
(Cin) and outputs the sum bit (S) and the carry bit called the carry-out (Cout). The variable S
gives the value of the least significant bit of the sum. The variable Cout gives the output carry.
The eight rows under the input variables designate all possible combinations of 1s and 0s that
these variables may have. The 1s and 0s for the output variables are determined from the
arithmetic sum of the input bits.
When all the bits are 0s, the output is 0. The S output is equal to 1 when only 1 input is equal to
1 or when all the inputs are equal to 1. The Cout has a carry of 1 if two or three inputs are equal
to 1.

From the truth table, a circuit that will produce the correct sum and carry bits in response to
every possible combination of A, B and Cin is described by
S = AˊBˊCin + AˊBCˊin + ABˊCˊin + ABCin
Cout = AˊBCin + ABˊCin + ABCˊin + ABCin
  4-BIT BINARY ADDER :
The 4-bit binary adder performs the addition of two 4-bit numbers. Let the 4-bit binary numbers,
A = A3 A2 A1 A0 and B =B3 B2 B1 B0. We can implement 4-bit binary adder in one of the
two following ways.
 Use one Half adder for doing the addition of two Least significant bits and three Full
adders for doing the addition of three higher significant bits.
 Use four Full adders for uniformity. Since, initial carry Cinis zero, the Full adder
which is used for adding the least significant bits becomes Half adder.
For the time being, we considered second approach. The block diagram of 4-bit binary adder
is shown in the following figure.

Here, the
4 Full adders are cascaded. Each Full adder is getting the respective bits of two parallel
inputs A & B. The carry output of one Full adder will be the carry input of subsequent
higher order Full adder. This 4-bit binary adder produces the resultant sum having at most 5
bits. So, carry out of last stage Full adder will be the MSB.

(LOGIC GATES AND TRUTH TABLE)

  SUBTRACTORS :
The subtraction of two binary numbers may be accomplished by taking the complement of the
subtrahend and adding it to the minuend. By this, the subtraction operation becomes an addition
operation and instead of having a separate circuit for subtraction, the adder itself can be used to
perform subtraction. This results in reduction of hardware. In subtraction, each subtrahend bit of
the number is subtracted from its corresponding significant minuend bit to form a difference bit.
If the minuend bit is smaller than the subtrahend bit, a 1 is borrowed from the next significant
position., that has been borrowed must be conveyed to the next higher pair of bits by means of a
signal coming out (output) of a given stage and going into (input) the next higher stage.

2. THE HALF-SUBTRACTOR:
A Half-subtractor is a combinational circuit that subtracts one bit from the other and
produces the difference. It also has an output to specify if a 1 has been borrowed. It is used to
subtract the LSB of the subtrahend from the LSB of the minuend when one binary number is
subtracted from the other.
A Half-subtractor is a combinational circuit with two inputs A and B and two outputs d and
b. d indicates the difference and b is the output signal generated that informs the next stage
that a 1 has been borrowed. When a bit B is subtracted from another bit A, a difference bit
(d) and a borrow bit (b) result according to the rules given as

The output borrow b is a 0 as long as A≥B. It is a 1 for A=0 and B=1. The d output is the
result of the arithmetic operation2b+A-B.
A circuit that produces the correct difference and borrow bits in response to every possible
combination of the two 1-bit numbers is, therefore,
Diff = Aˊ𝐵+ 𝐴Bˊ and
borr = Ā BDiff = Aˊ𝐵+ 𝐴Bˊ and
borr = Ā B
That is, the difference bit is obtained by X-OR ing the two inputs, and the borrow bit is
obtained by ANDing the complement of the minuend with the subtrahend Note that logic for
this exactly the same as the logic for output S in the half-adder.

A half-subtractor can also be realized using universal logic either using only NAND gates or
using NOR gates as:

NAND LOGIC:

NOR LOGIC:
d = A ⨁ B = AB + AB = AB + BB + AB +A A

= B(A + B) + A (A + B) = B+ A+ B + A+ A+ B

d = AB = A (A+B) = A+( A+ B) = A+( A+ B)

  THE FULL- SUBTRACTOR :
The half-subtractor can be only for LSB subtraction. IF there is a borrow during the subtraction
of the LSBs, it affects the subtraction in the next higher column; the subtrahend bit is subtracted
from the minuend bit, considering the borrow from that column used for the subtraction in the
preceding column. Such a subtraction is performed by a full-subtractor. It subtracts one bit (B)
from another bit (A), when already there is a borrow bi from this column for the subtraction in
the preceding column, and outputs the difference bit (d) and the borrow bit(b) required from the
next d and b. The two outputs present the difference and output borrow. The 1s and 0s for the
output variables are determined from the subtraction of A-B-bi.

The full subtractor can also be realized using universal logic either using only NAND gates or
using NOR gates as:
NAND LOGIC:

NOR LOGIC:
 DECODER:
The output of a digital system is binary coded. A decoder is a circuit that energies a
particular output line or lines depending on the binary code at the input. Thus, Decoder is a
combinational circuit that has ‘n’ input lines and maximum of 2n output lines. One of these
outputs will be active High based on the combination of inputs present, when the decoder is
enabled. That means decoder detects a particular code. The outputs of the decoder are
nothing but the min terms of ‘n’input variables (lines), when it is enabled.

A. 2 TO 4 DECODER :
Let 2 to 4 Decoder has two inputs A1 & A0 and four outputs Y3, Y2, Y1 & Y0. The block
diagram of 2 to 4 decoder is shown in the following figure –

One of these four outputs will be ‘1’ for each combination of inputs when enable, E is ‘1’.
The Truth table of 2 to 4 decoder is shown below –
 From Truth table, we can write the Boolean functions for each output as
Y3=E.A1.A0
Y2=E.A1.A0′
Y1=E.A1′.A0
Y0=E.A1′.A0′

The circuit diagram of 2 to 4 decoder is shown in the following figure –

Therefore, the outputs of 2 to 4 decoder are nothing but the min terms of two input variables A1
& A0, when enable, E is equal to one. If enable, E is zero, then all the outputs of decoder will be
equal to zero.
Similarly, 3 to 8 decoder produces eight min terms of three input variables A2, A1 & A0 and 4 to
16 decoder produces sixteen min terms of four input variables A3, A2, A1 & A0.
  ENCODER :
Digital circuits operate in a binary manner. So, the information available in the form of decimal
numerals, alphabets or special characters is required to be converted into suitable binary form
before it can be processed digital circuits. For this a process of coding is employed whereby each
numerals, alphabets or special character is coced in a unique combination of 0s and 1s. The
device that can be used to perform such coding is known as encoder.
An encoder is basically multi inputs and multi outputs digital logic circuit, which has as many
inputs as the number of character to be encoded and as many outputs as the number of bits in
encoded form of characters.
An Encoder is a combinational circuit that performs the reverse operation of Decoder. It has
maximum of 2n input lines and ‘n’ output lines. It will produce a binary code equivalent to the
input, which is active High. Therefore, the encoder encodes 2n input lines with ‘n’ bits. It is
optio nal to represent the enable signal in encoders.
A.4 TO 2 ENCODER :
Let 4 to 2 Encoder has four inputs Y3, Y2, Y1 & Y0 and two outputs A1 & A0. The block
diagram of 4 to 2 Encoder is shown in the following figure.

From Truth table, we can write the Boolean functions for each output as
A1 = Y3 + Y2
A0 = Y3 + Y1
 CONCLUSION :
In conclusion combinational circuits form the backbone of digital logic design , providing
essential functionalities required in computing and electronic systems . Combinational circuits
do not rely on past inputs or states. Their output is generated based on the current inputs in real
time. For a given set of inputs, the output is always predictable and remains the same unless the
inputs change.

 REFERENCE:
https://www.geeksforgeeks.org/what-is-combinational-circuit/
https://www.tutorialspoint.com/digital-electronics/digital-electronics-combinational-
circuits.htm
https://www.javatpoint.com/combinational-logic-circuits-in-digital-electronics