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LDW Lab Assignment 01

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5 views

LDW Lab Assignment 01

Ldw

Uploaded by

adarshnayak482004
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 12

Logic Design Workshop

(EET 1200)

Lab Assignment Set – 01

Study of Digital Logic Gates


and their Truth Tables

Submission Date: 4th Week of March 2024

Branch: EEE
Section:23414A1
Name Registration No. Signature
Adarsh Kumar Nayak 2341014138

Department of Electronics & Electrical Engineering


Institute of Technical Education and Research (Faculty of Engineering)

Siksha ‘O’ Anusandhan


(Deemed to be University)
Bhubaneswar

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1.1 AIM:

In this lab you will learn to implement some simple DSP applications in time domain using the
MATLAB environment.

Objectives

In this lab we will study the behavior and truth tables of the following logic gates.

1 NOT gate
2 AND gate
3 OR gate
4 NAND gate
5 NOR gate
6 EX-OR gate
7 EX-NOR gate

1.2 Equipment and Software Required

1 PC installed with Windows 10


2 QUCS Software
3 Vivado Software

1.3 Theory

*Refer your textbook and class note to complete this section.

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1.4 Prelab Questions

Answer the following questions in your own handwriting. Use extra pages if necessary.

Q1. A basic 2-input logic circuit has a HIGH on one input and a LOW on the other input, and the
output is HIGH. What type of logic circuit is it?
Q2. A logic circuit requires HIGH on all its inputs to make the output HIGH. What type of logic
circuit is it?
Q3. Develop the truth table for a 3-input AND gate and also determine the total number of possible
combinations for a 4-input AND gate.
Q4. Test the associative property of a 3-input NAND gate.
Q5. Test the associative property of 3-input NOR gate.

Answers to the Prelab Questions

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1.5 Lab Assignment

Implement all the logic gates in QUCS software. Generate their truth tables and verify the same.

1.5.1 NOT Gate

Output

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1.5.2 AND Gate

Output

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1.5.3 OR Gate

Output

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1.5.4 NAND Gate

Output

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1.5.5 NOR Gate

Output

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1.5.6 EX-OR Gate

Output

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1.5.7 EX-NOR Gate

Output

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1.6 Conclusion

Describe (in your own words and handwriting) what you have learned in this assignment set.

(Signature of the Student) Signature of the Faculty


Date:_____/______/_____

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