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This document contains 8 assignments related to sequential logic circuits. Assignment 1 involves converting a D-type flip-flop to a JK flip-flop and deriving a timing diagram. Assignment 2 involves determining the output of a circuit given input waveforms. Assignment 3 involves deriving the logic diagram, state table, and state diagram of a sequential circuit. Assignment 4 involves deriving the state table and state diagram of another sequential circuit. The remaining assignments involve additional problems related to sequential circuits, such as deriving logic equations, transition tables, and flow tables.

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153 views

Compound

This document contains 8 assignments related to sequential logic circuits. Assignment 1 involves converting a D-type flip-flop to a JK flip-flop and deriving a timing diagram. Assignment 2 involves determining the output of a circuit given input waveforms. Assignment 3 involves deriving the logic diagram, state table, and state diagram of a sequential circuit. Assignment 4 involves deriving the state table and state diagram of another sequential circuit. The remaining assignments involve additional problems related to sequential circuits, such as deriving logic equations, transition tables, and flow tables.

Uploaded by

uscr
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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ASSIGNMENT #5 88/1/12

Due

Date

1-a) With the aid of external logic, show that a D-type flip-flop can be converted to a JK flip-flop. *b) Construct a timing diagram for the JK flip-flop and show that the circuit produces an output which depends only on the input data present at the instant of the rising edge of the clock pulse. 2-The waveforms shown in Figure 1(a) are to be applied to the circuit shown in Figure 1(b); assuming the initial value of Q = 0, determine the Q output.

Figure 1 3-A sequential circuit with two D flip-flops, A and B; two inputs, x and y; and one output, z, is specified by the following next-state and output equations: A(t +1) = x'y + xA B(t +1) = x'B + xA z = B (a) Draw the logic diagram of the circuit. (b) Derive the state table. (c) Derive the state diagram. 4-Derive the state table and the state diagram of the sequential circuit shown in Figure 2. Explain the function that the circuit performs.

ASSIGNMENT #6 88/2/26

Due

Date

1- Determine four state diagrams for synchronous sequential circuits as specified by the following requirements. Each circuit has a single input line x and a single output line z. (a) The first circuit must produce an output z = I when two consecutive logic 1 inputs x have occurred. The next input after the two logic ones resets the output to logic 0. For example: x =01100111110 z = 00100010100 (b) The second circuit must detect the input sequence 101 by producing z. = 1 as the last 1 occurs. The output z is reset to 0 on the next clock pulse. Two 101 sequences may overlap. For example: x = 010101101 z = 000101001 *(c) Repeat part b but do not permit overlapping sequences. For example: x = 010101101 z = 000100001 *(d) The fourth circuit detects a 01 sequence. The sequence sets z = 1, which is reset only by a 00 input sequence. For all other cases, z = 0. For example: x = 010100100 z =011110110 2- Derive the logic equations to implement the four-state sequential circuit defined by the following state table, using the indicated state assignment and: (a) D flip-flops. (b) Clocked JK flip-flops. (C) Clocked SR flip-flops.

x y1 0 0 1 y2 0 1 1 A B C
2

0 1 B/0 C/0 D/0 A/1 A/1 D/0

ASSIGNMENT #7 88/3/2

Due

Date

1. Given the following circuit, show waveforms that appear on X, Y, and Z outputs of the register. The register is positive edge trigger D-type register.

4 Bit Clocked DRegister A X Y Z


+ + + +

AND AND AND AND AND AND

ASSIGNMENT #8 88/3/11

Due

Date

1. An asynchronous sequential circuit has two internal states and one output. The excitation and output functions describing the circuit are as follows: Y1 = x1x2 + x1y2 + x2y1 Y2 = x2 + x1y1y2 + x1y1 z = x2 + y1 (a)Draw the logic diagram of the circuit. (b)Derive the transition table and output map. (c)Obtain a flow table for the circuit.

2. Convert the flow table of Fig. 1 into a transition table by assigning the following binary values to the states: a = 00, b = 11, and c = 01. (a)Assign values to the extra fourth state to avoid critical races. (b)Assign outputs to the don't-care states to avoid momentary false outputs. (c)Derive the logic diagram of the circuit.

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