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Practical 1

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indujeph30
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2CEIT507 :COMPUTER ARCHITECTURE & ORGANIZATION Practical-1

Practical: 1

Aim: To Implement logic gates, Half adder,Full adder and subtractor.

1. AND Gate

The output is high only when both inputs A and B are high.

2. OR Gate

The output is high when either or both of inputs A or B is high. This is logically different
from the exclusive OR

3. NAND Gate

The output is high when either of inputs A or B is high, or if neither is high. In other words, it
is normally high, going low only if both A and B are high.
2CEIT507 :COMPUTER ARCHITECTURE & ORGANIZATION Practical-1

The NAND gate and the NOR gate can be said to be universal gates since combinations of
them can be used to accomplish any of the basic operations and can thus produce an inverter,
an OR gate or an AND gate. The non-inverting gates do not have this versatility since they
can't produce an invert.

4. NOR Gate

The output is high only when neither A nor B is high. That is, it is normally high
but any kind of non-zero input will take it low.

5. Exclusive OR Gate
The output is high when either of inputs A or B is high, but not if both A and B are high.

6. XNOR Gate
The output is high when both inputs A and B are high and when neither A nor B is high.

The NOR gate and the NAND gate can be said to be universal gates since combinations of
them can be used to accomplish any of the basic operations and can thus produce an inverter,
an OR gate or an AND gate. The non-inverting gates do not have this versatility since they
can't produce an invert
2CEIT507 :COMPUTER ARCHITECTURE & ORGANIZATION Practical-1

7. NOT gate (Inverting Buffer)

The inverting buffer is a single-input device which produces the state opposite the input. If
the input is high, the output is low and vice versa.This device is commonly referred to as just
an inverter or NOT gate.

8. HALF ADDER

X Y Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
A Combinational circuit that perform the arithmetic addition of two bits is calld half adder.in
figure we assign two symbol X and Y are two input variables and S(sum) and C(carry) are
two output variables.truth table for half adder is shown in fig.
Here S= X ⊕ Y
C= X Y
2CEIT507 :COMPUTER ARCHITECTURE & ORGANIZATION Practical-1

9. HALF SUBTRACTOR

Y Diff Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

A Combinational circuit that perform the arithmetic subtraction of two bits is calld half
subtractor.in figure we assign two symbol X and Y are two input variables and Diff.(D) and
Borrow(B) are two output variables.truth table for half Subtractor is shown in fig.
Here D= X ⊕ Y
B= X ‘Y

10.Full Adder
Truth Table:
x y z c S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

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