Power Transformer Protection Full Report
Power Transformer Protection Full Report
CHAPTER 1
INTRODUCTION
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The main aim of the project is to protect the higher KVA power distribution
transformer from high voltages, high load currents, low frequency, high temperature.
The project is basically design by using micro controllers, analog to digital conversion
and counters. The power supply automatically enters into the off state when one of the
fallowing situations occurred.
CHAPTER 2
BLOCK DIAGRAM
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POWER
INPUT RELAY T/F OUTPUT
CURRENT FULL-
T/F WAVE DIVIDER
BRIDGE
RECT
ADC
HALF- 89C5
VOLTAGE WAVE 1
INPUT DIVIDER
RECT MAX
232C
INPUT
FREQUE RECTIFIER COMPARATOR
NCY
THERMAL
SENSOR COMPARATOR PC
3
CHAPTER 3
AT 89C51
___________________________________________________________
3.1 Features
Compatible with MCS-51 Products
4 Kbytes of In-System Reprogrammable Flash Memory Endurance: 1,000
write/Erase Cycles
Fully Static Operation: 0 Hz to 24 MHz
Three-Level Program Memory Lock
Programmable Serial Channel
Low Power Idle and Power Down Modes
Eight-bit CPU with registers A (accumulator) and B
Sixteen-bit program counter (PC) and data pointer (DPTR)
Eight-bit program status word (PSW)
Eight-bit stack pointer (SP)
Internal ROM or EPROM of 0 to 4K
Internal RAM of 128 bytes
1. Four register banks, each containing eight registers
2. Sixteen bytes, which may be addressed at the bit level
3. Eighty bytes of general-purpose data memory
Thirty-two input/output pins arranged as four 8-bit ports:P0-P3
Two 16-bit timer/counters: T0 and T1
Full duplex serial data receiver/transmitter: SBUF
Control registers: TCON, TMOD, SCON, PCON, IP and IE
Two external and three internal interrupt sources
Oscillator and clock circuits
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3.2 Description
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer
with 4Kbytes of Flash Programmable and Erasable Read Only Memory (PEROM).
The device is manufactured using Atmel’s high density nonvolatile memory
technology and is compatible with the industry standard MCS-51instruction set
and pinout. The on-chip Flash allows the program memory to be reprogrammed in-
system or by a conventional nonvolatile memory programmer. By combining a
versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a
powerful microcomputer which provides a highly flexible and cost effective solution
to many embedded control applications. The AT89C51 provides the following
standard features: 4 Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit
timer/counters, a five vector two-level interrupt architecture, a full duplex serial port,
on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with
static logic for operation down to zero frequency and supports two software selectable
power saving modes. The Idle Mode stops the CPU while allowing the RAM,
timer/counters, serial port and interrupt system to continue functioning. The Power
Down Mode saves the RAM contents but freezes the oscillator disabling all other chip
functions until the next hardware reset.
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each
pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used
as high-impedance inputs. Port 0 may also be configured to be the multiplexed
loworder address/data bus during accesses to external program and data memory. In
this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash
programming, and outputs the code bytes during program verification. External
pullups are required during program verification
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1
output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins
they are pulled high by the internal pullups and can be used as inputs. As inputs, Port
1 pins that are externally being pulled low will source current (IIL) because of the
5
internal pullups. Port 1 also receives the low-order address bytes during Flash
programming and program verification.
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2
output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins
they are pulled high by the internal pullups and can be used as inputs. As inputs, Port
2 pins that are externally being pulled low will source current (IIL) because of the
internal pullups. Port 2 emits the high-order address byte during fetches from external
program memory and during accesses to external data memory that use 16-bit
addresses (MOVX@ DPTR). In this application it uses strong internal pull-ups when
emitting 1s. During accesses to external data memory that use 8-bit addresses
(MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2
also receives the high-order address bits and some control signals during Flash
programming and verification.
6
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3
output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins
they are pulled high by the internal pullups and can be used as inputs. As inputs, Port
3 pins that are externally being pulled low will source current (IIL) because of the
pullups.
Port 3 also serves the functions of various special features of the AT89C51 as
listed below:
RST
Reset input. A high on this pin for two machine cycles while the
oscillator is running resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the
address during accesses to external memory. This pin is also the program pulse input
(PROG) during Flash programming. In normal operation ALE is emitted at a constant
rate of 1/6 the oscillator frequency, and may be used for external timing or clocking
purposes. Note, however, that one ALE pulse is skipped during each access to
external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of
SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC
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instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has
no effect if the microcrontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external program
memory. When the AT89C51 is executing code from external program memory,
PSEN is activated twice each machine cycle, except that two PSEN activations are
skipped during each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to
enable the device to fetch code from external program memory locations starting at
0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset. EA should be strapped to VCC for internal program
executions. This pin also receives the 12-volt programming enable voltage (VPP)
during Flash programming, for parts that require 12-volt VPP.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock
operating
circuit.
GND
Vcc P0.0-P0.7 P2.0-P2.7
RAM
Address Port0 Port2
RAM Latch Latch Flash
Register
B Stack Program
Register ACC Pointer Address
Register
PC
ALU Incrementer
DPTR
Timing and Instruction
Control register
Port1 Port3
Latch Latch
P1.0-P1.7 P3.0-P3.7
On the chip are three lock bits which can be left unprogrammed (U) or can
be programmed (P) to obtain the additional features listed in the table below:
When lock bit 1 is programmed, the logic level at the EA pin is sampled and
latched during reset. If the device is powered up without a reset, the latch initializes to
a random value, and holds that value until reset is activated. It is necessary that the
latched value of EA be in agreement with the current logic level at that pin in order
for the device to function properly.
The 8051 contains two 16-bit registers: the program counter (PC) and
the data pointer (DPTR), Each is used to hold the address of a byte in memory. The
PC is the only register that does not have an internal address. The DPTR is under the
control of program instructions and can be specified by its 16-bit name, DPTR, or by
each individual byte name, DPH and DPL. DPTR does not have a single internal
address, DPH and DPL are each assigned an address.
1. Thirty-two bytes from address 00h to 1Fh that make up 32 working registers
organized four banks of eight registers each. The four register banks are
numbered 0 to 3 and are made up of eight registers named R0 to R7. Each
register can be addressed by name or by its RAM address. Thus R0 of bank 3
is R0 (if bank 3 is currently selected) or address 18h (whether bank 3 is
selected or not). Bits RS0 and RS1 in the PSW determine which bank of
registers is currently in use at any time when the program is running.
Byte
Byte Address
Address
1F R7
b 1E R6
a 7F
1D R5
n 1C R4
k 1B R3
3 1A R2
19 R1
18 R0
17 R7
b
16 R6
a
15 R5
n
14 R4
k
13 R3 Byte Bit
2
12 R2 Address Addresses
11 R1
10 R0
0F R7 2F 7F 78
b 0E R6 2E 77 70
a 0D R5 2D 6F 68
n 0C R4 2C 67 60
k 0B R3 2B 5F 58
1 0A R2 2A 57 50
09 R1 29 4F 48
08 R0 28 47 40
07 R7 27 3F 38
b 06 R6 26 37 30
a 05 R5 25 2F 28
n 04 R4 24 27 20
k 03 R3 23 1F 18
0 02 R2 22 17 10
01 R1 21 0F 08
00 R0 20 07 00 30
pointer register is used by the 8051 to hold an internal RAM address that is called the
top of the stack. The address held in the SP register is the location in internal RAM
where the last byte of data was stored by a stack operation. When data is to be placed
on the stack, the SP increments before storing data on the stack sothat the stack grows
up as data is stored. As data is retrieved from the stack, the byte is read from the
stack, then the SP decrements to point to the next available byte of stored data.
CHAPTER 4
TRANSFORMER
4.1 Introduction
. This is a very useful device, indeed. With it, we can easily multiply
or divide voltage and current in AC circuits. Indeed, the transformer has made long-
distance transmission of electric power a practical reality, as AC voltage can be
"stepped up" and current "stepped down" for reduced wire resistance power losses
along power lines connecting generating stations with loads. At either end (both the
generator and at the loads), voltage levels are reduced by transformers for safer
operation and less expensive equipment. A transformer that increases voltage from
primary to secondary (more secondary winding turns than primary winding turns) is
called a step-up transformer. Conversely, a transformer designed to do just the
opposite is called a step-down transformer.
current power. The larger-gauge wire used in the secondary winding is necessary due
to the increase in current. The primary winding, which doesn't have to conduct as
much current, may be made of smaller-gauge wire.
The fact that voltage and current get "stepped" in opposite directions
(one up, the other down) makes perfect sense when you recall that power is equal to
voltage times current, and realize that transformers cannot produce power, only
convert it. Any device that could output more power than it took in would violate the
Law of Energy Conservation in physics, namely that energy cannot be created or
destroyed, only converted. As with the first transformer example we looked at, power
transfer efficiency is very good from the primary to the secondary sides of the device.
So, it should be apparent that our two inductors in the last SPICE
transformer example circuit -- with inductance ratios of 100:1 -- should have coil turn
ratios of 10:1, because 10 squared equals 100. This works out to be the same ratio we
found between primary and secondary voltages and currents (10:1), so we can say as a
rule that the voltage and current transformation ratio is equal to the ratio of winding
turns between primary and secondary.
20
Laminated cores like the one shown here are standard in almost all low-
frequency transformers. Recall from the photograph of the transformer cut in half that
the iron core was composed of many thin sheets rather than one solid piece. Eddy
current losses increase with frequency, so transformers designed to run on higher-
frequency power (such as 400 Hz, used in many military and aircraft applications)
must use thinner laminations to keep the losses down to a respectable minimum. This
has the undesirable effect of increasing the manufacturing cost of the transformer.
Aside from power ratings and power losses, transformers often harbor
other undesirable limitations which circuit designers must be made aware of. Like
their simpler counterparts -- inductors -- transformers exhibit capacitance due to the
insulation dielectric between conductors: from winding to winding, turn to turn (in a
single winding), and winding to core. Usually this capacitance is of no concern in a
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power application, but small signal applications (especially those of high frequency)
may not tolerate this quirk well. Also, the effect of having capacitance along with the
windings' designed inductance gives transformers the ability to resonate at a
particular frequency, definitely a design concern in signal applications where the
applied frequency may reach this point (usually the resonant frequency of a power
transformer is well beyond the frequency of the AC power it was designed to operate
on). Flux containment (making sure a transformer's magnetic flux doesn't escape so as
to interfere with another device, and making sure other devices' magnetic flux is
shielded from the transformer core) is another concern shared both by inductors and
transformers.
against the source voltage. This is true even if the source voltage is the same as
before.
derivative waveform. In this case, the voltage waveform is the derivative of the flux
waveform, and the flux waveform is the integral of the voltage waveform.
Both core flux and coil current start from zero and build up to the same
peak values experienced during continuous operation. Thus, there is no "surge" or
"inrush" or current in this scenario.
voltage was at its zero point; in a transformer that has been sitting idle, however, both
magnetic flux and winding current should start at zero. When the magnetic flux
increases in response to a rising voltage, it will increase from zero upward, not from a
previously negative (magnetized) condition as we would normally have in a
transformer that's been powered for awhile. Thus, in a transformer that's just
"starting," the flux will reach approximately twice its normal peak magnitude as it
"integrates" the area under the voltage waveform's first half-cycle:
source is made. If the transformer happens to have some residual magnetism in its
core at the moment of connection to the source, the inrush could be even more severe.
Class A: No more than 55o Celsius winding temperature rise, at 40o Celsius
(maximum) ambient air temperature.
Class B: No more than 80o Celsius winding temperature rise, at 40o Celsius
(maximum)ambient air temperature.
Class F: No more than 115o Celsius winding temperature rise, at 40o Celsius
(maximum)ambient air temperature.
Class H: No more than 150o Celsius winding temperature rise, at 40o Celsius
(maximum)ambient air temperature.
CHAPTER 5
DESCRIPTION OF OTHER COMPONENTS
latched into the decoder on the low-to-high transform of the address latch enable
signal.
IN0 L L L
IN1 L L H
IN2 L H L
IN3 L H H
IN4 H L L
IN5 H L H
IN6 H H L
IN7 H H H
The heart of this single chip data acquisition system is its analog-to-
digital converter. The converter is designed to have fast, accurate and repeatable
conversions over a wide range of temperatures. The converter is partitioned into 3
sections: the 256R ladder network, the successive approximation register and the
comparator. The converter’s digital outputs are positive true.
The 256R ladder cutwork approach was chosen as the conventional R/2R
ladder because of its inherent monotonicity, which guarantees no missing digital
codes. It is particularly important is closed loop feedback control systems. A non-
monotonic relationship can cause relations that will be catastrophic for the system.
Additionally, the 256R network does not cause load variations on the reference
voltage. The bottom resistor and the top resistor of the ladder network are not the
same value as the remainder of the network. The difference in these resistors causes
the output characteristics to be symmetrical with zero and full-scale point s of the
transfer curve.
The successive approximation register (SAR) performs 8 iterations to
approximate the input voltage. For any SAR type converter, n-iterations are required
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for an n-bit converter. The A/D converter’s SAR is reset on the positive edge of the
start conversion start pulse. The conversion is begun on the falling edge of the start
conversion pulse. A conversion in process will be interrupted by receipt may be
accomplished by tying the end of conversion output to the SC input. If used in this
mode, an external SC pulse should be applied after power up. EOC will go low
between 0 and 8 clock pulses after the rising edge of SC.
The most important section of A/D converter is the comparator. It is this
section which is responsible for the ultimate accuracy of the entire converter. It is also
the comparator drift which has the greatest influence on the repeatability of the
device. A chopper stabilized comparator provides the most effective method of
satisfying all the converter requirements. The chopper stabilized comparator converts
the DC input signal into an AC signal. This signal is then fed through a high gain AC
amplifier and has the DC level stored. This technique limits the drift component of the
amplifier since the drift is a DC component which is not passed by the AC amplifier.
This makes the entire A/D converter extremely insensitive to temperature, long term
drift and input offset errors.
5.2 COMPARATOR
changes at a different input voltage when the input is going in the positive direction
than it does when the input voltage is going in the negative direction
Nominal Regulator
Output Voltage
5V uA7805C
6V uA7806C
8V uA7808C
8.5V uA7885C
10V uA7810C
12V uA7812C
15V uA7815C
18V uA7818C
24V uA7824C
These are monolithic timing circuits capable of producing accurate time delays or
oscillation. In the time-delay or monostable mode of operation, the timed interval is
controlled with two external resistors and a single external capacitor.
The threshold and trigger levels are normally two thirds and one third,
respectively of Vcc. These levels can be altered by use of the control voltage terminal.
When the trigger input falls below the trigger level, the flip-flop is set and the output
goes high. When the threshold input rises above the threshold level, the flip-flop is
reset and the output goes low. The reset input can override all other inputs and can be
used to initiate a new timing cycle. When the reset input goes low, the flip-flop is
reset and the output goes low. When the output is low, a low impedance path is
provided between the discharge terminal and ground. The output circuit is capable of
sinking or sourcing current up to 200 milliamperes. Operation is specified for supplies
of 5 to 15 volts. With a 5-volt supply, output levels are compatible with TTL inputs.
5.5 THERMISTER
Thermal sensitive resistors (thermistors) are commonly used types of
temperature sensors. These types are essentially resistors which change value with a
change in temperature. Thermistors consist of semiconductor material whose
resistance decreases nonlinearly with temperature. Devices with 25degree resistance
of tens of ohms to millions of ohms are available foe different applications.
Thermistors are relatively inexpensive, have very fast response times, and are useful
in applications where precise measurement is not required. These are used to produce
a voltage proportional to the resistance of the thermistor.
5.6 TRANSISTOR
A transistor consists of two pn junctions formed by sandwiching either
p-type or n-type semiconductor between a pair of opposite types. Accordingly, there
are two types of transistors, namely n-p-n transistor and p-n-p transistor. The
transistor which is used as a switch is known as switching transistor. It is so arranged
40
in the circuit that either maximum current (called saturation current) flows through the
load or minimum current (called collector leakage current) flows through the load. In
the other words, a switching transistor has two states 1. ON state or when collector
saturation current flows through the load. 2. OFF state or when collector leakage
current flows through the load.
data are often referred to as data communication equipment or DCE. The terminals or
computers that are sending or receiving the data are referred to as data terminal
equipment or DTE. In response to the need for signal and handshake standards
between DTE and DCE, the Electronics Industries Association (EIA) developed
standard Rs-232C. This standard describes the function of 25 signal and handshake
pins for serial-data transfer. It also describes the voltage levels, impedance levels, rise
and fall times, maximum bit rate, and maximum capacitance for these signal lines.
The voltage levels for all RS-232C signals are as follows. A logic high, or mark, is a
voltage between -3V and -15V under load (-25V no load). A logic low or space is a
voltage between +3V and +15V under load(+25V no load). Voltages such as +or –
12V are commonly used.RS-232C specifies that DTE connector should be a male and
the DCE connector should be a female.
The RS 232C interface standard allows for two full duplex data channels
transmitting serial data, either synchronously or asynchronously with or without
handshake. The RS 232C signal levels is such that binary 0 (also called a Space or
ON condition) is more positive than the binary 1 (also called the Mark or OFF
42
condition). This can present problems when interfacing RS 232C to TTL since not
only is there a considerable difference between the two signal voltage levels but the
signal logic is inverted as well.
The RS 232C interface is designed for connection between two devices
only-usually a computer and a peripheral. Consequently if a computer wishes to
communicate with more than one peripheral, a separate RS 232C interface must be
provided for each peripheral. In addition, all RS 232C lines are unidirectional,
transferring data in one direction only, a factor which greatly simplifies both the
hardware and software control Pof the interface.
We can use a transformer to step down current through a power line so that
we are able to safely and easily measure high system currents with inexpensive
ammeters. Of course, such a transformer would be connected in series with the power
line, like this Note that while the PT is a step-down device, the Current Transformer
(or CT) is a step-up device (with respect to voltage), which is what is needed to step
down the power line current. Quite often, CTs are built as donut-shaped devices
43
through which the power line conductor is run, the power line itself acting as a single-
turn primary winding:
Some CTs are made to hinge open, allowing insertion around a power
conductor without disturbing the conductor at all. The industry standard secondary
current for a CT is a range of 0 to 5 amps AC. Like PTs, CTs can be made with
custom winding ratios to fit almost any application. Because their "full load"
secondary current is 5 amps, CT ratios are usually described in terms of full-load
primary amps to 5 amps, like this:
The "donut" CT shown in the photograph has a ratio of 50:5. That is, when
the conductor through the center of the torus is carrying 50 amps of current (AC),
there will be 5 amps of current induced in the CT's winding.
PCB Drawing:
Making of the PCB drawing involves some preliminary
considerations such as placement of components on a piece of paper, location of
holes deciding the diameter of various holes, the optimum area of each component
should occupy, the share and location islands for connecting two or more
components at a place, full space utilization and prevention of over crowding of
49
PCB Fabrication:
The silver clad PCB laminate may be prepared by rubbing away
the wxide, greese etc., with a fine emery paper or sand paper. On this the first
PCB drawing may be traced. Clips should be used to prevent the paper and the
silver form slipping while the PCB pattern is being traced on the laminate. Only
the connecting lines in PCBs islands and holes should be traced, the positions of
components need not be traced. The components positions can be marked on the
PCBs reverse side, if desired.
The marked holes in PCB may be drilled using 1mm or 3mm
drill bits and the traced PCB pattern coated with black, quick enamel paint, using
a thin brush and small metal scale. In case there is any scrapping with a blade or
knife, after the paint has dried.
Wash the dish, take just enough to immerse the board and FeC13
carefully without any splashing, placing the board in solution with silver side up.
Don’t try to breathe the vapour. Stir the solution by giving see-saw motion to the
dish and solution in it. Occasionally warm it over a heater. After sometime the
unlashed parts change their colour. Continue to etch. Gradually the base material
will become visible etch for two more minutes to get a neat pattern.
Take out the board, wash it with running water, rub with pumice
tore move the coating of etch resistant till you get shining. Dry it and put a coat of
varnish.
50
CHAPTER 6
WORKING OF THE SYSTEM
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6.1 89C51:
RESET
89c51 uses an active high reset pin. It must go high for two machine
cycles. When power is first applied and then sink low. The simple RC circuit used
here will supply voltage (Vcc) to reset pin until capacitance begins to change. At a
threshold of about 2.5V, reset input reaches a low level and system begin to run.
OSCILLATOR:
Pins XTAL1 and XTAL2 are provided for connecting a resonant network
to form an oscillator. The crystal frequency is basic internal clock frequency. The
maximum and minimum frequencies are specified from 1to 24MHZ.
Program instructions may require one, two or four machine cycles to be
executed depending on type of instructions. To calculate the time any particular
instructions will take to be executed, the number of cycles ‘C’,
C*12d
T= ----------------------
Crystal frequency
51
smod
2 .clockfrequency
baud= ------------------------------
32d. 12d[256d-TH1]
The oscillator is chosen to help generate both standard and non-standard baud
rates. If standard baud rates are desired, an 11.0592MHZ crystal should be selected.
From our desired standard rate, TH1 can be calculated.
The internally implemented value of capacitances are 33pf .
EXTERNAL MEMORY:
The 89C51 accesses external RAM whenever certain program instructions are
executed. External ROM is accessed whenever EA pin is connected to ground. 89C51
52
can thus use internal and external ROM automatically. During any memory access
cycle, port0 is time multiplexed that is, if first provides lower byte of 16 bit memory
address, and then acts as a bidirectional data bus to write or read a byte of memory
data. Port2 provides high byte of memory address during entire memory read of write
cycle.
The lower address byte from port0 must be latched into an external register to
save the byte. Address byte save is accomplished by ALE clock pulse. The port0 pins
then become free to serve as data bus. If the memory access is for a byte of program
code in the ROM to, PSEN pin will go low to enable RORM to place a byte of
program code on the data bus. I f thee access is for a RAM byte, WR of RD pins in
port3 will go low, enabling data to flow between RAM and data bus.
53
The supply given is the +5V D.C. The incoming power is 230V A.C. , there is a
need to convert it into +5V D.C.
The input a.c. supply is stepped down from 230V to 9-0-9V. The rectifier
consists of diodes D1 and D2 makes the supply D.C. that is, unidirectional waveform.
The output from rectifier is a URDC, whose value is 12.726V peak to peak. The
voltage regulator makes this URDC to RDC of +5V. The capacitor C1 is used to
maintain constant voltage between two consecutive positive cycles where as C2 is
used to remove the fluctuations caused by regulator. Here we are selecting 12.726V
as a peak value. Because of fluctuations, the peak voltage may decrease, then
regulator cannot step up to +5V. If we select peak value, a higher one, then the
problem can be overcome.
also changes due to variations in the input a.c. voltage. This is due to the following
reasons
:
1. There are considerable variations in a.c. line voltage caused by outside factors
beyond our control. This changes the d.c. output voltage. Most of the electronic
circuits will refuse to work satisfactorily on such output voltage fluctuations. This
necessities to use regulated d.c. power supply.
2. The internal resistance of ordinary power supply in relatively large. Therefore,
output voltage is markedly affected by the amount of load current drawn from the
supply.
These variations in d.c. voltage may cause erratic operation of electronic circuits.
Therefore, regulated d.c. power supply is the only solution in such situations.
55
voltage, the ADC will have 256 steps of 20mV each. The 3-bit address of the desired
input. The
555 timer will send an interrupt signal approximately once every second. An interrupt
procedure is used to keep a count of how many interrupts have occurred. This count is
equal to the number of seconds that have passed. In the mainline we setup stack and
data segments. We initialize the data segment register, stack segment register, and
stack pointer register as before. Each time, it receives an interrupt from the 555 timer,
it executes the interrupt-service procedure for the interrupt. In this procedure we
decrement the seconds count in the named memory location and test to see if the
57
count is sown to zero yet. If the seconds count is not zero, execchannel is first sent to
the multiplexer inputs. After at least 50ns, the ALE input is sent high. After another
few seconds, the SOC input is sent high and then low. Thin the ALE input is brought
low again. Then the 8-bit value can be read in.
6.6 COMPARATOR:
Frequency:
From the URDC value, select a reference point. Whenever the
waveform reaches this reference value from zero, the output is taken as logical zero
till that point and when it reaches above reference point, the output will be logical
59
one, till it reaches again below the reference point. When we combine all these points,
we will get a square wave output. The reference point can also be changed by varying
resistance.
For these parameters we are using dividers. We can also use comparators also.
But comparators are used only for comparing. The frequency used for an a.c. supply
is always 50HZ. There is no need to increase or decrease it . Where as by using
dividers, the value of the output can also be calculated. For example, the input is taken
as 230V and division point as 2. If the output division is found as 4, then we can
easily calculate the output as 460V.
The half-wave rectifier is used for the voltage. The diode conducts during
positive half-cycles of a.c.supply while no current conduction takes place during
negative half-cycles. In this rectification, a maximum of 40.6% of a.c. power is
converted into d.c. power.
We are using current transformer for current parameter. The output of load is
connected to the current transformer. Whenever the current of the load exceeds the
reference point, the output is taken as digital one. The full-wave bridge rectifier is
used for the current. The rectifier will conduct current through the load in the same
direction for both half-cycles of input a.c. voltage. This has double the efficiency than
the half wave rectifier. Therefore, it is twice as effective as a half-wave rectifier.
60
All these four outputs are given as inputs to microcontroller. Whenever the output of
any of these is digital one, the relay is switched off such that the power transformer is
out of the supply. Whenever the output enters into the normal state, automatically the
power is switched on.
Thermal:
Here, we place a thermister to sense the temperature. The output voltage
changes if R1:R2 ratio changes. If R1 is fixed, R2 is variable then, if temperature
increases, R2 decreases, in turn voltage increases. The output results to digital one. R2
is nothing but resistance of thermister. When the voltage from the temperature sensor
goes above the voltage on the reference input of the comparator, the output of the
comparator will change state and send an interrupt signal to the micro controller.
For frequency and thermal outputs we are using comparators. These are use
to compare the input and output values. We are using inverting side as a reference
point . Therefore, when the output voltage is above the reference point, it results to
digital one.The comparator has the feature to convert analog data to digital data.
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CHAPTER 7
PC INTERFACE PROGRAM
___________________________________________________________
; P2.0 = RLY0
; P2.1= BUZZ
; P1 = ADC DATA
; P3.5 = B
; P3.4 = A
; P3.3 = START
; P3.2 = ALE
; P3.6 FR
; P3.7 TEMP
TXD MACRO
JNB T1, $
CLR T1
MOV SBUF, R6
MACEND
RXD MACRO
JNB R1, $
CLR R1
MOV R7, SBUF
MACEND
ORG0
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LJMP START
ORG 0050H
NEXT: RXD
CLR A
MOV A, R7
MOV R6, A
TXD
LCALL ISEN
MOV R6, 51H
TXD
LCALL FEN
MOV R6, 51H
TXD
LCALL TSEN
MOV R6, 51H
TXD
LJMP NEXT
;*******************************
;**************VOLTAGE SENSE****************
VSEN : MOV P1, #FFH
MOV P3, #FFH
CLR P3.2
CLR P3.3
LCALL DEL
CLR P3.1
CLR P3.5
LCALL DEL
SETB P3.2
LCALL DEL
SETB P3.3
LCALL DEL
CLR P3.2
LCALL DEL
CLR P3.3
LCALL SEC
MOV R6, P1
MOV 51H, R6
RET
;****************************************
LCALL DEL
SETB P3.1
CLR P3.5
LCALL DEL
SETB P3.2
LCALL DEL
SETB P3.3
LCALL DEL
CLR P3.2
LCALL DEL
CLR P3.3
LCALL SEC
MOV R6, P1
MOV 51H, R6
RET
;****************************************
INC R6
CJNE R6, #FFH, WWE
LJMP WER
;*****************************************
;**********************************************
;************************************************
END;
68
CONCLUSION
_________________________________________________________
Advantages
Disadvantages
BIBLIOGRAPHY