UVM Class Hierarchy
UVM Class Hierarchy
1|Page
@shraddha_pawankar Date:21/03/2024
Syntax:
virtual class uvm_void
1) 📦 Empty Box Analogy: Just as an empty box doesn't hold any specific
items, uvm_void doesn't have any predefined data or methods inside it.
It's like a blank slate waiting to be filled.
2) 🔄 Abstract Nature: uvm_void is what we call an abstract class. This
means it's more of a blueprint than an actual object. You can't directly
use uvm_void to create instances because it lacks concrete
implementation. Instead, it acts as a template for other UVM classes.
UVM_OBJECT:
The UVM object is a data structure used for testbench configuration and it is
the base class available for component and sequence branch.
The uvm_object provides methods like create, clone, copy, record, compare,
print, etc.
An Easy Explanation
1) uvm_object as the central hub for handling data within our testbench.
2) It's like a versatile container that can hold various types of information
needed for verification.
2|Page
@shraddha_pawankar Date:21/03/2024
3) uvm_object acts as the base class for other UVM components like
components and sequences.
4) It provides a common framework for managing data across different
parts of the testbench.
UVM_REPORT_OBJECT:
3|Page
@shraddha_pawankar Date:21/03/2024
UVM_TRANSACTION
An Easy Explanation
Stimulus Generation and Analysis: UVM transactions are like messengers that
carry information between different parts of our verification environment.
They're responsible for generating stimulus (input signals) for our design and
analyzing the results.
4|Page
@shraddha_pawankar Date:21/03/2024
🏃♂️ Transient Nature: Transactions are temporary and don't stick around for
long. They come into existence, do their job, and then vanish.
UVM_COMPONENTS
UVM components are used to build a class-based hierarchical structure for the
testbench.
The uvm_component are static and physical components that exist
throughout the simulation.
The uvm_component class is a base class for all UVM components.
For testbench hierarchy, base class components are available in UVM as
uvm_env, uvm_agent, uvm_monitor, uvm_driver, uvm_sequencer, etc.
🌟 Building Blocks: UVM components are like the building blocks of our
testbench. They help us organize different parts of our verification environment
into a structured hierarchy, making it easier to manage and maintain.
🔩 Static and Persistent: Once they're created, UVM components stick around
throughout the simulation. They're like the solid foundation of a building,
always there to support the rest of the structure.
5|Page
@shraddha_pawankar Date:21/03/2024
6|Page
@shraddha_pawankar Date:21/03/2024
7|Page