1... CS523 Computer Architecture Addendum
1... CS523 Computer Architecture Addendum
Basic logic design, data representation; instruction formats; introduction to design for the
synthesis of digital computers; principles of computer structure and design as applied to major
computer functions. Memory system; general characteristics of memory operations; memory
addressing, memory hierarchy, virtual memory control systems. Hardware control, micro
programmed control. Synchronous control, I/O control. Introduction to the methodology of
fault-tolerant computing. Study the architecture of an actual simple mini/micro- computer.
Introduction of Control Unit and its Design
Control Unit is the part of the computer’s central processing unit (CPU), which directs the
operation of the processor. It was included as part of the Von Neumann Architecture by John
von Neumann. It is the responsibility of the Control Unit to tell the computer’s memory,
arithmetic/logic unit and input and output devices how to respond to the instructions that
have been sent to the processor. It fetches internal instructions of the programs from the main
memory to the processor instruction register, and based on this register contents, the control
unit generates a control signal that supervises the execution of these instructions. A control
unit works by receiving input information to which it converts into control signals, which are
then sent to the central processor. The computer’s processor then tells the attached hardware
what operations to perform. The functions that a control unit performs are dependent on the
type of CPU because the architecture of CPU varies from manufacturer to manufacturer.
Examples of devices that require a CU are:
• Control Processing Units(CPUs)
• Graphics Processing Units(GPUs)
Efficient instruction execution: A well-designed control unit can execute instructions more
efficiently by optimizing the instruction pipeline and minimizing the number of clock cycles
required for each instruction.
Improved performance: A well-designed control unit can improve the performance of the
CPU by increasing the clock speed, reducing the latency, and improving the throughput.
Support for complex instructions: A well-designed control unit can support complex
instructions that require multiple operations, reducing the number of instructions required to
execute a program.
Improved reliability: A well-designed control unit can improve the reliability of the CPU
by detecting and correcting errors, such as memory errors and pipeline stalls.
Lower power consumption: A well-designed control unit can reduce power consumption
by optimizing the use of resources, such as registers and memory, and reducing the number
of clock cycles required for each instruction.
Better branch prediction: A well-designed control unit can improve branch prediction
accuracy, reducing the number of branch mispredictions and improving performance.
Improved scalability: A well-designed control unit can improve the scalability of the CPU,
allowing it to handle larger and more complex workloads.
Better support for parallelism: A well-designed control unit can better support parallelism,
allowing the CPU to execute multiple instructions simultaneously and improve overall
performance.
Improved security: A well-designed control unit can improve the security of the CPU by
implementing security features such as address space layout randomization and data
execution prevention.
Lower cost: A well-designed control unit can reduce the cost of the CPU by minimizing the
number of components required and improving manufacturing efficiency.
Reduced performance: A poorly-designed control unit can reduce the performance of the
CPU by introducing pipeline stalls, increasing the latency, and reducing the throughput.
Increased complexity: A poorly-designed control unit can increase the complexity of the
CPU, making it harder to design, test, and maintain.
Higher power consumption: A poorly-designed control unit can increase power
consumption by inefficiently using resources, such as registers and memory, and requiring
more clock cycles for each instruction.
Reduced reliability: A poorly-designed control unit can reduce the reliability of the CPU by
introducing errors, such as memory errors and pipeline stalls.
Limitations on instruction set: A poorly-designed control unit may limit the instruction set
of the CPU, making it harder to execute complex instructions and limiting the functionality
of the CPU.
Inefficient use of resources: A poorly-designed control unit may inefficiently use resources
such as registers and memory, leading to wasted resources and reduced performance.
Limited scalability: A poorly-designed control unit may limit the scalability of the CPU,
making it harder to handle larger and more complex workloads.
Poor support for parallelism: A poorly-designed control unit may limit the ability of the
CPU to support parallelism, reducing the overall performance of the system.
Security vulnerabilities: A poorly-designed control unit may introduce security
vulnerabilities, such as buffer overflows or code injection attacks.
Higher cost: A poorly-designed control unit may increase the cost of the CPU by requiring
additional components or increasing the manufacturing complexity.
Micro-programmed control units are slower than hardwired control units because they
require an extra step of decoding the microcode to generate control signals, but they are more
flexible and easier to modify. They are commonly used in modern CPUs because they allow
for easier implementation of complex instruction sets and better support for instruction set
extensions.
To execute an instruction, the control unit of the CPU must generate the required control
signal in the proper sequence. There are two approaches used for generating the control
signals in proper sequence as Hardwired Control unit and the Micro-programmed control
unit.
Hardwired Control Unit: The control hardware can be viewed as a state machine that
changes from one state to another in every clock cycle, depending on the contents of the
instruction register, the condition codes, and the external inputs. The outputs of the state
machine are the control signals. The sequence of the operation carried out by this machine is
determined by the wiring of the logic elements and hence named “hardwired”.
• Fixed logic circuits that correspond directly to the Boolean expressions are used
to generate the control signals.
• Hardwired control is faster than micro-programmed control.
• A controller that uses this approach can operate at high speed.
• RISC architecture is based on the hardwired control unit
Micro-programmed Control Unit –
• The control signals associated with operations are stored in special memory units
inaccessible by the programmer as Control Words.
• Control signals are generated by a program that is similar to machine language
programs.
• The micro-programmed control unit is slower in speed because of the time it takes
to fetch microinstructions from the control memory.
Some Important Terms
1. Control Word: A control word is a word whose individual bits represent
various control signals.
2. Micro-routine: A sequence of control words corresponding to the control
sequence of a machine instruction constitutes the micro-routine for that
instruction.
3. Micro-instruction: Individual control words in this micro-routine are referred
to as microinstructions.
4. Micro-program: A sequence of micro-instructions is called a micro-program,
which is stored in a ROM or RAM called a Control Memory (CM).
5. Control Store: the micro-routines for all instructions in the instruction set of a
computer are stored in a special memory called the Control Store.
The differences between hardwired and micro-programmed control units:
Hardwired Control Unit Micro-programmed Control
Unit
Debugging and Testing Difficult to debug and test Easier to debug and test
Size and Cost Smaller size, lower cost Larger size, higher cost
Types of Micro-programmed Control Unit – Based on the type of Control Word stored in
the Control Memory (CM), it is classified into two types :
Input/Output Hardware
In order to manage and control the various I/O device attached to computer, I/O system requires
some hardware and software components. I/O devices commonly use certain hardware
devices. These are: system bus and ports.
o Ports are the plugs used to connect I/O devices to the computer.
o Bus is a set of wires to which these ports and I/O controllers are connected and through
which signals are send for 1/O command.
Input/Output Controller
Input/Output Controller is a component that attaches with each device and is used to accept
input and provide output to these devices. Applications access I/O devices with the help of
these I/O controllers. Thus I/O controller is a peripheral device that enables the main processor
to transfer data between the host system and I/O devices. The I/O controller is a special purpose
processor and are autonomous in nature. Autonomous means that I/O controllers carry out
operations on I/O devices while the main CPU continues to execute programs.. The CPU
controls the activities of an I/O controller by writing into and reading from I/O ports. I/0
controllers have certain registers to store data and control signals. These registers are:
1. The Control register contains that show the functioning of devices i.e. one bit shows
whether the device communicates in half duplex or full duplex mode, another bit shows
party checking and third bit shows the word length of data.
2. The Status register holds bits that show the status of I/O command. These bits indicate
the success, busy or failure status of a command.
3. Input registers contain the input read by the end user.
4. The output registers hold the output written by the host. The program counter holds
the address of next instruction to be executed by the processor.
Polling
Polling is a technique used by units such as CPU or a program to check the status of I/O devices.
If the device is not in the required status, checking unit will continue with its work without
waiting for the device to achieve required status Polling is also called busy-waiting because a
device is busy in checking the status of other device. Polling is a common approach to handling
multiple I/O device by expanding the busy-waiting loop of checking status. When a device is
found with the desired status CPU branch the device with corresponding Interrupt Service
Routine (ISR) so that interrupts produced by that device is handled by ISR. ISR, after
performing an I/O operation, terminates. The device is again branched into the busy-waiting
loop. Busy-wait loop ensures that CPU services each device as status of device is checking
continuously.
Interrupts
Whenever a process needs to perform I/O it can use an interrupt. Interrupts stop the execution
of a program to perform other tasks, such as numerical computation. Interrupt signal an event
to occur. If an interrupt occurs, the CPU stores the current status of the process in the program
registers and stop the program execution. CPU starts executing the interrupt. When CPU
finishes its processing, it regains the status of process and continue its execution. I/O devices
that halt the normal functioning of the processor generate various types of interrupts:
1. Program Interrupt. Generated by a program when one of its statements causes error,
such as division by zero, data mismatch and arithmetic overflow.
2. Time Interrupt. Generated by the inbuilt timer in a processor to perform certain
functions that are required at regular time intervals.
3. I/O Interrupts. Generated by I/O hardware or by the controller to inform an end user
about the completion of an I/O operation or about errors, if any, that occurred at the
time of execution of a program.
4. Hardware Failure Interrupt. Generated by the hardware if any problem occurs, such
as parity error or power failure.
5. Supervisor Call (SVC) Interrupts. Generated by the process itself at the time of
execution if it needs an I/O operation to be performed.
6. Restart Interrupts. Generated when the restart button of the console is pressed.
For each kind of interrupt, codes are written in operating system. These are called Interrupt
Service Routine (ISR). It then decides the necessary steps that are taken when a particular
interrupt occurs. Operating system handles interrupts in two manners:
1. Synchronous I/O. Halts the program and execute the I/O operation. After the
completion of the I/O operation; the previous state of the program is resumed. At the
time of processing, I/O operation CPU remains idle.
2. Asynchronous I/O. Execute the 1/0 operation without halting the program in between.
The I/O operations run with other operations of a program simultaneously.