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Physics Practiacl 6th Sem

Physics practical work on topic bsc 6 sem very very very very happy important work sheet

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0% found this document useful (0 votes)
125 views

Physics Practiacl 6th Sem

Physics practical work on topic bsc 6 sem very very very very happy important work sheet

Uploaded by

929jayveeru
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Inverter Gate (NOT Gate) 7404LS

Experiment No:1 Date: / /

Aim: - To Verify truth tables of AND, OR, NOT, NOR, NAND, XOR, XNOR gates.

Apparatus Required: -
1.All the basic gates mention in the fig
2.IC Trainer Kit

Procedure: -

Place the IC on IC Trainer Kit.

Connect VCC and ground to respective pins of IC Trainer Kit.

Connect the inputs to the input switches provided in the IC Trainer

Kit.

Connect the outputs to the switches of O/P LEDs,

Apply various combinations of inputs according to the truth table and

observe condition of LEDs.

Disconnect output from the LEDs and note down the corresponding

multimeter voltage readings for various combinations of inputs

Inverter Gate (NOT Gate) 7404LS

A O/P
0 1
1 0
2-Input AND Gate 7408LS

A B O/P
0 0 0
0 1 0
1 0 0
1 1 1

2-Input OR Gate 7432LS

A B O/P
0 0 0
0 1 1
1 0 1
1 1 1

2-Input NAND Gate 7400LS

A B O/P
0 0 1
0 1 1

1 0 1

1 1 0
2-Input NOR Gate 7402LS

A B O/P
0 0 1

0 1 0

1 0 0
1 1 0

2-Input XOR Gate 7486LS

A B O/P

0 0 0

0 1 1

1 0 1

1 1 0

2-Input XNOR Gate 74266LS


A B O/P
0 0 1

0 1 0

1 0 0
1 1 1

Conclusion:-
Truth table of logic gates are verified.
Aim: - Implementation of various gates by using universal properties of NAND & NOR gates
and
Verify truth table.

APPARATUS REQUIRED

1. Digital IC trainer kit


2. IC 7400 (NAND gate)
3. IC 7402(NOR gate)

THEORY:

NAND OR NOR gates are sufficient for the realization of any logic expression. because of
this reason, NAND and NOR gates are known as UNIVERSAL gates.

1. For NAND gate as universal gate

PROCEDURE:

1. Make the connections as per the logic diagram.


2. Connect +5v to pin 14 & ground to pin 7 of IC 7400
3. Apply diff combinations of inputs to the i/p terminals.
4. Note o/p for NAND as universal gate.
5. Verify the truth table. A Ā
0 1
1 0

A B AB
0 0 0
0 1 0
1 0 0
1 1 1
A B A+B
0 0 0
0 1 1
1 0 1
1 1 1

A B
0 0 1
0 1 0
1 0 0
1 1 0

A B A⊕B

0 0 0
0 1 1

1 0 1

1 1 0

A B AʘB
0 0 1
0 1 0
1 0 0

1 1 1
2.For NOR gate as universal gate

PROCEDURE:

1. Make the connections as per the logic diagram.


2. Connect +5v to pin 14 & ground to pin 7 of IC 7402
3. Apply diff combinations of inputs to the i/p terminals.
4. Note o/p for NAND as universal gate.
5. Verify the truth table

A Ā
0 1
1 0

A B A+B
0 0 0
0 1 1
1 0 1
1 1 1

A B AB
0 0 0
0 1 0
1 0 0
1 1 1

A B AB
0 0 1
0 1 1
1 0 1
1 1 0
A B A⊕B

0 0 0
0 1 1

1 0 1

1 1 0

A B AʘB
0 0 1
0 1 0
1 0 0

1 1 1

Conclusion:-
We have constructed and verified truth table of all gates using universal gates NAND and NOR gate.
Aim: - Implementation of half adder and Full adder using logic gates.

APPARATUS REQUIRED

1.IC 7486, IC 7432, IC 7408, IC 7400.


2.Digital trainer kit.

THEORY:
Half-Adder: A combinational logic circuit that performs the addition of two data bits, A and B, is
called a half-adder. Addition will result in two output bits; one of which is the sum bit, S, and the
other is the carry bit, C. The Boolean functions describing the half-adder are:
S =A ⊕ B C=AB

Full-Adder: The half-adder does not take the carry bit from its previous stage into account. This
carry bit from its previous stage is called carry-in bit. A combinational logic circuit that adds two
data bits, A and B, and a carry-in bit, Cin, is called a full-adder. The Boolean functions describing
the full-adder are:

S = (x ⊕ y) ⊕ Cin C = xy + Cin (x ⊕ y)

1. Verify the gates.


2. Make the connections as per the circuit diagram.
3. Switch on VCC and apply various combinations of input according to the
truth table.
4. Note down the output readings for half and full adder sum and the carry
bit for different combinations of inputs.
K-map for half adder

0 0
0 1
1 0
1 1

Cin

Half adder and full adder are constructed and their truth tables are verified.
Aim: - Implementation of half subtractor and Full subtractor using logic gates.

APPARATUS REQUIRED

1.IC 7486, IC 7432, IC 7408,IC7404, IC7400.


2.Digital trainer kit.

THEORY:

Half Subtractor: Subtracting a single-bit binary value B from another A (i.e. A -B) produces a
difference bit D and a borrow out bit B-out. This operation is called half subtraction and the circuit
to realize it is called a half subtractor. The Boolean functions describing the halfSubtractor are:

D =A ⊕ B Br = Α̅ B

Full Subtractor: Subtracting two single-bit binary values, B, Cin from a single-bit value A produces a
difference bit D and a borrow out Br bit. This is called full subtraction. The Boolean functions
describing the full-subtracter are:

D = (x ⊕ y) ⊕ Bin Br = Α̅B + Α̅ (Bin) + B (Bin)

1. Verify the gates.


2. Make the connections as per the circuit diagram.
3. Switch on VCC and apply various combinations of input according to the
truth table.
4. Note down the output readings for half and full subtractor difference and
borrow bit for different combinations of inputs.
Using only NAND gate (a) Half subtractor
0 0
0 1
1 0
1 1
Conclusion: -

Half subtractor and full subtractor are constructed and their truth tables are verified.

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