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Lab04 Preparation Task

The document provides instructions for three circuit schematic diagrams to be completed before a lab session: 1) a 2-to-1 multiplexer using only NAND gates with push button and switch inputs and an LED output, 2) a 2-to-4 decoder with switch inputs and LED outputs, 3) a 4-bit two's complement adder/subtractor circuit using multiplexers to select bit inputs and with switch inputs, LED outputs, and a carry output LED.

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7 views

Lab04 Preparation Task

The document provides instructions for three circuit schematic diagrams to be completed before a lab session: 1) a 2-to-1 multiplexer using only NAND gates with push button and switch inputs and an LED output, 2) a 2-to-4 decoder with switch inputs and LED outputs, 3) a 4-bit two's complement adder/subtractor circuit using multiplexers to select bit inputs and with switch inputs, LED outputs, and a carry output LED.

Uploaded by

sepal23274
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CSSE2010/CSSE7201 – Introduction to Computer Systems

Lab 4 Preparation Task

You should complete three circuit schematic diagrams as listed below before your week 3 Lab
4 session. Refer to the week by week teaching outline on Blackboard to see when is your lab 4
session. You should consult the device pinout information on Blackboard (under learning
resources>>lab resources digital logic).

Circuit 1
Draw a circuit schematic diagram for a 2-to-1 multiplexer that uses only 2-input NAND gates.
The data inputs should be connected to push buttons. The select input should be connected to
a switch. The output should be connected to an LED.
Hint: Do the truth table (or a function table) for a 2-to-1 multiplexer, obtain the logic
expression, then draw a logic circuit and convert it to the NAND equivalent circuit by
replacing each gate with its NAND version. If you use Logisim, do not use the MUX module.

Circuit 2
Draw a circuit schematic diagram for a 2-to-4 decoder - using whichever logic gates you
prefer (from those available in the CSSE2010/CSSE7201 lab). The two inputs should be
connected to switches. The outputs should be connected to LEDs.

A 2-to-4 decoder has the following truth table (inputs A1, A0 and outputs X0, X1, X2, X3):

A1 A0 X0 X1 X2 X3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

Circuit 3
Using a 74HCT04, 74HCT157 and a 74HCT283, draw a circuit schematic diagram for a circuit
which can act as a 4-bit two's complement adder or subtractor. The output (4-bits from the
74HCT283, which should be shown on LEDs) will have the value A+B or A-B (where A and B
are the 4-bit inputs which are taken from switches). A push button input (M, mode) will
determine whether the circuit performs addition or subtraction - if the value is 0, addition will
be performed; if the value is 1, subtraction will be performed by calculating A+(-B). The
circuit is similar to that shown in week2-lecture 4-slide 7 except the selection of the “B” input
bits as B or not(B) is to be performed using multiplexers instead of XOR gates. (The
74HCT157 is a quad 2-to-1 multiplexer with a shared select input.) The carry output should
be shown on a LED also.

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