PL2507
PL2507
0 to IDE
Bridge Controller
Product Datasheet
Document Revision: 1.4
Document Release: February, 2004
Revision History
Table of Contents
1.0 Features
Universal Serial Bus Specification 2.0 Compliant
USB Mass Storage Class Bulk-Only Transport Specification Compliant
AT Attachment with Packet Interface Extension (ATA/ATAPI-6) Compliant
ATA interface support PIO mode 0~4, Multiword DMA mode 0~2, and Ultra-DMA mode 0~4 to
work with ATA/ATAPI devices
Integrated the full speed and high speed transceiver
5 V tolerant inputs, 3.3 V output drive
Sufficient 4K bytes data buffer for both the downstream and upstream data transfer in
optimized performance
Support external serial EEPROM to customize vender/product related information
Support multiple LUN (optional)
Addition General Purpose IO pins for further customization
On-chip 3.3v to 2.5v regulator to supply the power of 0.25 process core circuit
Inexpensive LQ64 packaging available
It will work with full function at full speed or high speed USB transfer mode. The operating speed
mode is determined by the capability of the host/hub it connected to. The PIO mode 0 to mode 4,
Multi Word DMA mode 0 to mode 2, and Ultra DMA mode 0 to mode 4 are implemented to support
difference IDE devices. The chip will negotiate with connected device to select the proper mode to
obtain the best performance.
The chip is implemented according to the USB Bulk-Only Mass Storage Class specification ver1.0.
While the driver is default supported by most the OS so that no additional driver is needed for the
bridge function.
PLL
LOGIC DEVICE
INTERRUPT MEMORY
UNIFIED RAM
CONTROLLER MANAGEMENT UNIT
4KB
(MMU)
16KB ROM
The vendor specific SET_EEPROM_STRING request is used to change the contents of the EEPROM.
The data part of this request is written to the EEPROM from address 0 all the way up to address 255.
Therefore, it is necessary for the software to prepare the whole table first and then write it to the
EEPROM in one single SET_EEPROM_STRING request.
The String Descriptor table is a linked data structure that holds all string descriptors recognized by this
chip in the order of its index. The first entry, String 0, represents the Language ID, as defined by the
USB specification. The second entry, String 1, is the Manufacturer Descriptor, as defined by the
Device Descriptor of PL-2507. The third and forth entries, String 2 and 3, are the Product Descriptor
and Serial Number, respective, also defined by the Device Descriptor. The user has the option to
define String 4, 5, and 6 for their own private use. Each of the these String Descriptor Entries is of the
following data structure:
The last entry of this table must have bLength of 0 to indicate the end of this table. If the host tries to
access to the string descriptor beyond the last one, a zero-length data will be returned. The following
table shows one example of valid EEPROM contents.
The user could also define other strings, 4 to 6, to hold useful information for the drivers and/or
applications, such as software authorization codes, public key for password encryption, symbolic
names, just to name a few. However, the total length of this table must not exceed 256 bytes, the
supported maximum size of external EEPROM.
7.0 DC Characteristics
7.1 Absolute Maximum Ratings
SYMBOL PARAMETER RATING UNITS
VCC 2.5V Power Supply -0.3 to 3.0 V
3.3V Power Supply -0.3 to 3.9
VIN2 Input Voltage of 2.5V I/O -0.3 to VCC2I +0.3 V
Input Voltage of 2.5V I/O with 3.3V Tolerance -0.3 to 3.9
VIN3 Input Voltage of 3.3V I/O -0.3 to VCC3I +0.3 V
Input Voltage of 3.3V I/O with 5V Tolerance -0.3 to 5.5
o
TSTG Storage Temperature -40 to 150 (TBD) C
(1) Permanent device damage may occur if Absolute Maximum Ratings are exceeded.
(2) The pull up/pull down input leakage current can be derived from the pull up/pull down resistance (Rpu/Rpd)
(3) The capacitances listed above do not include PAD capacitance and package capacitance. One can estimate
pin capacitance by adding pad capacitance’s which is about 0.1pF and the package capacitance.