Unit 1-Basic Structure of Computers
Unit 1-Basic Structure of Computers
INTRODUCTION
In this chapter we are going to discuss about the different functional units are available
in the computers and what are the functions are going on inside the computer. This is nothing
about Central Processing Unit (CPU). Inside the CPU how the functions are going on with the
different hardware. The improvements in computer technology have been tremendous since
the first machines appeared. A personal computer that can be bought today with a few thousand
dollars, has more performance (in terms of, say, floating point multiplications per second),
more main memory and more disk capacity than a machine that cost millions in the 50s-60s.
Four lines of evolution have emerged from the first computers (definitions are very loose and
in many case the borders between different classes are blurring).
1. Mainframes
Large computers that can support very many users while delivering great computing
power. It is mainly in mainframes where most of the innovations (both in architecture
and in organization) have been made.
2. Minicomputers
This is adopted many of the mainframe techniques, yet being designed to sell for less,
satisfying the computing needs for smaller groups of users. It is the minicomputer group
that improved at the fastest pace (since 1965 when DEC introduced the first
minicomputer, PDP-8), mainly due to the evolution of integrated circuits technology
(the first IC appeared in 1958).
3. Super Computers
Super Computers are designed for scientific applications, they are the most expensive
computers (over one million dollars), processing is usually done in batch mode, for
reasons of performance.
4. Microcomputers
It have appeared in the microprocessor era (the first microprocessor, Intel 4004, was
introduced in 1971). The term micro refers only to physical dimensions, not to
computing performance. A typical microcomputer (either a PC or a workstation) nicely
fits on a desk. Microcomputers are a direct product of technological advances: faster
CPUs, semiconductor memories, etc. Over the time many of the concepts previously
used in mainframes and minicomputers have become common place in
microcomputers.
FUNCTIONAL UNITS
In this topic we are going to discuss about the basic functional units of a computer
which contains about the 5 units that are Input unit, Output unit, Memory unit, Control unit,
and Processor unit. These five units are grouped into three parts as Input/Output, Memory and
Processor. The following diagram explains about the functional unit organization.
Computer accepts the coded information from the Input unit. Well known input devices
are Keyboard, Joystick, Track balls, and Mouse. Microphone is also a input device which is
used to get the audio input.
Memory Unit
Memory unit is used to store the programs and data. The memory unit is divided into
two. One is Primary memory and second one is Secondary memory. Comparisons of Primary
memory and Secondary memory is given here.
Whereas Secondary memory is having larger storage of data, slower in fetching and
storing data, less expensive in cost and physical size is larger.
Most of the operations are executed in Arithmetic and Logic Unit (ALU) of processor.
For example, Two numbers are located in memory are to be added. In ALU, Operands are into
the processor and Operations by the ALU. The Operands are brough into processor, that are
stored in high-speed storage elements called Registers. The control and the ALU are many
times faster than the other devices connected to a computer.
Output unit
Output unit is the counter part of the Input unit. It gets the values from ALU to
display/print the output via different output units. Most familiar example is Printer and printer
can able to print 10,000 line per minute. This process is very fast, but when we compare with
the processor, it is slow.
Control unit
All computer operations which are happening inside the computer is controlled by the control
unit. The timing signals that govern the I/O transfers are also generated by the control unit.
Control unit is usually distributed throughout the machine instead of standing alone. The
following Operations of a computer are happening:
1. Accept information in the form of programs and data through an input unit and store it
in the memory
2. Fetch the information stored in the memory, under program control, into an ALU,
where the information is processed
3. Output the processed information through an output unit
4. Control all activities inside the machine through a control unit
BASIC OPERATIONAL CONCEPTS
Add LOCA, R0
In this above instruction, Adds the operand at memory location LOCA to the operand in a
register R0 in the processor. After that place the sum into register R0. The original contents of
LOCA are preserved and the original contents of R0 is overwritten. Then the Instruction is
fetched from the memory into the processor. The operand at LOCA is fetched and added to the
contents of R. Finally the resulting sum is stored in register R0.
Load LOCA, R1
ADD R1, R0
In the above instruction, first instruction loads the data from LOCA to the register R1.
After that the value of register R1 will be added with register R0 and place the final output into
the register R0. In this case the R0 value will be replaced with new value after executing the
second instruction.
Now we are going to discuss about the connections between the Processor and the
Memory. The following diagram explains the connections between the memory and processor.
The following registers are used in the above diagram.
Instruction register (IR) holds the instruction that is currently being executed. Program
Counter (PC) is another specialized register and it keeps track of the execution of a program.
PC also contain the memory address of the next instruction to be fetched and executed. Memory
Address Register holds the address of location to be accessed will be available and Memory
Data Register (MDR) contains the data to be written into or read of the address location.
BUS STRUCTURE
Above diagrams gives the structure of a single bus organization and simplest way to
inter-connect the functional units. Using single bus only one transfer can do among the devices.
Two units only can be used at any given time. Also low cost and flexible for attaching any new
devices. In this bus, Buffer register is used to holds the information during the data transfer
since each device reading and writing speeds are varying. Printer can be a good example for
the buffer register.
A group of lines that serve as a connecting path for several devices is called a bus. To
do the operation, functional parts of computers must be connected in some organized ways. To
achieve a reasonable speed of operation, a computer must be organized so that all its units can
handle one full word of data at a given time. When a word of data is transferred between units,
all its bits are transferred in parallel (i.e all bits are transferred simultaneously over many wires
or lines, one bit per line). In addition to lines that carry the data, bus must have lines for address
and control purposes.
The advantages of Single Bus Structure is Low Cost and Flexibility for attaching
Peripheral Devices. A system that contains multiple buses achieve concurrency in operations
by allowing two or more transfers to be carried out at the same time. This leads to better
performance but at an increased cost. The devices connected to the bus vary in their speed of
operation. Memory and processor units are fast unit. Input and Output units are slow units. An
efficient transfer mechanism can be used to smooth out the timing differences among
processor, memory and Input Output Unit. A common approach is to include buffer registers
with the devices to hold the information during transfers.
Consider the transfer of an character from processor to printer. The processor sends the
character over the bus to the printer buffer. Once the buffer is loaded, the printer can start
printing and is not available for further transfers until this process is completed. The bus and
the processor are no longer needed and can be released for other activity. Thus Buffer Registers
smooth out the timing differences among processors, memories and I/O Devices.
This picture gives you an idea of how the data will be transferring from processor to the
printer.
PERFORMANCE
In performance the most important is how quickly it can be execute the programs. There
are three factors that affect the performance are
1. Compiler
2. Machine Instruction set
3. Hardware
Compiler is used to convert the high level language to machine level language. The
machine instruction set and hardware are mainly used to analyze the performance. Elapsed time
is used in this and it is a measure of the performance of the entire computer system. The elapsed
time is depends on units in computer system. Also, the processer time is depends on hardware
involved in machine instructions. Processor time to execute a program depends on the hardware
involved in the execution of individual machine instructions. The processor cache is explained
in the following diagram,
In the above diagram, Main memory and Processor are connected via a single bus and cache
memory is placed inside the Processor to enhance the performance of a system. The processor
and a relatively small cache memory that can be fabricated on a single integrated circuit chip.
Cache memory is used to increase the processing speed and memory management.
1. Processor Clock
Processor circuits are controlled by a timing signal is known as clock. Clock defines
the regular time interval is known as clock cycle. To execute the machine instructions, the
processor divides the action to be performed and completed in one clock cycle. Where the
length of the process is P and inverse is the clock rate R=1/P. The clock rate ranges from
few hundred million to billion per second, In standard the electrical and engineering
terminology can be denotes as follows.
This simple diagram which gives you an idea of how the time period will be in a
system.
N S
T
R
In the above equation the T is the processor time required to execute a program that
had been prepared in high-level language. N is a number of actual machine language
instructions needed to complete the execution. S is for average number of basic steps
needed to execute one machine instruction. Each step completes in one clock cycle. R is
the clock rate. In this all the units are not independent to each other. To achieve high level
performance, the values of T should be reduced. That means N and S value should be
reduced and R value should be increased.
The Instructions are not necessarily executed one after another. The value of S
doesn’t have to be the number of clock cycles to execute one instruction. The Pipelining
concept may used here and it is overlapping the execution of successive instructions.
For example Add R1, R2, R3 can be used and the value of R1 and R2 will be added
and the result is stored in R3.
4. Clock Rate
There are two possibilities are there for increasing the clock rate (R).
i. Improving the integrated circuit (IC) technology. That means the circuits
which are used in the system are need to be integrated with all other circuits.
ii. Reducing the amount of processing done in one basic step. The number of
processing steps should be completed in one step instead many steps.
5. Instruction Set
There are two different types of instruction sets are available. The first one is
Complex Instruction Set Computers (CISC) and the other one is Reduced Instruction Set
Computers (RISC). The CISC is involve in complex instructions which will be having large
number of steps. And RISC is, simple instructions require a small number of basic step to
execute the same. When the complex instructions are avoided and number of instructions
also less, then automatically performance will be increased.
6. Compiler
In this initially a high-level language will be given as input to a system and then it
converts into a sequence of machine instructions by using the compiler.
7. Performance Measurement
i 1
The task carried out by a computer program consist of sequence of small steps. A
computer must have instructions that capable of performing four types of operations.
In the above four operations, we will discuss the fist two types of instructions in detail.
R3 ← [R1] + [R2]
In this the values of register [R1], and [R2] will be added and the result will be
stored in register R3. This type of notation is Register Transfer Notation (RTN).
In the above instructions MOVE and ADD are known as the assembly language
statement.
C=A+B
In the above example A, B, C are assigned to distinct locations in the memory. But
the same method can’t be used in computers. So to take place in the computer we
can use like
C [A] + [B]
In this A, B are called as source operands and C is the destination operands. ADD
is the operation to be performed during the operation. The previous said
instruction is defined like
ADD A, B
MOVE B, C
ADD A, C
If we are comparing the three address instruction and two address instruction, in
two address instruction some disadvantage is there like some contents of operand
will be replaced while executing the successive instructions.
In earlier topics we have discussed instruction formats and we have used the task
C [A] + [B]. With the same example we are going to discuss how instructions
are storing in memory and executing the instructions in straight-line sequencing.
Consider this memory structure diagram and assume that 32 bit Operating System
(OS) is used in this case. When the 32 bit OS is used, the memory address will be
4 bytes (8 bits = 1 byte and 8 * 4 = 32) long. In the preceding discussion of
instruction formats, we used to task C [B]. The diagram shows a possible program
segment for this task as it appears in the memory of a computer. We have assumed
that the computer allows one memory operand per instruction and has a number of
processor registers. The three instructions of the program are in successive word
locations, starting at location i. since each instruction is 4 bytes long, the second
and third instructions start at addresses i + 4 and i + 8.
5. Branching
This is very much useful to reduce the number of instructions and so the
processing time will be reduced. Once the processing time is reduced, throughput
(output) will be high. The following example shows the branching condition
example and execution.
Consider the task of adding a list of n numbers. Instead of using a long list
of add instructions, it is possible to place a single add instruction in a program loop,
as shown in diagram. The loop is a straight-line sequence of instructions executed
as many times as needed. It starts at location LOOP and ends at the instruction
Branch > 0. During each pass through this loop, the address of the next list entry is
determined, and that entry is fetched and added.
Assume that the number of entries in the list, n, is stored in memory location
N, as shown. Register R1 is used as a counter to determine the number of time the
loop is executed. Hence, the contents of location N are loaded into register R1 at
the beginning of the program. Then, within the body of the loop, the instruction.
Decrement R1
6. Condition codes
SOFTWARE INTERFACE
Software is a collection of computer instructions that tell the computer how to work.
There are two types of software. 1. Application Software and 2. System Software. As we all
know that software is used to enables the hardware to do the different operations. We have
given the sample pictures that represents the different type of the software. System software is
the primary software and after that we can able to install the many application software in any
system.
In application software a program that is designed for end users and usually written in
high level language such as C, C++, JAVA and FORTRAN. The most common application
software programs are used by millions every day and includes Microsoft Suite of Products
(Office, Excel, Word, PowerPoint, Outlook, etc.), Internet browsers like Firefox and Chrome.
In-order for a user to enter and run the application software, the computer must contain system
software in its memory.
In this picture assume that application program has been compiled from a high level
language to machine language form and stored on the disk. During the time period t0 to t1, an
OS routine initiates loading the application program from disk to memory, waits until the
transfer is completed and then passes execution control back to the application program. During
the time period t2 to t3 also, an OS routine initiates loading the application program from disk
to memory, waits until the transfer is completed and then passes execution control back to the
application program. When the operating system transfers the data file from disk, it prints the
result during the time period t4 to t5. At time t5, the operating system may load and execute
another application program. Disk and Processor are idle during most of the time period t4 to
t5. Printer is idle during time period t0 to t1 and t2 to t3. During t0 to t1 and t2 to t3, operating
system can arrange to print the previous programs result. During t4 to t5, the operating system
can load the next program to be executed in the memory from the disk.
ADDRESSING MODES
Generally, the data can be organized in different ways like LIST and TABLE. To track
the detail of students then list may be used and like storing of many person telephone numbers,
then table may be used to identify. The term addressing modes refers to the way in which the
operand of an instruction is specified. The addressing mode specifies a rule for interpreting or
modifying the address field of the instruction before the operand is actually executed.
Programmers used the data structures to represent the data used in computations which includes
the list, linked list, arrays and queues. Programmers normally written the programs in high-
level language only and when translating the high-level language into assembly language, the
compiler must be able to implement.
This instruction copies the contents of memory location of LOC to register R2.
Example: Move 200immediate, R0. In this case immediate is used and this is not a way
to mention in the computer. So we can use the instruction as
MOVE #200, R0.
The above statement places the value 200 in the register R0. A common convention
is to use the sharp sign (#) in front of the value to indicate that this value is to be
used as an immediate operand. We can consider the following example.
A=B+6
MOVE B, R1
ADD #6, R1
MOVE R1, A
In this case A = B + 6 is the syntax and first instruction moves the value of B to
register R. Second instruction adds the constant value 6 with the value in R1. It
means that B and 6 added and stored in R1. Last instruction moves the R1 value to
the register A.
Register R2 is used as a pointer to the numbers in the list, and the operands are
accessed indirectly through R2. The initialization section of the program loads the
counter value n from memory location N into Rl and uses the Immediate addressing
mode to place the address value NUM 1, which is the address of the first number in
the list, into R2.
These diagrams give the idea about the instruction execution using the indirect
pointers through the register (R1) and memory location (A). Now we are also going
to discuss the indirection pointers with an example that adding the numbers and
storing it into a memory. The following assembly language program gives many
instructions that for adding the numbers using branching.
Indirect Addressing can be used to access successive numbers in the list. Register
R2 is used as a pointer to the numbers in the list and the operands are accessed
indirectly through R2. N-Number of entries in the list n is stored in memory location
N and is loaded into register R1. R1 is used as a counter to determine the number
of times the loop is executed. NUM1 is the address of the first number in the list
immediately moved into R2. Clear the content of R0 to zero. Add (R2), R0 -
Fetches the operand at location NUM1 and add it to content present in R0. Add #4,
R2 - add 4 to the content of the pointer, so that it will contain the address value
NUM2. Decrement R1-Reduce the content of R1 by 1 each time. Execution of the
loop continues as long as the result of decrement operation is greater than zero.
Branch >0 Loop-Conditional Branch Instruction. Branch is an instruction that can
cause a computer to begin executing a different instruction sequence and loads a
new value into Program Counter. Conditional Branch Instruction causes a branch
only if a specified condition is satisfied. If the condition is not satisfied, PC gets
incremented and next condition in sequential order is fetched and executed. This
means that loop is repeated as long as there are entries in the list that are yet to be
added to R0. At the end of the nth pass through the loop, decrement instruction
produces a value of 0 and hence branching does not occur. Instead Move instruction
is fetched and executed. Move R0, SUM - Content present in R0 is moved into
memory location SUM.
Index mode
The effective address of the operand is generated by adding a constant value to the
contents of a register. The register used may be either a special register provided
for this purpose, or, more commonly; it may be anyone of a set of general-purpose
registers in the processor. In either case, it is referred to as an index register. We
indicate the Index mode symbolically as
X(Ri).
Where X denotes the constant value contained in the instruction and Ri is the name
of the register involved. The effective address of the operand is given by EA = X +
[Ri]. The contents of the index register are not changed in the process of generating
the effective address.
There are two ways of using Index Mode. Case I - Offset is given as a constant and
Case II - Offset is in the index register.
Here, the index register R1 contains the address of a memory location and the value
X defines an offset from this address where the operand is found.
The constant X corresponds to a memory address and the content of index register
define the offset to the operand is shown in this diagram.
Consider a simple example involving a list of test scores for students taking a given
course
Consider a simple example involving a list of test scores for students taking a given
course. The Word Length of the Computer is 32 bits and a four word memory block
comprises a record that stores the relevant information for each student. Each record
consist of student identification number (ID) followed by scores the students earned
on three tests. Represents a 2D Array having n rows and n columns. Each row
contain the entries for one student and the columns gives the student ID and Test
Scores.
This is the program for computing the sum of all scores obtained on each tests and
store these sums in memory locations SUM1, SUM2, SUM3. Indexing Addressing
Mode is used in the body of the loop for accessing each test scores in a students
record. Here register R0 is used as index register. Initially R0 is set to point to ID
location of the first student record. Thus it contains the address LIST.
4. Relative Address
An useful version of this mode is obtained if the program counter, PC, is used
instead of a general purpose register. Then, X(PC) can be used to address a memory
location that is X bytes away from the location presently pointed to by the program
counter. Since the addressed location is identified ''relative'' to the program counter,
which always identifies the current execution point in a program, the name Relative
mode is associated with this type of addressing.
Relative mode
The effective address is determined by the Index mode using the program
counter in place of the general-purpose register Ri. This mode can be used to access
data operands. But, its most common use is to specify the target address in branch
instructions. An instruction such as Branch>O LOOP causes program execution to
go to the branch target location identified by the name LOOP if the branch condition
is satisfied. This location can be computed by specifying it as an offset from the
current value of the program counter. Since the branch target may be either before
or after the branch instruction, the offset is given as a signed number.
5. Additional Modes
The two additional modes described are useful for accessing data items in
successive locations in the memory.
Autoincrement mode
The effective address of the operand is the contents of a register specified in the
instruction. After accessing the operand, the contents of this register are
automatically incremented to point to the next item in a list. We denote the
Autoincrement mode by putting the specified register in parentheses, to show that
the contents of the register are used as the effective address, followed by a plus sign
to indicate that these contents are to be incremented after the operand is accessed.
Thus, the Autoincrement mode is written as (Ri) +. As a companion for the
Autoincrement mode, another useful mode accesses the items of a list in the reverse
order:
Autodecrement mode
The contents of a register specified in the instruction is first automatically
decremented and is then used as the effective address of the operand. We denote
the Autodecrement mode by putting the specified register in parentheses, preceded
by a sign to indicate that the contents of the register are to be decremented before
being used as the effective address. Thus, we write - (Ri).
Number and Characters operands, as well as instructions are stored in the memory of a
computer. Consider how the memory is organized Memory consist of millions of storage cells,
each of which can store a bit of information (0 or 1). A single bit represent small amount of
information, bits are rarely handled individually. The usual approach is to deal bit in groups of
fixed size. For this purpose, memory is organized so that a group of n bits can be stored or
retrieved in a single basic operation.
Each group of n bits is referred to as a word of Information (Word) and number of bits
in a word is known as Word Length (Modern computers have word lengths range from 16 to
64 bits).
Byte Addressability
Word Assignment
Words are said to be aligned in memory if they begin at a byte address that is a multiple of the
number of bytes in a word. If the word length is 16 bit (2 Byte), aligned words begin at byte
address is 0, 2, 4, 6, 8 …… If the word length is 32 bit (4 Byte), aligned words begin at byte
address is 0, 4, 8, 12, 16 ….. If the word length is 64 bit (8 Byte), aligned words begin at byte
address 0, 8, 16, 32 ….. If words begin at arbitrary byte address, then words are said to have
unaligned addresses. Most machine use only aligned addresses, some computer use unaligned
word addresses.
Accessing Numbers, Characters and Character Strings
The number usually occupies one word. It can be accessed in the memory by specifying
its word address. Individual Characters can be accessed in the memory by specifying its byte
address. Character String-Sequence of character stored in or processed by computer. Beginning
of the string is indicated by giving the byte address containing its first character. Successive
byte locations contain successive characters of the string.
MEMORY OPERATIONS
Both program instructions and data operands are stored in the memory. To execute an
instruction, the processor control circuits must cause the word containing the instructions to be
transferred from the memory to the processor. Operands and results must also be moved
between memory and the processor. Thus, two basic operations involving the memory are
needed.
2. Store or Write
This is to transfers an item of information from the processor to a specific memory
location, destroying the former contents of that location. The processor sends the
address of the desired location to the memory, together with the data to be written into
that location.
ASSEMBLY LANGUAGE
In assembly language we know that Mnemonics only used. This table gives the
name and corresponding mnemonics to be used in the programme, Several possible
addressing modes for specifying operand locations, assembly language must indicate
which mode is being used. These are the addressing modes are already discussed in
detail.
1. Indirect Address
2. Relative Address
3. Immediate Address
4. Index Address
5. Register address mode (Direct)
6. Indirect address mode
7. Auto Increment
8. Auto Decrement
Assembler Directives
Here we are going to discuss about the assembly language instructions and how the
execution happening in sequentially. Suppose the name SUM is used to represent the value
200. This may be conveyed to the assembler program through a statement.
This statement simply informs the assembler that the name SUM should be replaced by the
value 200 wherever it appears in the program. Such statement is called Assembler Directives
or Commands. Now we are going to discuss the program for adding a list of numbers: Indirect
Addressing Modes can be used to access successive numbers in the list.
To run this program on a computer, it is necessary to write this program in the required
assembly language, specifying all the information needed to generate the corresponding
object program.
In this example R2 is used as a pointer to the numbers in the list and the operands are
accessed indirectly through R2. N-Number of entries in the list n is stored in memory location
N and is loaded into register R1. R1 is used as a counter to determine the number of times the
loop is executed. NUM1 is the address of the first number in the list immediately moved into
R2. Clear the content of R0 to zero. Add (R2), R0 - Fetches the operand at location NUM1
and add it to content present in R0. Add #4, R2 - add 4 to the content of the pointer, so that it
will contain the address value NUM2. Decrement R1-Reduce the content of R1 by 1 each time.
Execution of the loop continues as long as the result of decrement operation is greater than
zero. Branch >0 Loop-Conditional Branch Instruction. Branch is an instruction that can cause
a computer to begin executing a different instruction sequence and loads a new value into
Program Counter. Conditional Branch Instruction causes a branch only if a specified condition
is satisfied. If the condition is not satisfied, PC gets incremented and next condition in
sequential order is fetched and executed. This means that loop is repeated as long as there are
entries in the list that are yet to be added to R0. At the end of the nth pass through the loop,
decrement instruction produces a value of 0 and hence branching does not occur. Instead Move
instruction is fetched and executed. Move R0, SUM - Content present in R0 is moved into
memory location SUM. Now we are going to see the Assembly language representation of the
program.
The program begins with assembler directives. First Assembler Directive: EQU-
informs the assembler about the value of SUM. Second Assembler Directive: ORIGIN: Tells
the assembler program where in the memory location to place the data block that follows. In
this case, location specified has the address 204. This location is to be added with the value
100, DATAWORD directive is used to inform the assembler about this requirement.
RESERVE Directive declares that a memory block of 400 bytes is to be reserved for data, and
the name NUM1 is to be associated with address 208. Second ORIGIN directive specifies that
the instruction of the object program are to be loaded in the memory address starting at 100.It
is followed by source program instructions written with the appropriate mnemonics. The last
statement in the source program is the assembler directive END, which tells the assembler that
this is the end of the source program. END directive includes the label START, which is the
address of the location at which execution of the program is to begin.
Assembly and execution of Programs
In this topic we are going to discuss about the assembly language programs execution.
The assembly language programs must be assembled before the execution of any instruction.
While execution of instruction, it replaces all the symbols denoting operations, addressing
modes and all the names and labels. The assembler assigns addresses to Instructions and data
blocks and starting at the address given in ORIGIN. Some times instead of assembler, the name
is specified by an EQU. The symbol table keeps the track of all names and numerical values.
In assembler there are two-pass assemblers are there. First pass is for creating the
complete symbol table. The second pass assembler substitutes values for all names from
symbol table.
All the systems will be having a loader in the memory because the assembler stores the
object program on a disk. So, object program must be loaded into the memory before execution.
Also, debugger is for helping the user to find other programming errors. When we are
compiling and executing the program, if there is any error occurs in the program.
Number Notations
In this topic we are going to discuss about the numbers and its representation in the
computer. When we dealing with numerical values, it is convenient to use the decimal notation.
Most of the assemblers allows numerical values to be specified in different ways.
For example, consider the numerical value 93, which is represented by the 8-bit binary
number as 0101 1101. When we are converting this number into the Hexadecimal format 93
will be divided into 16. So when we divide 93/16, we will get co-efficient is 5 and reminder is
13. So we can represent like
ADD #93, R1
Or
Consider a task that reads character from a keyboard and produces character output on
a display screen. A simple way of performing such I/O tasks is known as program controlled
I/O. The rate of data transfer from the keyboard to a computer is limited by the typing speed of
the user. The rate of output transfers from the computer to display is determined by the rate at
which characters can be transmitted over the link between computer and display devices
(typically several thousand characters per second). The rate of output transfers from computer
to display is much higher but still slower than the speed of processor (can execute many million
instructions per second). The difference in speed between Processor and I/O Devices creates
the need for mechanism to synchronize the transfer of data between them.
On Output side, processor sends the first character and then waits for a signal from the
display that the character has been received. It then sends the second character and so on.
Likewise, input is sent from keyboard, the processor waits for a signal indicating that the
character has been struck and its code is available in some buffer register associated with the
keyboard. Then the processor proceeds to read that code.
In this diagram, single bus structure is used to connect the processor, input and output
devices. Inside the Input and Output devices buffer memory and status flag are available to
stores the data coming in / out and to know the status like whether the device is idle or busy,
Here DATAIN and DATAOUT is the Input and Output registers respectively. Also
INSTATUS and OUTSTATUS are the status flags. The striking a key stores the corresponding
character in an 8 bit buffer register associated with the keyboard.8 bit buffer register is known
as DATAIN. To inform the processor, a valid character is in DATAIN, a status control flag,
SIN is set to 1. A Program monitors SIN, and when SIN is set to 1, the processor reads the
contents of DATAIN. When the character is transferred to the processor, SIN is automatically
cleared to zero. If a second character is entered at keyboard, SIN is again set to 1 and the
process repeats.
A buffer register, DATAOUT and a status control flag, SOUT are used when characters
are transferred from the processor to the display. When SOUT equals to 1, the display is ready
to receive a character. Under program control, the processor monitors SOUT, and when SOUT
is set to 1, the processor transfers a character code to DATAOUT. The transfer of a character
to DATAOUT clears SOUT to 0, when the display device is ready to receive a second
character, SOUT is again set to 1. The buffer registers DATAIN and DATAOUT, status flags
SIN and SOUT are part of circuit known as device interface.
For example, the processor can monitor the keyboard status flag SIN and transfer a
character from DATAIN to R1 by using this sequence
Generally data can be transferred between registers and processor using instructions
such as MOVE, LOAD, STORE. For example, contents of keyboard character buffer DATAIN
can be transferred to R1 by the
MoveByte DATAIN, R1
Similarly DATAOUT is
MoveByte R1, DATAOUT
However, it is more common to include SIN and SOUT in device status register. So let us
assume that bit b3 in register INSTATUS and OUTSTATUS corresponds to SIN and SOUT.
When we are moving data to memory or fetching the data from memory have to use the
following instructions to check the memory is empty or full while inserting or deleting.
Branch=0 READWAIT
MoveByte DATAIN, R1
Similarly,
Branch=0 WRITEWAIT
In these cases a test bit is used and it is for testing the state of one bit in the destination location.
In general, program operates on data that reside in the computer memory. These data
can be organized in variety of ways. Programmer use data structure to represent the data.
Consider an important data structure known as stack. A Stack is a list of data elements in which
elements can bd added or removed at one end of the list only. This end is called top of the stack
and other end is called bottom. This structure is sometimes referred as pushdown stack.
Stack follows last in first out technique-last data element placed on the stack is the first
one removed from the stack. There are two operations in stack and queue is PUSH and POP.
Data will be inserted into memory by using PUSH operation. Data will be moved from memory
by using POP operation. Where Push is Inserting a new item into the stack and Pop is for
Removing the top item from the stack. Generally STACK uses the Last In First Out (LIFO)
method and QUEUE uses the First In First Out (FIFO) method.
In this stack contains numerical values with 43 at the bottom and -28 at the top. There
is stack pointer is used to in this to track the current place of the execution. A processor register
keeps track of the address of the element of the stack that is at the top at any given time. This
register is called stack pointer.
Now we are going to discuss with an example that how the memory is organized and
what is the use of Stack Pointer (SP) when data is inserting or deleting from the memory.
Consider this diagram for PUSH operation. Push operation can be implemented as
In this case subtract instruction subtracts the source operand 4 from the destination
operand(SP) and places the result in SP.
Add #4, SP
These two instructions move the top value from stack into location Item and then increment SP
by 4 so that it points to the new top element. If the processor has auto increment and auto
decrement addressing modes, then push and pop operation can be performed by single
instruction.
Is a list of data elements in which elements can be added or removed at different end. Data
added into queue is known as REAR End and Data removed from the queue is known as front
end. Queue follows First in First out technique-data item stored first will be deleted first.