NCP2990

1.3 Watt Audio Power

Amplifier with Fast Turn On
Time
The NCP2990 is an audio power amplifier designed for portable
communication device applications such as mobile phone http://onsemi.com
applications. The NCP2990 is capable of delivering 1.3 W of
continuous average power to an 8.0 BTL load from a 5.0 V power MARKING
supply, and 1.0 W to a 4.0  BTL load from a 3.6 V power supply. DIAGRAMS
The NCP2990 provides high quality audio while requiring few
9−Pin Flip−Chip CSP A3
external components and minimal power consumption. It features a MBAG
FC SUFFIX
low−power consumption shutdown mode, which is achieved by AYWW
1 CASE 499E
driving the SHUTDOWN pin with logic low. C1
The NCP2990 contains circuitry to prevent from “pop and click” A1
noise that would otherwise occur during turn−on and turn−off
MBA = Specific Device Code
transitions. It is a zero pop noise device when a single ended audio
A = Assembly Location
input is used. Y = Year
For maximum flexibility, the NCP2990 provides an externally WW = Work Week
controlled gain (with resistors), as well as an externally controlled G = Pb−Free Package
turn−on time (with the bypass capacitor). When using a 1 F bypass
capacitor, it offers 60 ms wake up time.
Due to its superior PSRR, it can be directly connected to the PIN CONNECTIONS
battery, saving the use of an LDO. 9−Pin Flip−Chip CSP
This device is available in a 9−Pin Flip−Chip CSP (Lead−Free).
A1 A2 A3
Features INM OUTA INP

• 1.3 W to an 8.0  BTL Load from a 5.0 V Power Supply B1 B2 B3

• Superior PSRR: Direct Connection to the Battery
VM_P VM Vp
• Zero Pop Noise Signature with a Single Ended Audio Input
• Ultra Low Current Shutdown Mode: 10 nA C1 C2 C3

• 2.2 V−5.5 V Operation BYPASS OUTB SHUTDOWN

• External Gain Configuration Capability (Top View)
• External Turn−on Time Configuration Capability:
60 ms (1 F Bypass Capacitor)
• Up to 1.0 nF Capacitive Load Driving Capability ORDERING INFORMATION
See detailed ordering and shipping information in the package
• Thermal Overload Protection Circuitry dimensions section on page 12 of this data sheet.
• This is a Pb−Free Device*

Typical Applications
• Portable Electronic Devices
• PDAs
• Wireless Phones

*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.

© Semiconductor Components Industries, LLC, 2007 1 Publication Order Number:

January, 2007 − Rev.1 NCP2990/D
 NCP2990

Rf

20 k Vp

Cs 1 F

Ci Ri
AUDIO INM Vp
− OUTA
INPUT INP
47 nF 20 k +
R1
Vp 20 k
8
R2
− 20 k
BYPASS + OUTB
Cbypass 1 F

SHUTDOWN SHUTDOWN
VIH CONTROL
VM_P VM
VIL

Figure 1. Typical Audio Amplifier Application Circuit with Single Ended Input

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 NCP2990

PIN DESCRIPTION
Pin Type Symbol Description
A1 I INM Negative input of the first amplifier, receives the audio input signal. Connected to the
feedback resistor Rf and to the input resistor Rin.

A2 O OUTA Negative output of the NCP2990. Connected to the load and to the feedback resistor Rf.
A3 I INP Positive input of the first amplifier, receives the common mode voltage.
B1 I VM_P Power Analog Ground.
B2 I VM Core Analog Ground.
B3 I Vp Positive analog supply of the cell. Range: 2.2 V−5.5 V.
C1 I BYPASS Bypass capacitor pin which provides the common mode voltage (Vp/2).
C2 O OUTB Positive output of the NCP2990. Connected to the load.
C3 I SHUTDOWN The device enters in shutdown mode when a low level is applied on this pin.

MAXIMUM RATINGS (Note 1)

Rating Symbol Value Unit

Supply Voltage Vp 6.0 V

Operating Supply Voltage Op Vp 2.2 to 5.5 V −
2.0 V = Functional Only

Input Voltage Vin −0.3 to Vcc +0.3 V

Max Output Current Iout 500 mA
Power Dissipation (Note 2) Pd Internally Limited −
Operating Ambient Temperature TA −40 to +85 °C
Max Junction Temperature TJ 150 °C
Storage Temperature Range Tstg −65 to +150 °C
Thermal Resistance Junction−to−Air RJA (Note 3) °C/W
ESD Protection Human Body Model (HBM) (Note 4) − 8000 V
Machine Model (MM) (Note 5) >250
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = +25°C.
2. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power dissipation.
3. The RJA is highly dependent of the PCB Heatsink area. For example, RJA can equal 195°C/W with 50 mm2 total area and also 135°C/W with
500 mm2. For further information see page 10. The bumps have the same thermal resistance and all need to be connected to optimize the power
dissipation.
4. Human Body Model, 100 pF discharge through a 1.5 k resistor following specification JESD22/A114.
5. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.

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 NCP2990

ELECTRICAL CHARACTERISTICS Limits apply for TA between −40°C to +85°C (Unless otherwise noted).
Min Max
Characteristic Symbol Conditions (Note 6) Typ (Note 6) Unit
Supply Quiescent Current Idd Vp = 2.6 V, No Load − 1.5 4 mA
Vp = 5.0 V, No Load − 1.7
Vp = 2.6 V, 8  − 1.7 5.5
Vp = 5.0 V, 8  − 1.9
Common Mode Voltage Vcm − − Vp/2 − V
Shutdown Current ISD − 0.02 0.3 A
Shutdown Voltage High VSDIH − 1.2 − − V
Shutdown Voltage Low VSDIL − − − 0.4 V
Turning On Time (Note 8) TWU Cby = 1 F − 60 − ms
Turning Off Time TOFF − − 1.0 − s
Output Impedance in Shutdown Mode ZSD − − 10 − k
Output Swing Vloadpeak Vp = 2.6 V, RL = 8.0  1.6 2.20 − V
Vp = 5.0 V, RL = 8.0  (Note 7) −
TA = +25°C 4.0 4.50
TA = −40°C to +85°C 3.85
Rms Output Power PO Vp = 2.6 V, RL = 4.0  − 0.40 − W
THD + N < 0.1%
Vp = 2.6 V, RL = 8.0  0.30
THD + N < 0.1% − −
Vp = 5.0 V, RL = 8.0  1.20
THD + N < 0.1%
Maximum Power Dissipation (Note 8) PDmax Vp = 5.0 V, RL = 8.0  − − 0.65 W
Output Offset Voltage VOS Vp = 2.6 V −30 30 mV
Vp = 5.0 V
Signal−to−Noise Ratio SNR Vp = 2.6 V, G = 2.0 − 84 − dB
10 Hz < F < 20 kHz
Vp = 5.0 V, G = 10 − 77 −
10 Hz < F < 20 kHz
Positive Supply Rejection Ratio PSRR V+ G = 2.0, RL = 8.0  dB
Vpripple_pp = 200 mV
Cby = 1.0 F
Input Terminated with 10 
F = 217 Hz
Vp = 4.2 V − −74 −
Vp = 3.6 V − −72 −
Vp = 3.0 V − −73 −

F = 1.0 kHz
Vp = 4.2 V − −80 −
Vp = 3.6 V − −76 −
Vp = 3.0 V − −77 −
Efficiency  Vp = 2.6 V, Porms = 320 mW − 48 − %
Vp = 5.0 V, Porms = 1.0 W − 63 −
Thermal Shutdown Temperature (Note 9) Tsd 140 160 180 °C
Total Harmonic Distortion THD Vp = 2.6, F = 1.0 kHz − − − %
RL = 4.0  AV = 2.0 − 0.04 −
PO = 0.32 W − − −

Vp = 5.0 V, F = 1.0 kHz − − −

RL = 8.0  AV = 2.0 − 0.02 −
PO = 1.0 W − − −
6. Min/Max limits are guaranteed by design, test or statistical analysis.
7. This parameter is guaranteed but not tested in production in case of a 5.0 V power supply.
8. See page 9 for a theoretical approach of this parameter.
9. For this parameter, the Min/Max values are given for information.

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 NCP2990

TYPICAL PERFORMANCE CHARACTERISTICS

10 10
VP = 2.5 V VP = 3.0 V
RL = 8  RL = 8 
f = 1 kHz f = 1 kHz
1 1
THD + N (%)

THD + N (%)
0.1 0.1

0.01 0.01
0 50 100 150 200 250 300 350 0 100 200 300 400 500
POUT (mW) POUT (mW)
Figure 2. THD+N versus Output Power Figure 3. THD+N versus Output Power

10 10
VP = 3.6 V VP = 4.2 V
RL = 8  RL = 8 
f = 1 kHz f = 1 kHz
1 1
THD + N (%)

THD + N (%)

0.1 0.1

0.01 0.01
0 100 200 300 400 500 600 700 800 0 200 400 600 800 1000
POUT (mW) POUT (mW)
Figure 4. THD+N versus Output Power Figure 5. THD+N versus Output Power

10 10
VP = 5.0 V VP = 2.5 V
RL = 8  RL = 4 
f = 1 kHz f = 1 kHz
1 1
THD + N (%)

THD + N (%)

0.1 0.1

0.01 0.01
0 200 400 600 800 1000 1200 1400 1600 0 100 200 300 400 500
POUT (mW) POUT (mW)
Figure 6. THD+N versus Output Power Figure 7. THD+N versus Output Power

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 NCP2990

TYPICAL PERFORMANCE CHARACTERISTICS

1600 1
RL = 8  VP = 2.5 V
1400 f = 1 kHz RL = 8 
POUT = 100 mW
OUTPUT POWER (mW)

1200

THD+N (%)
THD+N = 10%
1000
0.1
800 THD+N = 1%

600

400

200 0.01
2.5 3 3.5 4 4.5 5 100 1000 10000
POWER SUPPLY (V) FREQUENCY (Hz)
Figure 8. Output Power versus Power Supply Figure 9. THD+N versus Frequency

1 1
VP = 3.0 V VP = 5.0 V
RL = 8  RL = 8 
POUT = 250 mW POUT = 500 mW
THD+N (%)

THD+N (%)

0.1 0.1

0.01 0.01
100 1000 10000 100 1000 10000
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 10. THD+N versus Frequency Figure 11. THD+N versus Frequency

−40 −20
VP = 3.6 V VP = 3.6 V
CBYP = 100 nF RL = 8  RL = 8 
Input to GND −30 CBYP = 100 nF Input to GND
RIN = 22 k, RF = 22 k RIN = 22 k, RF = 110 k
220 nF
PSSR (dB)

PSSR (dB)

−40
−60 CBYP = 220 nF 440 nF

−50 1.0 F

CBYP = 1.0 F 2.2 F

−60

−80 −70
10 100 1000 10000 10 100 1 000 10000

FREQUENCY (Hz) FREQUENCY (Hz)

Figure 12. PSRR versus Frequency and Figure 13. PSRR versus Frequency and CBYP
CBYP @ VP = 3.6 V, AV = 2 @ VP = 3.6 V, AV = 10

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 NCP2990

TYPICAL PERFORMANCE CHARACTERISTICS

−40 −40
VP = 3.0 V VP = 3.6 V
RL = 8  RL = 8 
Input to GND Input to GND
−50 AV = 10 −50
AV = 10
PSSR (dB)

PSSR (dB)
AV = 4
−60 −60 AV = 4

−70 −70

AV = 2
AV = 2
−80 −80
10 100 1000 10000 10 100 1000 10000
FREQUENCY (Hz) FREQUENCY (Hz)
Figure 14. PSRR versus Frequency and Figure 15. PSRR versus Frequency and
Gain @ VP = 3.0 V Gain @ VP = 3.6 V

−20 80
VP = 4.2 V
−30 RL = 8  70
Input to GND
−40 60

−50 AV = 10 AV = 4 50
PSSR (dB)

TON (ms)

−60 40

−70 30
AV = 2
−80 20

−90 10

−100 0
10 100 1000 10000 −40 −20 0 20 40 60 80 100
FREQUENCY (Hz) ROOM TEMPERATURE (°C)
Figure 16. PSRR versus Frequency and Figure 17. Turn On Time versus
Gain @ VP = 4.2 V Room Temperature @ VBAT = 3.6 V,
CBYP = 1 mF, CIN = 100 nF, RIN = 22 k, RF = 110 k

120

100

80
TON (ms)

60

40

20

0
0 0.5 1 1.5 2 2.5
CBYP (F)
Figure 18. Turn On Time versus CBYP @ VBAT = 3.6 V, TA = +255C,
CIN = 100 nF, RIN = 22 k, RF = 110 k

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 NCP2990

TYPICAL PERFORMANCE CHARACTERISTICS

0.7 0.3

PD, POWER DISSIPATION (W)

PD, POWER DISSIPATION (W)

0.6 0.25

0.5
0.2
0.4
0.15
0.3 Vp = 5 V Vp = 3.3 V
RL = 8  RL = 8 
0.1
F = 1 kHz F = 1 kHz
0.2
THD + N < 0.1% THD + N < 0.1%
0.05
0.1

0 0
0 0.2 0.4 0.6 0.8 1 1.2 0 0.1 0.2 0.3 0.4 0.5
Pout, OUTPUT POWER (W) Pout, OUTPUT POWER (W)

Figure 19. Power Dissipation versus Output Figure 20. Power Dissipation versus Output
Power Power

0.25 0.4

0.35
PD, POWER DISSIPATION (W)
PD, POWER DISSIPATION (W)

0.2 RL = 4 
0.3

0.25
0.15
Vp = 3 V 0.2 RL = 8 
RL = 8 
0.1 0.15
F = 1 kHz
THD + N < 0.1%
0.1 Vp = 2.6 V
0.05
F = 1 kHz
0.05
THD + N < 0.1%
0 0
0 0.1 0.2 0.3 0.4 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
Pout, OUTPUT POWER (W) Pout, OUTPUT POWER (W)
Figure 21. Power Dissipation versus Output Figure 22. Power Dissipation versus Output
Power Power

700 180
Maximum Die Temperature 150°C
PD, POWER DISSIPATION (mW)

AMBIENT TEMPERATURE 25°C

600 PCB Heatsink Area 160 RL = 8 

DIE TEMPERATURE (°C) @

200 mm2
500 140 Vp = 5 V
50 mm2 500 mm2
400 120
Vp = 4.2 V
300 100

200 80 Vp = 3.3 V
PDmax = 633 mW
100 for Vp = 5 V, 60
RL = 8  Vp = 2.6 V
0 40
0 20 40 60 80 100 120 140 160 50 100 150 200 250 300
TA, AMBIENT TEMPERATURE (°C) PCB HEATSINK AREA (mm2)
Figure 23. Power Derating − 9−Pin Flip−Chip CSP Figure 24. Maximum Die Temperature versus
PCB Heatsink Area

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 NCP2990

APPLICATION INFORMATION
Detailed Description Shutdown Function
The NCP2990 audio amplifier can operate under 2.6 V The device enters shutdown mode when shutdown signal
until 5.5 V power supply. With less than 1% THD + N, it is low. During the shutdown mode, the DC quiescent
can deliver up to 1.2 W RMS output power to an 8.0  load current of the circuit does not exceed 100 nA. In this
(VP = 5.0 V). If application allows to reach 10% THD + N, configuration, the output impedance is 10 k on each
then 1.6 W can be provided using a 5.0 V power supply. output.
The structure of the NCP2990 is basically composed of
two identical internal power amplifiers; the first one is Current Limit Circuit
externally configurable with gain−setting resistors Rin and The maximum output power of the circuit (Porms =
Rf (the closed−loop gain is fixed by the ratios of these 1.0 W, Vp = 5.0 V, RL = 8.0 ) requires a peak current in
resistors) and the second is internally fixed in an inverting the load of 500 mA.
unity−gain configuration by two resistors of 20 k. So the In order to limit the excessive power dissipation in the
load is driven differentially through OUTA and OUTB load when a short−circuit occurs, the current limit in the
outputs. This configuration eliminates the need for an load is fixed to 800 mA. The current in the four output MOS
output coupling capacitor. transistors are real−time controlled, and when one current
exceeds 800 mA, the gate voltage of the MOS transistor is
Internal Power Amplifier clipped and no more current can be delivered.
The output PMOS and NMOS transistors of the amplifier
were designed to deliver the output power of the Thermal Overload Protection
specifications without clipping. The channel resistance Internal amplifiers are switched off when the
(Ron) of the NMOS and PMOS transistors does not exceed temperature exceeds 160°C, and will be switched on again
0.6 when they drive current. only when the temperature decreases fewer than 140°C.
The structure of the internal power amplifier is The NCP2990 is unity−gain stable and requires no
composed of three symmetrical gain stages, first and external components besides gain−setting resistors, an
medium gain stages are transconductance gain stages to input coupling capacitor and a proper bypassing capacitor
obtain maximum bandwidth and DC gain. in the typical application.
The first amplifier is externally configurable (Rf and
Turn−On and Turn−Off Transitions Rin), while the second is fixed in an inverting unity gain
A cycle with a turn−on and turn−off transition is configuration.
illustrated with plots that show both single ended signals on The differential−ended amplifier presents two major
the previous page. advantages:
In order to eliminate “pop and click” noises during − The possible output power is four times larger (the
transitions, output power in the load must be slowly output swing is doubled) as compared to a single−ended
established or cut. When logic high is applied to the amplifier under the same conditions.
shutdown pin, the bypass voltage begins to rise − Output pins (OUTA and OUTB) are biased at the same
exponentially and once the output DC level is around the potential Vp/2, this eliminates the need for an output
common mode voltage, the gain is established coupling capacitor required with a single−ended
instantaneously. This way to turn−on the device is amplifier configuration.
optimized in terms of rejection of “pop and click” noises. The differential closed loop−gain of the amplifier is
The device has the same behavior when it is turned−off Rf V
given by Avd + 2 * + orms .
by a logic low on the shutdown pin. During the shutdown Rin Vinrms
mode, amplifier outputs are connected to the ground using Output power delivered to the load is given by
a 10 k pulldown resistor. (Vopeak)2
Porms + (Vopeak is the peak differential
When a shutdown low level is applied, with 1 F bypass 2 * RL
capacitor, it takes 65 ms before the DC output level is tied output voltage).
to Ground on each output. However, no audio signal will be When choosing gain configuration to obtain the desired
provided to the BTL load instantaneously after the falling output power, check that the amplifier is not current limited
edge on the shutdown pin. or clipped.
With 1 F bypass capacitor, turn on time is set to 60 ms. The maximum current which can be delivered to the load
Refer to Figures 17 and 18 for a complete study of this Vopeak
parameter. This fast turn on time added to a very low is 500 mA Iopeak + .
RL
shutdown current saves battery life and brings flexibility
when designing the audio section of the final application.
NCP2990 is a zero pop noise device when using a
single−ended audio input.

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 NCP2990

Gain−Setting Resistor Selection (Rin and Rf) high−pass filter with Rin, the cut−off frequency is given by
Rin and Rf set the closed−loop gain of the amplifier. fc + 1 .
In order to optimize device and system performance, the 2 *  * Rin * Cin
NCP2990 should be used in low gain configurations. The size of the capacitor must be large enough to couple
The low gain configuration minimizes THD + noise in low frequencies without severe attenuation.
values and maximizes the signal to noise ratio, and the An input capacitor value between 33 nF and 220 nF
amplifier can still be used without running into the performs well in many applications (With Rin = 22 K).
bandwidth limitations.
Bypass Capacitor Selection (Cby)
A closed loop gain in the range from 2 to 5 is
The bypass capacitor Cby provides half−supply filtering
recommended to optimize overall system performance.
and determines how fast the NCP2990 turns on. With a
An input resistor (Rin) value of 22 k is realistic in most
single−ended audio input, the amplifier will be a zero pop
of applications, and doesn’t require the use of a too large
noise device no matter the bypass capacitor.
capacitor Cin.

Input Capacitor Selection (Cin)

The input coupling capacitor blocks the DC voltage at
the amplifier input terminal. This capacitor creates a

C2* R2
20 k
J12 1 F C4 J11
AUDIO
INPUT
C1 R1 Vp
INM
− OUTA
INP +
J3* 100 nF 20 k
20 k
Vp
8
Vp 20 k
−
BYPASS + J5
OUTB
J6
C3 1 F
TP1* TP2* TP3*
SHUTDOWN SHUTDOWN
CONTROL J7
VM_P VM
Vp OUTA OUTB J8 150 k R3

*C2, TP1, TP2, and TP3: Not Mounted

Figure 25. Schematic of the NCP2990 Demonstration Board

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 NCP2990

Figure 26. Demonstration Board for 9−Pin Flip−Chip CSP Device − Silkscreen Layers

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 NCP2990

BILL OF MATERIAL
PCB Manufacturer Refer-
Item Part Description Ref. Footprint Manufacturer ence

1 NCP2990 Audio Amplifier − − ON Semiconductor NCP2990

2 SMD Resistor 20 K R1, R2 0805 Panasonic ERJ−6GEYJ203V
4 SMD Resistor 150 K R3 0805 Panasonic ERJ−6GEYJ203V
5 Ceramic Capacitor 47 nF 100 V X7R C1 0805 TDK C2012X7R2A473K
6 Ceramic Capacitor 1.0 F 10 V X7R C3, C4 0805 TDK C2012X7R1A105K
7 Jumper Header Vertical Mount, 2 positions, 100 mils J2, J6, J18 100 mils Tyco Electronics / AMP 5−826629−0
8 I/O Connector, 2 positions J1, J5 200 mils Phoenix Contact 1757242
9 Jumper Connector J7 400 mils Harwin D3082−B01
10 Not Mounted C2, TP1, − − −
TP2, TP3

ORDERING INFORMATION
Device Marking Package Shipping†
NCP2990FCT2G MBA 9−Pin Flip−Chip CSP 3000/Tape and Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

9 PIN FLIP−CHIP
CASE 499E−01
ISSUE A
1 DATE 30 JUN 2004

SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
−A− 2. CONTROLLING DIMENSION: MILLIMETERS.
4X
3. COPLANARITY APPLIES TO SPHERICAL
D CROWNS OF SOLDER BALLS.
0.10 C −B−
MILLIMETERS
DIM MIN MAX
E A 0.540 0.660
A1 0.210 0.270
A2 0.330 0.390
D 1.450 BSC
TOP VIEW E 1.450 BSC
b 0.290 0.340
0.10 C A e 0.500 BSC
D1 1.000 BSC
0.05 C E1 1.000 BSC

−C−
A2
GENERIC
SEATING MARKING DIAGRAM*
PLANE A1
SIDE VIEW
A3
XXXX
D1
AYWW
e C1

A1
C

B E1 XXXX = Specific Device Code

e A = Assembly Location
A
Y = Year
9X b
1 2 3 WW = Work Week
0.05 C A B G or G = Pb−Free Package
0.03 C BOTTOM VIEW
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON12066D Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: 9 PIN FLIP−CHIP, 1.45 X 1.45 MM PAGE 1 OF 1

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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
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