BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI

WORK INTEGRATED LEARNING PROGRAMMES

COURSE HANDOUT

Part A: Content Design

Course Title Computer Organization and Software Systems

Course No(s) SS ZG516
Credit Units 5 (1 + 2 + 2)
Unit split between Class Hours + Lab/Design/Fieldwork + Student
preparation respectively; each unit translates to 32 hours
Course Author Lucy J Gudino / Chandra Shekhar
Version No 1.0
Date

Course Objectives
No Course Objective

CO1 Introduce students to systems aspects ( i.e. Computer Organization and Operating
Systems) involved in software development

CO2 Equip the student to understand the computer architectural and operating systems related
issues that affect the performance and nature of a software

CO3 To prepare students to be in a position to evaluate/correlate high level software

performance based on its system level features (i.e. architectural and operating systems)

Text Book(s)
T1 Stallings William, Computer Organization & Architecture, Pearson Education, 9 th Ed.
2013
T2 A Silberschatz, Abraham and others, Operating Systems Concepts, Wiley Student
Edition, 8th Edition

Reference Book(s) & other resources

R1 Patterson, David A & J L Hennenssy, Computer Organisation & Design, Elsevier, 4th
Ed., 2009.
R2 Ghosal, Computer Organization and Architecture: From 8085 to core2Duo & Beyond
(For JNTUK), Pearson Education, 2011 (Pearson Online)
 R3 Tanenbaum, Modern Operating Systems: Pearson New International Edition, Pearson
Education, 2013 (Pearson Online)
R4 Stallings, Operating Systems: Internals and Design Principles : International Edition,
Pearson Education, 2013 (Pearson Online)

Modular Content Structure

1. Computer System Components and Interconnections

1.1. Organization and Architecture
1.2. Structure and Functions of a computer system
1.3. Computer Components
1.4. Computer Functions
1.4.1. Basic Instruction cycle state diagram
1.4.2. Interrupts
1.4.3. Instruction cycle state diagram with interrupts
1.4.4. Interconnection Structures
1.4.5. Bus Interconnection
1.5. Performance Assessment
1.5.1. MIPS Rate
1.5.2. Amdahl’s Law

2. Memory Organization
2.1. Computer Memory System Overview
2.1.1. Characteristics of Memory Systems
2.1.2. The Memory Hierarchy
2.2. Cache Memory Principles
2.3. Cache to Main Memory Mapping Functions: Direct, Associative, and Set
Associative
2.4. Replacement Algorithms
2.5. Write Policy
2.6. Multi-cache system

3. Input/Output Organization
3.1. I/O Modules
3.2. Data Transfer Schemes
3.2.1. Programmed I/O
3.2.2. Interrupt-Driven I/O
3.2.3. Direct Memory Access

4. Instruction Set Architecture (x86 as an example)

4.1. Instruction Set: Characteristics and Functions
4.1.1. Machine Instruction Characteristics
4.1.2. Types of Operands (Intel x86 Data Types as an example)
4.1.3. Types of Operations (Intel x86 Operation Types as an example)
4.2. Instruction Set: Addressing Modes and Formats
4.2.1. Addressing Modes (x86 Addressing Modes as an example)
4.2.2. Instruction Formats (x86 Instruction Formats as an example)
4.3. Instruction Pipeline
4.3.1. Resource Hazard
4.3.2. Data Hazard
4.3.3. Control Hazard
4.4. CISC Vs RISC
 5. Control Unit Operation
5.1. Hardwired Control Unit Implementation
5.2. Micro programmed Control Unit Implementation

6. Operating System Structure

6.1. Introduction to Operating System
6.2. Structure of a Operating System (Linux as an example OS)
6.3. Operating System Services
6.4. System Calls

7. Process Management
7.1. Concept of Process
7.2. Process State Diagram
7.3. Operations on Processes
7.4. Inter-process communications with examples
7.5. Process vs. Threads
7.6. Multithreading Models
7.7. Process Scheduling criteria
7.8. Process Scheduling Algorithms -FCFS, SJF, Priority, RR, Multilevel Queue,
Multilevel Feedback Queue

8. Process Coordination
8.1. The Critical section problem
8.2. Peterson’s Solution
8.3. Synchronization Hardware
8.4. Semaphores
8.5. Deadlock: System Model
8.6. Deadlock Characterization
8.7. Methods of Handling Deadlocks
8.7.1. Deadlock Prevention
8.7.2. Deadlock Avoidance: Banker’s Algorithm
8.7.3. Deadlock Detection
8.7.4. Recovery from Deadlock

9. Memory Management
9.1. Memory-Management Strategies
9.2. Swapping
9.3. Contiguous memory Allocation
9.4. Paging
9.5. Segmentation
9.6. Virtual-Memory Management
9.7. Demand Paging
9.8. Page Replacement Algorithms: FIFO, Optimal, LRU, LFU
9.9. Thrashing

10. File System

10.1. File Concept
10.2. Access Methods
10.3. Directory Structure
10.4. File System Mounting
10.5. File System Structure
10.6. File System Implementation
10.7. Directory Implementation

Learning Outcomes:
 No Learning Outcomes

LO1 To apply the knowledge of performance metrics to find the performance of systems.

LO2 To Investigate high performance architecture design

LO3 To Examine different computer architectures and hardware

LO4 Students will Analyze and Compare of process management concepts including
scheduling, synchronization ,deadlocks

LO5 Students will Examine multithreading and system resources sharing among the users

LO6 Students will Outline of file system interface and implementation

Part B: Contact Session Plan

Academic Term
Course Title COMPUTER ORGANIZATION AND ARCHITECTURE
Course No
Lead Instructor

Glossary of Terms
1. Contact Hour (CH) stands for a hour long live session with students conducted either in a
physical classroom or enabled through technology. In this model of instruction, instructor led
sessions will be for 22 CH.
a. Pre CH = Self Learning done prior to a given contact hour
b. During CH = Content to be discussed during the contact hour by the course instructor
c. Post CH = Self Learning done post the contact hour
2. Contact Hour (CS) stands for a two-hour long live session with students conducted either in a
physical classroom or enabled through technology. In this model of instruction, instructor led
sessions will be for 11 CS.
a. Pre CS = Self Learning done prior to a given contact session
b. During CS = Content to be discussed during the contact session by the course
instructor
c. Post CS = Self Learning done post the contact session
3. RL stands for Recorded Lecture or Recorded Lesson. It is presented to the student through an
online portal. A given RL unfolds as a sequences of video segments interleaved with
exercises
4. SS stands for Self-Study to be done as a study of relevant sections from textbooks and
reference books. It could also include study of external resources.
5. LE stands for Lab Exercises
6. HW stands for Home Work.
7. M stands for module. Module is a standalone quantum of designed content. A typical course
is delivered using a string of modules. M2 means module 2.
 Teaching Methodology (Flipped Learning Model)
The pedagogy for this course is centered around flipped learning model in which the traditional class-
room instruction is replaced with recorded lectures to be watched at home as per the student’s
convenience and the erstwhile home-working or tutorials become the focus of classroom contact
sessions. Students are expected to finish the home works on time.

Contact Session Plan

o Each Module (M#) covers an independent topic and module may encompass more than one
Recorded Lecture (RL).
o Contact Sessions (2hrs each week) are scheduled alternate weeks after the student watches
all Recorded Lectures (RLs) of the specified Modules (listed below) during the previous week
o In the flipped learning model, Contact Sessions are meant for in-classroom discussions on
cases, tutorials/exercises or responding to student’s questions/clarification--- may encompass
more than one Module/RLs/CS topic.
o Contact Session topics listed in course structure (numbered CSx.y) may cover several RLs;
and as per the pace of instructor/students’ learning, the instructor may take up more than one
CS topic during each of the below sessions.

Detailed Structure
Introductory Video/Document: << Introducing the faculty, overview of the course, structure and
organization of topics, guidance for navigating the content, and expectations from students>>

 Each of the sub-modules of Recorded Lectures (RLx.y ) shall delivered via 30 – 60mins
videos followed by:
 Contact session (CSx.y) of 2Hr each for illustrating the concepts discussed in the videos with
exercises, tutorials and discussion on case-problems (wherever appropriate); contact sessions
(CS) may cover more than one recorded-lecture (RL) videos.

Course Contents

Contact Session 1
Time Type Description Content Reference

Pre CH RL1.1, RL Computer Organization and Architecture, T1 – 1.1, 1.2

1.2 Functional and Structural View of Computer T1 – 2.1, 2.2
System. R1
Concept of Computer Program and Instruction,
Internal Structure of CPU, Instruction Execution
Cycle With and Without Interrupt

During CH CH1 A brief summary of recorded lectures

Post CH SS1 To be announced by the instructor

HW1 To be announced by the instructor

Contact Session 2
Time Type Description Content Reference
Pre CH RL1.3, RL Interconnection Structures and Bus T1
1.4 Interconnection
RL 4,1 RL Performance Assessment : MIPS Rate,
4.2 Amdahl’s Law
Memory Organization :
Computer Memory System Overview :
Characteristics of Memory Systems and The
Memory Hierarchy.
Cache Memory Principles.
Fully Associative and Set Associative Mapping,
Cache Line Replacement Algorithms (LRU,
LFU, FIFO, Random)

During CH CH2 Summary of the recorded lecture

Text Book Problem solving on MIPS, CPI

Post CH SS2 To be announced by the instructor

HW2 To be announced by the instructor

LE2 Installation of CPU OS Simulator Lab capsule in Virtual

Performance analysis of Cache Memory Using Lab
CPU OS Simulator

Contact Hour 3
Time Type Description Content Reference

Pre CH RL6.1, I/O Modules: Function and Structure I/O T1

RL 3.1, 3.2, Methods: Programmed and Interrupt Driven I/O,
3.3 Direct Memory Access
Instruction Addressing modes and instruction
formats

During CH CH 3 A brief summary of recorded lectures

Post CH SS 3 To be announced by the instructor

HW3 To be announced by the instructor

LE3 Instruction set of CPU OS simulator Lab capsule in Virtual

Lab

Contact Session 4
Time Type Description Content Reference

Pre CH RL7.1, RL RISC and CISC Architectures, Instruction T1

7.2 Pipelining, Six Stage Pipeline Example, Pipeline
Performance Parameters and Speedup Ratio
Pipeline Hazards: Data Hazards(RAW),
Resource Hazards, Control Hazards, RISC
Pipeline as an example

During CH CH4 A brief summary of recorded lectures, T1

 Problem Solving based on Pipeline

Post CH SS4 To be announced by the instructor

HW4 To be announced by the instructor

LE4 Performance analysis of pipeline processor Lab capsule in Virtual

using CPU OS Simulator Lab

Contact Session 5
Time Type Description Content Reference

Pre CH RL8.2 Control Unit Implementation: Hardwired and T1

Micro-programmed, Micro-instruction Type
and Sequencing

During CH CH5 A brief summary of recorded lectures,

Problem Solving

Post CH SS5 To be announced by the instructor

HW19 To be announced by the instructor

LE19 NA

Contact Session 6

Time Type Description Content Reference

Pre-CS RL1.1, RL System Definition, Computing T2

1.2 * systems structure, components of
computing system, OS definition , OS
design issues
Different types of systems, Dual mode
operation, concept of
multiprogramming, multiprocessing
During CS CS6 OS Design and Implementation , OS T2
structure
Post-CS SS6 T2: Section 2.1, 2.2, 2.3, 2.4 and 2.5
HW6 T2: Problem 2.1, 2.2, 2.3, 2.4,2.5 2.10,
2.11, 2.13
Lab Reference LE6 Introduction to OS Simulator Lab capsule in Virtual Lab
Contact Session 7:

Time Type Description Content Reference

Pre-CS RL2.1, Process & thread definition, Process T2

RL 2.2, states and processes state transition
RL 3.1, diagram.
RL 3.2 * Process control block , process
context, threads
Short Term, Long term & Midterm
scheduling, Process scheduling, FCFS,
Round Robin, SJF, Priority scheduling,
Multilevel feedback queue,
During CS CS 7 A brief summary of recorded lectures, T2
Problem Solving based on Scheduling
Algorithms
Post-CS SS 7 To be announced by the instructor
HW 7 To be announced by the instructor
Lab Reference Performance analysis of scheduling Lab capsule in Virtual
algorithms using CPU OS Simulator Lab

Contact Session 8:

Time Type Description Content Reference

Pre-CS RL4.1, Process Synchronization, Software & T2

RL 4.2, hardware approach
RL 5.1, Process Synchronization using
RL 5.2* semaphores & Monitors.
Dead Lock Characterization, Methods
for handling Dead lock, Dead lock
Prevention
Dead lock avoidance, Deadlock
detection & recovery
During CS CS8 A brief summary of recorded lectures T2
Problems semaphore and deadlocks
Post-CS SS8 To be announced by the instructor
HW8 To be announced by the instructor
Lab Reference Study of synchronization and deadlock Lab capsule in Virtual
using CPU OS simulator Lab
Contact Session 9:

Time Type Description Content Reference

Pre-CS RL6.1, Types of memory, Memory T2

RL 6.2, organization, Address binding
RL 6.3* Memory Partitioning : Dynamic
memory Partitioning, buddy system,
Paging, Segmentation, Page
replacement algorithms
During CS CS 9 A brief summary of recorded lectures, T2
Problem solving
Post-CS SS 9 To be announced by the instructor
HW 9 To be announced by the instructor
Lab Reference NA

Contact Session 10:

Time Type Description Content Reference

Pre-CS RL7.1, File System - Directory structure - T2

RL 7.2 * single level, two level, tree, acyclic
graph, general graph; File system
mounting
File system structure - Layered file
system, file attributes, File control
block; File system implementation.
During CS CS10 A brief summary of recorded lectures T2
Post-CS SS10 To be announced by the instructor
HW10 NA
Lab Reference NA
*adopted content from Operating System course.

Contact Session 11: Revision

Evaluation Scheme
Evaluation Name Type Weight Duration Day, Date, Session,
Component (Quiz, Lab, Project, (Open book, Time
Midterm exam, End Closed book,
semester exam, etc) Online, etc.)

EC - 1 Quizzes / Assignment 30% To be announced

EC - 2 Mid-term Exam Closed book 30% 2 hours To be announced

 EC - 3 End Semester Exam Open book 40% 3 hours To be announced
Note - Evaluation components can be tailored depending on the proposed model.

Important Information

Syllabus for Mid-Semester Test (Closed Book): Topics in Contact Session 1 to 5

Syllabus for Comprehensive Exam (Open Book): All topics given in plan of study

Evaluation Guidelines:
1. EC-1 consists of either two Assignments or three Quizzes. Announcements regarding the
same will be made in a timely manner.
2. For Closed Book tests: No books or reference material of any kind will be permitted.
Laptops/Mobiles of any kind are not allowed. Exchange of any material is not allowed.
3. For Open Book exams: Use of prescribed and reference text books, in original (not
photocopies) is permitted. Class notes/slides as reference material in filed or bound form is
permitted. However, loose sheets of paper will not be allowed. Use of calculators is permitted
in all exams. Laptops/Mobiles of any kind are not allowed. Exchange of any material is not
allowed.
4. If a student is unable to appear for the Regular Test/Exam due to genuine exigencies, the
student should follow the procedure to apply for the Make-Up Test/Exam. The genuineness of
the reason for absence in the Regular Exam shall be assessed prior to giving permission to
appear for the Make-up Exam. Make-Up Test/Exam will be conducted only at selected exam
centres on the dates to be announced later.
It shall be the responsibility of the individual student to be regular in maintaining the self-study
schedule as given in the course handout, attend the lectures, and take all the prescribed evaluation
components such as Assignment/Quiz, Mid-Semester Test and Comprehensive Exam according to the
evaluation scheme provided in the handout.